diff --git a/src/Convert/UnbasedUnsized.hs b/src/Convert/UnbasedUnsized.hs index 6734b82..1eec4d8 100644 --- a/src/Convert/UnbasedUnsized.hs +++ b/src/Convert/UnbasedUnsized.hs @@ -3,9 +3,9 @@ - - Conversion for unbased, unsized literals ('0, '1, 'z, 'x) - - - Maintaining the unsized-ness of the literals is critical, but those digits - - are all equivalent regardless of base. We simply convert them to all use a - - binary base for compatibility with Verilog-2005. + - We convert the literals to be signed to enable sign extension, and give them + - a size of 1 and a binary base. These values implicitly cast as desired in + - Verilog-2005. -} module Convert.UnbasedUnsized (convert) where @@ -25,6 +25,6 @@ digits = ['0', '1', 'x', 'z', 'X', 'Z'] convertExpr :: Expr -> Expr convertExpr (Number ['\'', ch]) = if elem ch digits - then Number ("'b" ++ [ch]) + then Number ("1'sb" ++ [ch]) else error $ "unexpected unbased-unsized digit: " ++ [ch] convertExpr other = other diff --git a/test/basic/cast.v b/test/basic/cast.v index a658614..6834033 100644 --- a/test/basic/cast.v +++ b/test/basic/cast.v @@ -21,7 +21,7 @@ module top; $display("%b %b", y, {8'b0, y}); $display("%b %b", z, {35'b0, z}); end - localparam foo = 0; + localparam [0:0] foo = 0; localparam [31:0] bar = 32'b0; initial $display("%b %b", foo, bar); endmodule diff --git a/test/basic/dimensions.v b/test/basic/dimensions.v index fea0c15..ef8e8eb 100644 --- a/test/basic/dimensions.v +++ b/test/basic/dimensions.v @@ -15,42 +15,42 @@ module top; $display(1); $display(160); - $display(16, 16, 'bx); - $display(16, 16, 'bx); - $display(1, 1, 'bx); - $display(16, 16, 'bx); - $display(1, 1, 'bx); - $display(1, 1, 'bx); + $display(16, 16, 1'bx); + $display(16, 16, 1'bx); + $display(1, 1, 1'bx); + $display(16, 16, 1'bx); + $display(1, 1, 1'bx); + $display(1, 1, 1'bx); $display(1); $display(0); $display(16); - $display(32, 32, 'bx); - $display(31, 31, 'bx); - $display(0, 0, 'bx); - $display(31, 31, 'bx); - $display(0, 0, 'bx); - $display(1, 1, 'bx); + $display(32, 32, 1'bx); + $display(31, 31, 1'bx); + $display(0, 0, 1'bx); + $display(31, 31, 1'bx); + $display(0, 0, 1'bx); + $display(1, 1, 1'bx); $display(1); $display(0); $display(32); - $display('bx, 'bx, 'bx); - $display('bx, 'bx, 'bx); - $display('bx, 'bx, 'bx); - $display('bx, 'bx, 'bx); - $display('bx, 'bx, 'bx); - $display('bx, 'bx, 'bx); + $display(1'bx, 1'bx, 1'bx); + $display(1'bx, 1'bx, 1'bx); + $display(1'bx, 1'bx, 1'bx); + $display(1'bx, 1'bx, 1'bx); + $display(1'bx, 1'bx, 1'bx); + $display(1'bx, 1'bx, 1'bx); $display(0); $display(0); $display(1); - $display(8, 8, 'bx); - $display(7, 7, 'bx); - $display(0, 0, 'bx); - $display(7, 7, 'bx); - $display(0, 0, 'bx); - $display(1, 1, 'bx); + $display(8, 8, 1'bx); + $display(7, 7, 1'bx); + $display(0, 0, 1'bx); + $display(7, 7, 1'bx); + $display(0, 0, 1'bx); + $display(1, 1, 1'bx); $display(1); $display(0); $display(8); diff --git a/test/basic/unbased_unsized.sv b/test/basic/unbased_unsized.sv new file mode 100644 index 0000000..cb86473 --- /dev/null +++ b/test/basic/unbased_unsized.sv @@ -0,0 +1,10 @@ +`define TEST(value) \ + logic [63:0] val_``value = 'value; \ + initial $display(`"'value -> %b %b", val_``value, 'value); + +module top; + `TEST(1); + `TEST(0); + `TEST(x); + `TEST(z); +endmodule diff --git a/test/basic/unbased_unsized.v b/test/basic/unbased_unsized.v new file mode 100644 index 0000000..1763368 --- /dev/null +++ b/test/basic/unbased_unsized.v @@ -0,0 +1,10 @@ +`define TEST(value) \ + wire [63:0] val_``value = {64{1'b``value}}; \ + initial $display(`"'value -> %b %b", val_``value, 1'b``value); + +module top; + `TEST(1) + `TEST(0) + `TEST(x) + `TEST(z) +endmodule