From 0e2658fdca40fd66f539abc39aa1a06551f75923 Mon Sep 17 00:00:00 2001 From: Zachary Snow Date: Mon, 25 Mar 2019 19:42:20 -0400 Subject: [PATCH] fix string literal lexing --- src/Language/SystemVerilog/Parser/Lex.x | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/Language/SystemVerilog/Parser/Lex.x b/src/Language/SystemVerilog/Parser/Lex.x index 4a80ef9..3753ebf 100644 --- a/src/Language/SystemVerilog/Parser/Lex.x +++ b/src/Language/SystemVerilog/Parser/Lex.x @@ -46,7 +46,7 @@ $decimalDigit = [0-9] -- Strings -@string = \" [^\r\n]* \" +@string = \" (\\\"|[^\"\r\n])* \" -- Identifiers