2019-03-23 00:24:45 +01:00
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{- sv2v
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- Author: Zachary Snow <zach@zachjs.com>
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- Initial Verilog AST Author: Tom Hawkins <tomahawkins@gmail.com>
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-
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- This AST allows for the representation of many syntactically invalid things,
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- like input regs or modport declarations inside a module. Representing only
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- syntactically valid files would make working with the AST a nightmare. We
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- have placed an emphasis on making the conversion procedures in this project
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- more easier to write, interpret, and maintain.
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-
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- In the future, we may want to have a utility which performs some basic
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- invariant checks. I want to avoid making a full type-checker though, as we
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- should only be given valid SystemVerilog input files.
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-}
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2019-02-08 06:19:39 +01:00
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module Language.SystemVerilog.AST
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2019-03-23 00:24:45 +01:00
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( Description(..)
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, PackageItem(..)
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, ModuleItem (..)
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, Direction (..)
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, Stmt (..)
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, LHS (..)
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, Expr (..)
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, Sense (..)
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, Timing (..)
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, GenItem (..)
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, AlwaysKW (..)
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, CaseKW (..)
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, PartKW (..)
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, Decl (..)
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, Lifetime (..)
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, NInputGateKW (..)
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, NOutputGateKW (..)
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, AST
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, PortBinding
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, ModportDecl
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, Case
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, GenCase
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, simplify
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, rangeSize
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, module Expr
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, module Op
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, module Type
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) where
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import Data.List (intercalate)
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import Data.Maybe (maybe, fromJust, isJust)
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import Text.Printf (printf)
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2019-03-06 06:51:09 +01:00
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import Text.Read (readMaybe)
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2019-02-08 05:49:12 +01:00
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2019-03-23 00:24:45 +01:00
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import Language.SystemVerilog.AST.Expr as Expr
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import Language.SystemVerilog.AST.Op as Op
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import Language.SystemVerilog.AST.Type as Type
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import Language.SystemVerilog.AST.ShowHelp
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2019-02-08 05:49:12 +01:00
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2019-02-09 23:35:31 +01:00
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-- Note: Verilog allows modules to be declared with either a simple list of
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-- ports _identifiers_, or a list of port _declarations_. If only the
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-- identifiers are used, they must be declared with a type and direction
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-- (potentially separately!) within the module itself.
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2019-02-18 09:59:17 +01:00
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type AST = [Description]
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data PackageItem
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= Typedef Type Identifier
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| Function (Maybe Lifetime) Type Identifier [Decl] [Stmt]
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| Task (Maybe Lifetime) Identifier [Decl] [Stmt]
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| Comment String
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deriving Eq
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instance Show PackageItem where
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show (Typedef t x) = printf "typedef %s %s;" (show t) x
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show (Function ml t x i b) =
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printf "function %s%s%s;\n%s\n%s\nendfunction"
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(showLifetime ml) (showPad t) x (indent $ show i)
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(indent $ unlines' $ map show b)
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show (Task ml x i b) =
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printf "task %s%s;\n%s\n%s\nendtask"
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(showLifetime ml) x (indent $ show i)
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(indent $ unlines' $ map show b)
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show (Comment c) = "// " ++ c
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2019-02-18 09:59:17 +01:00
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data Description
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= Part PartKW Identifier [Identifier] [ModuleItem]
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| PackageItem PackageItem
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| Directive String
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deriving Eq
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2019-02-18 09:59:17 +01:00
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instance Show Description where
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showList descriptions _ = intercalate "\n" $ map show descriptions
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show (Part kw name ports items) = unlines
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[ (show kw) ++ " " ++ name ++ portsStr ++ ";"
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, indent $ unlines' $ map show items
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, "end" ++ (show kw) ]
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where
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portsStr =
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if null ports
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then ""
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else indentedParenList ports
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show (PackageItem i) = show i
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show (Directive str) = str
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2019-03-04 08:58:00 +01:00
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data PartKW
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= Module
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| Interface
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deriving Eq
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instance Show PartKW where
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show Module = "module"
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show Interface = "interface"
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2019-02-09 23:35:31 +01:00
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data Direction
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= Input
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| Output
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| Inout
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| Local
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deriving Eq
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instance Show Direction where
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show Input = "input"
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show Output = "output"
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show Inout = "inout"
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show Local = ""
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data Decl
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= Parameter Type Identifier Expr
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| Localparam Type Identifier Expr
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| Variable Direction Type Identifier [Range] (Maybe Expr)
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deriving Eq
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instance Show Decl where
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showList l _ = unlines' $ map show l
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show (Parameter t x e) = printf "parameter %s%s = %s;" (showPad t) x (show e)
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show (Localparam t x e) = printf "localparam %s%s = %s;" (showPad t) x (show e)
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show (Variable d t x a me) = printf "%s%s %s%s%s;" (showPad d) (show t) x (showRanges a) (showAssignment me)
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data ModuleItem
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= MIDecl Decl
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| AlwaysC AlwaysKW Stmt
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| Assign LHS Expr
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| Defparam LHS Expr
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| Instance Identifier [PortBinding] Identifier [PortBinding]
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| Genvar Identifier
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| Generate [GenItem]
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| Modport Identifier [ModportDecl]
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| Initial Stmt
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| MIPackageItem PackageItem
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| NInputGate NInputGateKW (Maybe Identifier) LHS [Expr]
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| NOutputGate NOutputGateKW (Maybe Identifier) [LHS] Expr
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deriving Eq
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2019-02-18 06:26:43 +01:00
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data AlwaysKW
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= Always
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| AlwaysComb
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| AlwaysFF
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| AlwaysLatch
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deriving Eq
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instance Show AlwaysKW where
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show Always = "always"
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show AlwaysComb = "always_comb"
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show AlwaysFF = "always_ff"
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show AlwaysLatch = "always_latch"
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type PortBinding = (Identifier, Maybe Expr)
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type ModportDecl = (Direction, Identifier, Maybe Expr)
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instance Show ModuleItem where
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show thing = case thing of
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MIDecl nest -> show nest
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AlwaysC k b -> printf "%s %s" (show k) (show b)
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Assign a b -> printf "assign %s = %s;" (show a) (show b)
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Defparam a b -> printf "defparam %s = %s;" (show a) (show b)
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Instance m params i ports
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| null params -> printf "%s %s%s;" m i (showPorts ports)
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| otherwise -> printf "%s #%s %s%s;" m (showPorts params) i (showPorts ports)
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2019-02-18 00:33:20 +01:00
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Genvar x -> printf "genvar %s;" x
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Generate b -> printf "generate\n%s\nendgenerate" (indent $ unlines' $ map show b)
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2019-03-05 02:58:09 +01:00
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Modport x l -> printf "modport %s(\n%s\n);" x (indent $ intercalate ",\n" $ map showModportDecl l)
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Initial s -> printf "initial %s" (show s)
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MIPackageItem i -> show i
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2019-03-22 06:31:43 +01:00
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NInputGate kw x lhs exprs -> printf "%s%s (%s, %s);" (show kw) (maybe "" (" " ++) x) (show lhs) (commas $ map show exprs)
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NOutputGate kw x lhss expr -> printf "%s%s (%s, %s);" (show kw) (maybe "" (" " ++) x) (commas $ map show lhss) (show expr)
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where
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showPorts :: [PortBinding] -> String
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showPorts ports = indentedParenList $ map showPort ports
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showPort :: PortBinding -> String
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showPort ("*", Nothing) = ".*"
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showPort (i, arg) =
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if i == ""
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then show (fromJust arg)
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else printf ".%s(%s)" i (if isJust arg then show $ fromJust arg else "")
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2019-03-04 08:58:00 +01:00
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showModportDecl :: ModportDecl -> String
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showModportDecl (dir, ident, me) =
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if me == Just (Ident ident)
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then printf "%s %s" (show dir) ident
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else printf "%s .%s(%s)" (show dir) ident (maybe "" show me)
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2019-02-11 20:46:09 +01:00
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2019-03-22 06:31:43 +01:00
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data NInputGateKW
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= GateAnd
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| GateNand
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| GateOr
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| GateNor
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| GateXor
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| GateXnor
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deriving Eq
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data NOutputGateKW
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= GateBuf
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| GateNot
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deriving Eq
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instance Show NInputGateKW where
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show GateAnd = "and"
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show GateNand = "nand"
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show GateOr = "or"
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show GateNor = "nor"
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show GateXor = "xor"
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show GateXnor = "xnor"
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instance Show NOutputGateKW where
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show GateBuf = "buf"
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show GateNot = "not"
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2019-02-08 05:49:12 +01:00
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data LHS
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= LHSIdent Identifier
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| LHSBit LHS Expr
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| LHSRange LHS Range
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| LHSDot LHS Identifier
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| LHSConcat [LHS]
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deriving Eq
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instance Show LHS where
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show (LHSIdent x ) = x
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show (LHSBit l e ) = printf "%s[%s]" (show l) (show e)
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show (LHSRange l (a, b)) = printf "%s[%s:%s]" (show l) (show a) (show b)
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show (LHSDot l x ) = printf "%s.%s" (show l) x
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show (LHSConcat lhss ) = printf "{%s}" (commas $ map show lhss)
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2019-02-23 21:10:25 +01:00
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data CaseKW
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= CaseN
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| CaseZ
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| CaseX
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deriving Eq
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instance Show CaseKW where
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show CaseN = "case"
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show CaseZ = "casez"
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show CaseX = "casex"
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data Stmt
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2019-03-07 21:39:19 +01:00
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= Block (Maybe Identifier) [Decl] [Stmt]
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2019-03-05 00:25:14 +01:00
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| Case Bool CaseKW Expr [Case] (Maybe Stmt)
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2019-02-24 09:06:40 +01:00
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| For (Identifier, Expr) Expr (Identifier, Expr) Stmt
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2019-03-07 21:56:03 +01:00
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| AsgnBlk AsgnOp LHS Expr
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2019-03-22 07:47:25 +01:00
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| Asgn (Maybe Timing) LHS Expr
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2019-03-05 03:32:30 +01:00
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| While Expr Stmt
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| RepeatL Expr Stmt
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| DoWhile Expr Stmt
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| Forever Stmt
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| If Expr Stmt Stmt
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2019-03-05 02:58:09 +01:00
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| Timing Timing Stmt
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2019-03-04 20:25:38 +01:00
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| Return Expr
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| Subroutine Identifier [Maybe Expr]
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| Null
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deriving Eq
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instance Show Stmt where
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show (Block name decls stmts) =
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printf "begin%s\n%s\n%s\nend" header (block decls) (block stmts)
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where
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header = maybe "" (" : " ++) name
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block :: Show t => [t] -> String
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block = indent . unlines' . map show
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2019-03-05 00:25:14 +01:00
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show (Case u kw e cs def) =
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printf "%s%s (%s)\n%s%s\nendcase" uniqStr (show kw) (show e) (indent $ unlines' $ map showCase cs) defStr
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where
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uniqStr = if u then "unique " else ""
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defStr = case def of
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Nothing -> ""
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Just c -> printf "\n\tdefault: %s" (show c)
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2019-02-24 09:06:40 +01:00
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show (For (a,b) c (d,e) f) = printf "for (%s = %s; %s; %s = %s)\n%s" a (show b) (show c) d (show e) $ indent $ show f
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2019-03-07 21:56:03 +01:00
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show (AsgnBlk o v e) = printf "%s %s %s;" (show v) (show o) (show e)
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2019-03-22 07:47:25 +01:00
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show (Asgn t v e) = printf "%s <= %s%s;" (show v) (maybe "" showPad t) (show e)
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2019-03-05 03:32:30 +01:00
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show (While e s) = printf "while (%s) %s" (show e) (show s)
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show (RepeatL e s) = printf "repeat (%s) %s" (show e) (show s)
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show (DoWhile e s) = printf "do %s while (%s);" (show s) (show e)
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show (Forever s ) = printf "forever %s" (show s)
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2019-03-04 08:58:00 +01:00
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show (If a b Null) = printf "if (%s) %s" (show a) (show b)
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2019-02-24 09:19:02 +01:00
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show (If a b c ) = printf "if (%s) %s\nelse %s" (show a) (show b) (show c)
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2019-03-04 20:25:38 +01:00
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show (Return e ) = printf "return %s;" (show e)
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2019-03-08 22:55:03 +01:00
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show (Subroutine x a) = printf "%s(%s);" x (commas $ map (maybe "" show) a)
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2019-03-05 02:58:09 +01:00
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show (Timing t s ) = printf "%s%s" (show t) rest
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2019-02-24 09:19:02 +01:00
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where
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rest = case s of
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2019-03-05 02:58:09 +01:00
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Null -> ";"
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2019-03-07 21:39:19 +01:00
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Block _ _ _ -> " " ++ (show s)
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2019-02-24 09:19:02 +01:00
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_ -> "\n" ++ (indent $ show s)
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2019-02-24 09:06:40 +01:00
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show (Null ) = ";"
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2019-02-15 05:29:42 +01:00
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2019-02-08 05:49:12 +01:00
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type Case = ([Expr], Stmt)
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2019-02-18 00:33:20 +01:00
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showCase :: (Show x, Show y) => ([x], y) -> String
|
2019-02-24 09:19:02 +01:00
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showCase (a, b) = printf "%s: %s" (commas $ map show a) (show b)
|
2019-02-08 05:49:12 +01:00
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|
2019-03-05 02:58:09 +01:00
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data Timing
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= Event Sense
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| Delay Expr
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| Cycle Expr
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deriving Eq
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instance Show Timing where
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show (Event s) = printf "@(%s)" (show s)
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show (Delay e) = printf "#(%s)" (show e)
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show (Cycle e) = printf "##(%s)" (show e)
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|
2019-02-08 05:49:12 +01:00
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|
data Sense
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= Sense LHS
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| SenseOr Sense Sense
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| SensePosedge LHS
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| SenseNegedge LHS
|
2019-02-10 23:46:18 +01:00
|
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|
| SenseStar
|
2019-02-08 05:49:12 +01:00
|
|
|
deriving Eq
|
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|
|
instance Show Sense where
|
2019-02-09 23:35:31 +01:00
|
|
|
show (Sense a ) = show a
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|
show (SenseOr a b) = printf "%s or %s" (show a) (show b)
|
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|
show (SensePosedge a ) = printf "posedge %s" (show a)
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|
show (SenseNegedge a ) = printf "negedge %s" (show a)
|
2019-02-10 23:46:18 +01:00
|
|
|
show (SenseStar ) = "*"
|
2019-02-08 05:49:12 +01:00
|
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|
2019-02-18 00:33:20 +01:00
|
|
|
type GenCase = ([Expr], GenItem)
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|
|
data GenItem
|
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|
|
= GenBlock (Maybe Identifier) [GenItem]
|
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|
|
|
| GenCase Expr [GenCase] (Maybe GenItem)
|
2019-03-08 22:03:29 +01:00
|
|
|
| GenFor (Identifier, Expr) Expr (Identifier, AsgnOp, Expr) (Maybe Identifier) [GenItem]
|
2019-02-18 00:33:20 +01:00
|
|
|
| GenIf Expr GenItem GenItem
|
|
|
|
|
| GenNull
|
|
|
|
|
| GenModuleItem ModuleItem
|
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|
|
|
deriving Eq
|
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|
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|
|
|
|
|
instance Show GenItem where
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|
|
|
|
showList i _ = unlines' $ map show i
|
2019-02-24 09:06:40 +01:00
|
|
|
show (GenBlock Nothing i) = printf "begin\n%s\nend" (indent $ unlines' $ map show i)
|
2019-02-18 00:33:20 +01:00
|
|
|
show (GenBlock (Just x) i) = printf "begin : %s\n%s\nend" x (indent $ unlines' $ map show i)
|
|
|
|
|
show (GenCase e c Nothing ) = printf "case (%s)\n%s\nendcase" (show e) (indent $ unlines' $ map showCase c)
|
|
|
|
|
show (GenCase e c (Just d)) = printf "case (%s)\n%s\n\tdefault:\n%s\nendcase" (show e) (indent $ unlines' $ map showCase c) (indent $ indent $ show d)
|
2019-02-24 09:19:02 +01:00
|
|
|
show (GenIf e a GenNull) = printf "if (%s) %s" (show e) (show a)
|
|
|
|
|
show (GenIf e a b ) = printf "if (%s) %s\nelse %s" (show e) (show a) (show b)
|
2019-03-08 22:03:29 +01:00
|
|
|
show (GenFor (x1, e1) c (x2, o2, e2) mx is) = printf "for (%s = %s; %s; %s %s %s) %s" x1 (show e1) (show c) x2 (show o2) (show e2) (show $ GenBlock mx is)
|
2019-02-18 00:33:20 +01:00
|
|
|
show GenNull = ";"
|
|
|
|
|
show (GenModuleItem item) = show item
|
2019-03-04 20:25:38 +01:00
|
|
|
|
|
|
|
|
data Lifetime
|
|
|
|
|
= Static
|
|
|
|
|
| Automatic
|
|
|
|
|
deriving (Eq, Ord)
|
|
|
|
|
|
|
|
|
|
instance Show Lifetime where
|
|
|
|
|
show Static = "static"
|
|
|
|
|
show Automatic = "automatic"
|
|
|
|
|
|
|
|
|
|
showLifetime :: Maybe Lifetime -> String
|
|
|
|
|
showLifetime Nothing = ""
|
|
|
|
|
showLifetime (Just l) = show l ++ " "
|
2019-03-06 06:51:09 +01:00
|
|
|
|
|
|
|
|
-- basic expression simplfication utility to help us generate nicer code in the
|
|
|
|
|
-- common case of ranges like `[FOO-1:0]`
|
|
|
|
|
simplify :: Expr -> Expr
|
|
|
|
|
simplify (BinOp op e1 e2) =
|
|
|
|
|
case (op, e1', e2') of
|
|
|
|
|
(Add, Number "0", e) -> e
|
|
|
|
|
(Add, e, Number "0") -> e
|
|
|
|
|
(Sub, e, Number "0") -> e
|
|
|
|
|
(Add, BinOp Sub e (Number "1"), Number "1") -> e
|
|
|
|
|
(Add, e, BinOp Sub (Number "0") (Number "1")) -> BinOp Sub e (Number "1")
|
|
|
|
|
(_ , Number a, Number b) ->
|
|
|
|
|
case (op, readMaybe a :: Maybe Int, readMaybe b :: Maybe Int) of
|
|
|
|
|
(Add, Just x, Just y) -> Number $ show (x + y)
|
|
|
|
|
(Sub, Just x, Just y) -> Number $ show (x - y)
|
|
|
|
|
(Mul, Just x, Just y) -> Number $ show (x * y)
|
|
|
|
|
_ -> BinOp op e1' e2'
|
|
|
|
|
_ -> BinOp op e1' e2'
|
|
|
|
|
where
|
|
|
|
|
e1' = simplify e1
|
|
|
|
|
e2' = simplify e2
|
|
|
|
|
simplify other = other
|
|
|
|
|
|
|
|
|
|
rangeSize :: Range -> Expr
|
|
|
|
|
rangeSize (s, e) =
|
|
|
|
|
simplify $ BinOp Add (BinOp Sub s e) (Number "1")
|