diff --git a/lib/include/prjxray/xilinx/bitstream_reader.h b/lib/include/prjxray/xilinx/bitstream_reader.h
index 35224bb9..11fd6155 100644
--- a/lib/include/prjxray/xilinx/bitstream_reader.h
+++ b/lib/include/prjxray/xilinx/bitstream_reader.h
@@ -71,10 +71,10 @@ class BitstreamReader {
 	// Extract information from bitstream necessary to reconstruct RBT
 	// header and add it to the AUX data
 	template <typename T>
-	static void ExtractHeader(T bitstream, FILE* aux_fp);
+	static void PrintHeader(T bitstream, FILE* aux_fp);
 
 	// Extract configuration logic data and add to the AUX data
-	void ExtractFpgaConfigurationLogicData(FILE* aux_fp);
+	void PrintFpgaConfigurationLogicData(FILE* aux_fp);
 
 	const std::vector<uint32_t>& words() { return words_; };
 
@@ -93,7 +93,7 @@ class BitstreamReader {
 
 // Extract FPGA configuration logic information
 template <typename ArchType>
-void BitstreamReader<ArchType>::ExtractFpgaConfigurationLogicData(
+void BitstreamReader<ArchType>::PrintFpgaConfigurationLogicData(
     FILE* aux_fp) {
 	// Get the data before the first FDRI_WRITE command packet
 	const auto fpga_conf_end = std::search(
@@ -118,7 +118,7 @@ void BitstreamReader<ArchType>::ExtractFpgaConfigurationLogicData(
 
 template <typename ArchType>
 template <typename T>
-void BitstreamReader<ArchType>::ExtractHeader(T bitstream, FILE* aux_fp) {
+void BitstreamReader<ArchType>::PrintHeader(T bitstream, FILE* aux_fp) {
 	// If this is really a Xilinx bitstream, there will be a sync
 	// word somewhere toward the beginning.
 	auto sync_pos = std::search(bitstream.begin(), bitstream.end(),
diff --git a/lib/include/prjxray/xilinx/configuration.h b/lib/include/prjxray/xilinx/configuration.h
index 571441e8..0a883547 100644
--- a/lib/include/prjxray/xilinx/configuration.h
+++ b/lib/include/prjxray/xilinx/configuration.h
@@ -68,7 +68,7 @@ class Configuration {
 
 	const typename ArchType::Part& part() const { return part_; }
 	const FrameMap& frames() const { return frames_; }
-	void ExtractFrameAddresses(FILE* fp);
+	void PrintFrameAddresses(FILE* fp);
 
        private:
 	typename ArchType::Part part_;
@@ -360,7 +360,7 @@ Configuration<ArchType>::InitWithPackets(const typename ArchType::Part& part,
 }
 
 template <typename ArchType>
-void Configuration<ArchType>::ExtractFrameAddresses(FILE* fp) {
+void Configuration<ArchType>::PrintFrameAddresses(FILE* fp) {
 	fprintf(fp, "Frame addresses in bitstream: ");
 	for (auto frame = frames_.begin(); frame != frames_.end(); ++frame) {
 		fprintf(fp, "%08X", (int)frame->first);
diff --git a/tools/bitread.cc b/tools/bitread.cc
index ef1d0e39..796b8c75 100644
--- a/tools/bitread.cc
+++ b/tools/bitread.cc
@@ -129,12 +129,12 @@ struct BitReader {
 				return 1;
 			}
 			// Extract and decode header information as in RBT file
-			xilinx::BitstreamReader<ArchType>::ExtractHeader(
+			xilinx::BitstreamReader<ArchType>::PrintHeader(
 			    bytes_, aux_file);
 			// Extract FPGA configuration logic information
-			reader->ExtractFpgaConfigurationLogicData(aux_file);
+			reader->PrintFpgaConfigurationLogicData(aux_file);
 			// Extract configuration frames' addresses
-			config->ExtractFrameAddresses(aux_file);
+			config->PrintFrameAddresses(aux_file);
 			fclose(aux_file);
 		}