From f0ffd4bdcbd3df3a3b4910cadd61620c671b2740 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Sun, 26 Nov 2017 08:40:17 +0100
Subject: [PATCH] Add clkbuf minitests

Signed-off-by: Clifford Wolf <clifford@clifford.at>
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
---
 minitests/clkbuf/.gitignore | 12 +++++++++
 minitests/clkbuf/runme.sh   | 12 +++++++++
 minitests/clkbuf/runme.tcl  | 53 +++++++++++++++++++++++++++++++++++++
 minitests/clkbuf/top.v      | 10 +++++++
 4 files changed, 87 insertions(+)
 create mode 100644 minitests/clkbuf/.gitignore
 create mode 100755 minitests/clkbuf/runme.sh
 create mode 100644 minitests/clkbuf/runme.tcl
 create mode 100644 minitests/clkbuf/top.v

diff --git a/minitests/clkbuf/.gitignore b/minitests/clkbuf/.gitignore
new file mode 100644
index 00000000..0f325e9c
--- /dev/null
+++ b/minitests/clkbuf/.gitignore
@@ -0,0 +1,12 @@
+/.Xil
+/design/
+/design.bit
+/design.bits
+/design.segs
+/design.dcp
+/design_b*.bit
+/design_b*.bits
+/design_b*.segs
+/design_b*.dcp
+/usage_statistics_webtalk.*
+/vivado*
diff --git a/minitests/clkbuf/runme.sh b/minitests/clkbuf/runme.sh
new file mode 100755
index 00000000..9b816c75
--- /dev/null
+++ b/minitests/clkbuf/runme.sh
@@ -0,0 +1,12 @@
+#!/bin/bash
+
+set -ex
+vivado -mode batch -source runme.tcl
+
+${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
+${XRAY_SEGPRINT} -zd design.bits > design.segs
+
+for id in b{0,1,2,3,4,5,6,7,8,9,10,11}; do
+	${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design_$id.bits -z -y design_$id.bit
+	${XRAY_SEGPRINT} -zd design_$id.bits > design_$id.segs
+done
diff --git a/minitests/clkbuf/runme.tcl b/minitests/clkbuf/runme.tcl
new file mode 100644
index 00000000..e607159f
--- /dev/null
+++ b/minitests/clkbuf/runme.tcl
@@ -0,0 +1,53 @@
+create_project -force -part $::env(XRAY_PART) design design
+
+read_verilog top.v
+synth_design -top top
+
+set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports c]
+set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports d]
+set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports q]
+
+create_pblock roi
+resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)"
+
+set_property CFGBVS VCCO [current_design]
+set_property CONFIG_VOLTAGE 3.3 [current_design]
+set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
+
+set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets c_IBUF]
+
+place_design
+route_design
+
+write_checkpoint -force design.dcp
+write_bitstream -force design.bit
+
+source ../../utils/utils.tcl
+
+foreach it {
+	{b11 INT_L_X12Y100/GCLK_L_B11}
+	{b10 INT_L_X12Y100/GCLK_L_B10}
+	{b9  INT_L_X12Y100/GCLK_L_B9}
+	{b8  INT_L_X12Y100/GCLK_L_B8}
+	{b7  INT_L_X12Y100/GCLK_L_B7}
+	{b6  INT_L_X12Y100/GCLK_L_B6}
+	{b5  INT_R_X13Y100/GCLK_B5}
+	{b4  INT_R_X13Y100/GCLK_B4}
+	{b3  INT_R_X13Y100/GCLK_B3}
+	{b2  INT_R_X13Y100/GCLK_B2}
+	{b1  INT_R_X13Y100/GCLK_B1}
+	{b0  INT_R_X13Y100/GCLK_B0}
+} {
+	set net [get_nets c_IBUF_BUFG]
+	set_property FIXED_ROUTE {} $net
+	route_design -unroute -net $net
+
+	set id [lindex $it 0]
+	set gclk [lindex $it 1]
+
+	route_via $net "$gclk"
+
+	write_checkpoint -force design_$id.dcp
+	write_bitstream -force design_$id.bit
+}
+
diff --git a/minitests/clkbuf/top.v b/minitests/clkbuf/top.v
new file mode 100644
index 00000000..29984cae
--- /dev/null
+++ b/minitests/clkbuf/top.v
@@ -0,0 +1,10 @@
+module top (input c, d, output q);
+	(* LOC="SLICE_X16Y100", BEL="AFF", DONT_TOUCH *)
+	FDRE ff (
+		.C(c),
+		.CE(1'b1),
+		.R(1'b0),
+		.D(d),
+		.Q(q)
+	);
+endmodule