From ef9226e969c53f50c27fea7f649c7bd69d1f6101 Mon Sep 17 00:00:00 2001 From: Lukasz Dalek Date: Fri, 1 Mar 2019 15:31:35 +0100 Subject: [PATCH] roi_harness: Add ARTY-A7-UART configuration Signed-off-by: Lukasz Dalek --- minitests/roi_harness/arty.sh | 6 +++--- minitests/roi_harness/runme.tcl | 22 ++++++++++++++++++++++ 2 files changed, 25 insertions(+), 3 deletions(-) diff --git a/minitests/roi_harness/arty.sh b/minitests/roi_harness/arty.sh index ef26df91..d7eccd3f 100644 --- a/minitests/roi_harness/arty.sh +++ b/minitests/roi_harness/arty.sh @@ -1,8 +1,8 @@ # XC7A35TICSG324-1L export XRAY_PART=xc7a35tcsg324-1 -export XRAY_PINCFG=ARTY-A7-SWBUT -export XRAY_DIN_N_LARGE=8 -export XRAY_DOUT_N_LARGE=8 +export XRAY_PINCFG=ARTY-A7-UART +export XRAY_DIN_N_LARGE=2 +export XRAY_DOUT_N_LARGE=2 # For generating DB export XRAY_PIN_00="G13" diff --git a/minitests/roi_harness/runme.tcl b/minitests/roi_harness/runme.tcl index 03488f0b..710c72a1 100644 --- a/minitests/roi_harness/runme.tcl +++ b/minitests/roi_harness/runme.tcl @@ -196,6 +196,28 @@ if {$part eq "xc7a50tfgg484-1"} { set pin [lindex $pmod_jc $i] set net2pin(dout[$i]) $pin } + } elseif {$pincfg eq "ARTY-A7-UART"} { + # https://reference.digilentinc.com/reference/programmable-logic/arty/reference-manual?redirect=1 + # RST button and UART_RX + set arty_in "C2 A9" + # LD7 and UART_TX + set arty_out "T10 D10" + + # 100 MHz CLK onboard + set pin "E3" + set net2pin(clk) $pin + + # DIN + for {set i 0} {$i < $DIN_N} {incr i} { + set pin [lindex $arty_in $i] + set net2pin(din[$i]) $pin + } + + # DOUT + for {set i 0} {$i < $DOUT_N} {incr i} { + set pin [lindex $arty_out $i] + set net2pin(dout[$i]) $pin + } } else { error "Unsupported config $pincfg" }