From 7665003311771709dc16ee1c2875bb6dcd489465 Mon Sep 17 00:00:00 2001 From: Lukasz Dalek Date: Tue, 16 Jul 2019 16:58:54 +0200 Subject: [PATCH 1/4] fuzzers: 007-timing: Add CARRY4 [ABCD]CY muxes Signed-off-by: Lukasz Dalek --- fuzzers/007-timing/Makefile | 8 ++- utils/carry4delays.py | 115 ++++++++++++++++++++++++++++++++++++ 2 files changed, 121 insertions(+), 2 deletions(-) create mode 100755 utils/carry4delays.py diff --git a/fuzzers/007-timing/Makefile b/fuzzers/007-timing/Makefile index c164609e..2ec3a800 100644 --- a/fuzzers/007-timing/Makefile +++ b/fuzzers/007-timing/Makefile @@ -16,8 +16,12 @@ routing-bels/build/sdf: mergesdfs: bel/build/sdf.ok routing-bels/build/sdf mkdir -p sdfs - python3 ${XRAY_UTILS_DIR}/sdfmerge.py --sdfs $(SLICEM_SDFS) --site SLICEM --out sdfs/slicem.sdf - python3 ${XRAY_UTILS_DIR}/sdfmerge.py --sdfs $(SLICEL_SDFS) --site SLICEL --out sdfs/slicel.sdf --json debu.json + python3 ${XRAY_UTILS_DIR}/sdfmerge.py --sdfs $(SLICEM_SDFS) --site SLICEM --out routing-bels/build/precarry_slicem.sdf + python3 ${XRAY_UTILS_DIR}/sdfmerge.py --sdfs $(SLICEL_SDFS) --site SLICEL --out routing-bels/build/precarry_slicel.sdf + python3 ${XRAY_UTILS_DIR}/carry4delays.py --input routing-bels/build/precarry_slicem.sdf --output routing-bels/build/carry4_slicem.sdf + python3 ${XRAY_UTILS_DIR}/carry4delays.py --input routing-bels/build/precarry_slicel.sdf --output routing-bels/build/carry4_slicel.sdf + python3 ${XRAY_UTILS_DIR}/sdfmerge.py --sdfs routing-bels/build/precarry_slicem.sdf routing-bels/build/carry4_slicem.sdf --site SLICEM --out sdfs/slicem.sdf + python3 ${XRAY_UTILS_DIR}/sdfmerge.py --sdfs routing-bels/build/precarry_slicel.sdf routing-bels/build/carry4_slicel.sdf --site SLICEL --out sdfs/slicel.sdf --json debu.json cp bel/build/*.sdf sdfs pushdb: mergesdfs diff --git a/utils/carry4delays.py b/utils/carry4delays.py new file mode 100755 index 00000000..dd4d7d56 --- /dev/null +++ b/utils/carry4delays.py @@ -0,0 +1,115 @@ +#!/usr/bin/env python3.6 + +import sys, os, argparse +from sdf_timing import sdfparse + +model_carry4 = { + 'type' : 'CARRY4', + + 'srcs' : { 'O5', '?X', '?X_LFF', '?X_LBOTH' }, + 'out' : { 'CO0', 'CO1', 'CO2', 'CO3', 'O0', 'O1', 'O2', 'O3' }, + + 'mux' : '?CY0', + + 'pins' : { + 'DI0' : { 'type' : 'A' }, + 'DI1' : { 'type' : 'B' }, + 'DI2' : { 'type' : 'C' }, + 'DI3' : { 'type' : 'D' }, + }, +} + +def compute_delays(model, fin_name, fout_name): + data = '' + with open(fin_name, 'r') as f: + data = f.read() + sdf = sdfparse.parse(data) + + keys = sdf['cells'][model['type']].keys() + if 'slicel'.upper() in keys: + sl = 'L' + elif 'slicem'.upper() in keys: + sl = 'M' + else: + print("Unknown slice type!") + return ; + + nsdf = dict() + nsdf['header'] = sdf['header'] + nsdf['cells'] = dict() + nsdf['cells']['ROUTING_BEL'] = dict() + + for p in model['pins']: + pin = model['pins'][p] + + outs = dict() + for o in model['out']: + outs[o] = [] + + res = [] + cells = sdf['cells'] + + for src in model['srcs']: + source = src.replace('?', pin['type']) + + _type = model['type'] + '_' + source + + if _type in cells.keys(): + cell = cells[_type]["SLICE" + sl.upper()] + + for o in model['out']: + iopath = 'iopath_' + p + '_' + o + + if iopath in cell.keys(): + delay = cell[iopath]['delay_paths']['slow']['max'] + outs[o].append(delay) + + for src in outs: + s = sorted(outs[src]) + for val in s: + res.append(val - s[0]) + + delay = round(max(res), 3) + + muxname = str(model['mux'].replace('?', pin['type'])) + rbel = nsdf['cells']['ROUTING_BEL']['SLICE' + sl.upper() + '/' + muxname] = dict() + + iname = 'interconnect_' + pin['type'].lower() + 'x_' + str(p).lower() + + rbel[iname] = dict() + rbel[iname]['is_absolute'] = True + rbel[iname]['to_pin_edge'] = None + rbel[iname]['from_pin_edge'] = None + rbel[iname]['from_pin'] = pin['type'].lower() + 'x' + rbel[iname]['to_pin'] = str(p).lower() + rbel[iname]['type'] = 'interconnect' + rbel[iname]['is_timing_check'] = False + rbel[iname]['is_timing_env'] = False + + paths = rbel[iname]['delay_paths'] = dict() + + paths['slow'] = dict() + paths['slow']['min'] = delay + paths['slow']['avg'] = None + paths['slow']['max'] = delay + + paths['fast'] = dict() + paths['fast']['min'] = delay + paths['fast']['avg'] = None + paths['fast']['max'] = delay + + + # emit new sdfs + with open(fout_name, 'w') as f: + f.write(sdfparse.emit(nsdf)) + +def main(argv): + parser = argparse.ArgumentParser(description='Tool for computing CARRY4 muxes delays') + parser.add_argument('--input', dest='inputfile', action='store', help='Input file') + parser.add_argument('--output', dest='outputfile', action='store', help='Output file') + args = parser.parse_args(argv[1:]) + + compute_delays(model_carry4, args.inputfile, args.outputfile) + +if __name__ == "__main__": + main(sys.argv) From d1308b41621730b73bb4dd3ee24ea1e1585ec7fb Mon Sep 17 00:00:00 2001 From: Karol Gugala Date: Tue, 23 Jul 2019 10:39:21 +0200 Subject: [PATCH 2/4] carry4delays: fix hashbang Signed-off-by: Karol Gugala --- utils/carry4delays.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/utils/carry4delays.py b/utils/carry4delays.py index dd4d7d56..a847424e 100755 --- a/utils/carry4delays.py +++ b/utils/carry4delays.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python3.6 +#!/usr/bin/env python3 import sys, os, argparse from sdf_timing import sdfparse From 10e022140e00f11d3629f4a7a0b7caa0b7b1c3a3 Mon Sep 17 00:00:00 2001 From: Karol Gugala Date: Tue, 23 Jul 2019 14:33:52 +0200 Subject: [PATCH 3/4] fuzzers: 007: reorganize Makefiles Signed-off-by: Karol Gugala --- fuzzers/007-timing/Makefile | 18 +++++++----------- fuzzers/007-timing/bel/Makefile | 19 ++++++++++++++++++- .../007-timing/bel}/carry4delays.py | 0 fuzzers/007-timing/routing-bels/Makefile | 1 + 4 files changed, 26 insertions(+), 12 deletions(-) rename {utils => fuzzers/007-timing/bel}/carry4delays.py (100%) diff --git a/fuzzers/007-timing/Makefile b/fuzzers/007-timing/Makefile index 2ec3a800..60a3fad5 100644 --- a/fuzzers/007-timing/Makefile +++ b/fuzzers/007-timing/Makefile @@ -1,5 +1,5 @@ -SLICEL_SDFS = bel/build/CLBLL_L.sdf bel/build/CLBLL_R.sdf bel/build/CLBLM_L.sdf bel/build/CLBLM_R.sdf routing-bels/build/slicel.sdf -SLICEM_SDFS = bel/build/CLBLL_L.sdf bel/build/CLBLL_R.sdf bel/build/CLBLM_L.sdf bel/build/CLBLM_R.sdf routing-bels/build/slicem.sdf +SLICEL_SDFS = bel/build/slicel.sdf bel/build/carry4_slicel.sdf routing-bels/build/slicel.sdf +SLICEM_SDFS = bel/build/slicem.sdf bel/build/carry4_slicem.sdf routing-bels/build/slicem.sdf run: all all: pushdb @@ -8,21 +8,17 @@ clean: cd bel && $(MAKE) clean cd routing-bels && $(MAKE) clean -bel/build/sdf.ok: +bel/build/all_sdf.ok: cd bel && $(MAKE) -routing-bels/build/sdf: +routing-bels/build/sdf.ok: cd routing-bels && $(MAKE) -mergesdfs: bel/build/sdf.ok routing-bels/build/sdf +mergesdfs: bel/build/all_sdf.ok routing-bels/build/sdf.ok mkdir -p sdfs - python3 ${XRAY_UTILS_DIR}/sdfmerge.py --sdfs $(SLICEM_SDFS) --site SLICEM --out routing-bels/build/precarry_slicem.sdf - python3 ${XRAY_UTILS_DIR}/sdfmerge.py --sdfs $(SLICEL_SDFS) --site SLICEL --out routing-bels/build/precarry_slicel.sdf - python3 ${XRAY_UTILS_DIR}/carry4delays.py --input routing-bels/build/precarry_slicem.sdf --output routing-bels/build/carry4_slicem.sdf - python3 ${XRAY_UTILS_DIR}/carry4delays.py --input routing-bels/build/precarry_slicel.sdf --output routing-bels/build/carry4_slicel.sdf - python3 ${XRAY_UTILS_DIR}/sdfmerge.py --sdfs routing-bels/build/precarry_slicem.sdf routing-bels/build/carry4_slicem.sdf --site SLICEM --out sdfs/slicem.sdf - python3 ${XRAY_UTILS_DIR}/sdfmerge.py --sdfs routing-bels/build/precarry_slicel.sdf routing-bels/build/carry4_slicel.sdf --site SLICEL --out sdfs/slicel.sdf --json debu.json cp bel/build/*.sdf sdfs + python3 ${XRAY_UTILS_DIR}/sdfmerge.py --sdfs $(SLICEM_SDFS) --site SLICEM --out sdfs/slicem.sdf + python3 ${XRAY_UTILS_DIR}/sdfmerge.py --sdfs $(SLICEL_SDFS) --site SLICEL --out sdfs/slicel.sdf pushdb: mergesdfs mkdir -p ${XRAY_DATABASE_DIR}/${XRAY_DATABASE}/timings diff --git a/fuzzers/007-timing/bel/Makefile b/fuzzers/007-timing/bel/Makefile index 7267b8d6..da76f091 100644 --- a/fuzzers/007-timing/bel/Makefile +++ b/fuzzers/007-timing/bel/Makefile @@ -1,10 +1,16 @@ -all: build/sdf.ok +SLICEL_SDFS = build/CLBLL_L.sdf build/CLBLL_R.sdf build/CLBLM_L.sdf build/CLBLM_R.sdf +SLICEM_SDFS = build/CLBLL_L.sdf build/CLBLL_R.sdf build/CLBLM_L.sdf build/CLBLM_R.sdf +all: build/all_sdf.ok + +build/all_sdf.ok: build/carry4_slicel.sdf build/carry4_slicem.sdf + touch build/all_sdf.ok clean: rm -rf build build/run.ok: bash runme.sh + touch build/run.ok build/fixup_timings: build/run.ok python3 fixup_timings_txt.py --txtin build/bel_timings.txt --txtout build/bel_timings.txt --site RAMBFIFO36E1 --slice BRAM_L --type timings @@ -21,3 +27,14 @@ build/sdf.ok: build/bel_timings.json python3 ${XRAY_UTILS_DIR}/makesdf.py --json=${PWD}/build/bel_timings.json --sdf=${PWD}/build touch build/sdf.ok +build/slicem.sdf: build/sdf.ok + python3 ${XRAY_UTILS_DIR}/sdfmerge.py --sdfs $(SLICEL_SDFS) --site SLICEM --out build/slicem.sdf + +build/slicel.sdf: build/sdf.ok + python3 ${XRAY_UTILS_DIR}/sdfmerge.py --sdfs $(SLICEL_SDFS) --site SLICEL --out build/slicel.sdf + +build/carry4_slicem.sdf: build/slicem.sdf + python3 carry4delays.py --input build/slicem.sdf --output build/carry4_slicem.sdf + +build/carry4_slicel.sdf: build/slicel.sdf + python3 carry4delays.py --input build/slicel.sdf --output build/carry4_slicel.sdf diff --git a/utils/carry4delays.py b/fuzzers/007-timing/bel/carry4delays.py similarity index 100% rename from utils/carry4delays.py rename to fuzzers/007-timing/bel/carry4delays.py diff --git a/fuzzers/007-timing/routing-bels/Makefile b/fuzzers/007-timing/routing-bels/Makefile index ed041a1a..8cf875de 100644 --- a/fuzzers/007-timing/routing-bels/Makefile +++ b/fuzzers/007-timing/routing-bels/Makefile @@ -1,4 +1,5 @@ all: build/slicel.sdf build/slicem.sdf + touch build/sdf.ok clean: rm -rf build From 2b93883d78f2dd9e542785257baaf1f37fabbeb5 Mon Sep 17 00:00:00 2001 From: Karol Gugala Date: Tue, 23 Jul 2019 14:50:10 +0200 Subject: [PATCH 4/4] fuzzers: 007: run make format Signed-off-by: Karol Gugala --- fuzzers/007-timing/bel/carry4delays.py | 173 +++++++++++++------------ 1 file changed, 92 insertions(+), 81 deletions(-) diff --git a/fuzzers/007-timing/bel/carry4delays.py b/fuzzers/007-timing/bel/carry4delays.py index a847424e..a8b78ef4 100755 --- a/fuzzers/007-timing/bel/carry4delays.py +++ b/fuzzers/007-timing/bel/carry4delays.py @@ -4,112 +4,123 @@ import sys, os, argparse from sdf_timing import sdfparse model_carry4 = { - 'type' : 'CARRY4', - - 'srcs' : { 'O5', '?X', '?X_LFF', '?X_LBOTH' }, - 'out' : { 'CO0', 'CO1', 'CO2', 'CO3', 'O0', 'O1', 'O2', 'O3' }, - - 'mux' : '?CY0', - - 'pins' : { - 'DI0' : { 'type' : 'A' }, - 'DI1' : { 'type' : 'B' }, - 'DI2' : { 'type' : 'C' }, - 'DI3' : { 'type' : 'D' }, - }, + 'type': 'CARRY4', + 'srcs': {'O5', '?X', '?X_LFF', '?X_LBOTH'}, + 'out': {'CO0', 'CO1', 'CO2', 'CO3', 'O0', 'O1', 'O2', 'O3'}, + 'mux': '?CY0', + 'pins': { + 'DI0': { + 'type': 'A' + }, + 'DI1': { + 'type': 'B' + }, + 'DI2': { + 'type': 'C' + }, + 'DI3': { + 'type': 'D' + }, + }, } + def compute_delays(model, fin_name, fout_name): - data = '' - with open(fin_name, 'r') as f: - data = f.read() - sdf = sdfparse.parse(data) + data = '' + with open(fin_name, 'r') as f: + data = f.read() + sdf = sdfparse.parse(data) - keys = sdf['cells'][model['type']].keys() - if 'slicel'.upper() in keys: - sl = 'L' - elif 'slicem'.upper() in keys: - sl = 'M' - else: - print("Unknown slice type!") - return ; + keys = sdf['cells'][model['type']].keys() + if 'slicel'.upper() in keys: + sl = 'L' + elif 'slicem'.upper() in keys: + sl = 'M' + else: + print("Unknown slice type!") + return - nsdf = dict() - nsdf['header'] = sdf['header'] - nsdf['cells'] = dict() - nsdf['cells']['ROUTING_BEL'] = dict() + nsdf = dict() + nsdf['header'] = sdf['header'] + nsdf['cells'] = dict() + nsdf['cells']['ROUTING_BEL'] = dict() - for p in model['pins']: - pin = model['pins'][p] + for p in model['pins']: + pin = model['pins'][p] - outs = dict() - for o in model['out']: - outs[o] = [] + outs = dict() + for o in model['out']: + outs[o] = [] - res = [] - cells = sdf['cells'] + res = [] + cells = sdf['cells'] - for src in model['srcs']: - source = src.replace('?', pin['type']) + for src in model['srcs']: + source = src.replace('?', pin['type']) - _type = model['type'] + '_' + source + _type = model['type'] + '_' + source - if _type in cells.keys(): - cell = cells[_type]["SLICE" + sl.upper()] + if _type in cells.keys(): + cell = cells[_type]["SLICE" + sl.upper()] - for o in model['out']: - iopath = 'iopath_' + p + '_' + o + for o in model['out']: + iopath = 'iopath_' + p + '_' + o - if iopath in cell.keys(): - delay = cell[iopath]['delay_paths']['slow']['max'] - outs[o].append(delay) + if iopath in cell.keys(): + delay = cell[iopath]['delay_paths']['slow']['max'] + outs[o].append(delay) - for src in outs: - s = sorted(outs[src]) - for val in s: - res.append(val - s[0]) + for src in outs: + s = sorted(outs[src]) + for val in s: + res.append(val - s[0]) - delay = round(max(res), 3) + delay = round(max(res), 3) - muxname = str(model['mux'].replace('?', pin['type'])) - rbel = nsdf['cells']['ROUTING_BEL']['SLICE' + sl.upper() + '/' + muxname] = dict() + muxname = str(model['mux'].replace('?', pin['type'])) + rbel = nsdf['cells']['ROUTING_BEL']['SLICE' + sl.upper() + '/' + + muxname] = dict() - iname = 'interconnect_' + pin['type'].lower() + 'x_' + str(p).lower() + iname = 'interconnect_' + pin['type'].lower() + 'x_' + str(p).lower() - rbel[iname] = dict() - rbel[iname]['is_absolute'] = True - rbel[iname]['to_pin_edge'] = None - rbel[iname]['from_pin_edge'] = None - rbel[iname]['from_pin'] = pin['type'].lower() + 'x' - rbel[iname]['to_pin'] = str(p).lower() - rbel[iname]['type'] = 'interconnect' - rbel[iname]['is_timing_check'] = False - rbel[iname]['is_timing_env'] = False + rbel[iname] = dict() + rbel[iname]['is_absolute'] = True + rbel[iname]['to_pin_edge'] = None + rbel[iname]['from_pin_edge'] = None + rbel[iname]['from_pin'] = pin['type'].lower() + 'x' + rbel[iname]['to_pin'] = str(p).lower() + rbel[iname]['type'] = 'interconnect' + rbel[iname]['is_timing_check'] = False + rbel[iname]['is_timing_env'] = False - paths = rbel[iname]['delay_paths'] = dict() + paths = rbel[iname]['delay_paths'] = dict() - paths['slow'] = dict() - paths['slow']['min'] = delay - paths['slow']['avg'] = None - paths['slow']['max'] = delay + paths['slow'] = dict() + paths['slow']['min'] = delay + paths['slow']['avg'] = None + paths['slow']['max'] = delay - paths['fast'] = dict() - paths['fast']['min'] = delay - paths['fast']['avg'] = None - paths['fast']['max'] = delay + paths['fast'] = dict() + paths['fast']['min'] = delay + paths['fast']['avg'] = None + paths['fast']['max'] = delay + # emit new sdfs + with open(fout_name, 'w') as f: + f.write(sdfparse.emit(nsdf)) - # emit new sdfs - with open(fout_name, 'w') as f: - f.write(sdfparse.emit(nsdf)) def main(argv): - parser = argparse.ArgumentParser(description='Tool for computing CARRY4 muxes delays') - parser.add_argument('--input', dest='inputfile', action='store', help='Input file') - parser.add_argument('--output', dest='outputfile', action='store', help='Output file') - args = parser.parse_args(argv[1:]) + parser = argparse.ArgumentParser( + description='Tool for computing CARRY4 muxes delays') + parser.add_argument( + '--input', dest='inputfile', action='store', help='Input file') + parser.add_argument( + '--output', dest='outputfile', action='store', help='Output file') + args = parser.parse_args(argv[1:]) + + compute_delays(model_carry4, args.inputfile, args.outputfile) - compute_delays(model_carry4, args.inputfile, args.outputfile) if __name__ == "__main__": - main(sys.argv) + main(sys.argv)