diff --git a/minitests/iostandard/dump_iobs.tcl b/minitests/iostandard/dump_iobs.tcl index 05767626..c00cfe09 100644 --- a/minitests/iostandard/dump_iobs.tcl +++ b/minitests/iostandard/dump_iobs.tcl @@ -24,8 +24,8 @@ proc dump_iobs {file_name} { close $fp } -create_project -force -in_memory -name dump_iobs -part $::env(VIVADO_PART) +create_project -force -in_memory -name dump_iobs -part $::env(PART) set_property design_mode PinPlanning [current_fileset] open_io_design -name io_1 -dump_iobs "iobs-$::env(VIVADO_PART).csv" +dump_iobs "iobs-$::env(PART).csv" diff --git a/minitests/iostandard/features/Makefile b/minitests/iostandard/features/Makefile index 35e393b1..d8bf76b0 100644 --- a/minitests/iostandard/features/Makefile +++ b/minitests/iostandard/features/Makefile @@ -1,5 +1,4 @@ -PART?=xc7a50tfgg484-1 -VIVADO_PART?=$(PART) +PART?=${XRAY_PART} BIT2FASM_ARGS= --part "$(XRAY_DIR)/database/$(XRAY_DATABASE)/$(PART)" --verbose @@ -33,20 +32,20 @@ clean: @rm -rf features.csv @rm -rf results.json @rm -rf unknown_bits.jl - @rm -rf iobs-$(VIVADO_PART).csv + @rm -rf iobs-$(PART).csv -iobs-$(VIVADO_PART).csv: ../dump_iobs.tcl - env VIVADO_PART=$(VIVADO_PART) $(XRAY_VIVADO) -mode batch -source ../dump_iobs.tcl -nojournal -log dump_iobs.log +iobs-$(PART).csv: ../dump_iobs.tcl + env PART=$(PART) $(XRAY_VIVADO) -mode batch -source ../dump_iobs.tcl -nojournal -log dump_iobs.log -designs.ok: iobs-$(VIVADO_PART).csv generate.py - env VIVADO_PART=$(VIVADO_PART) python3 ./generate.py +designs.ok: iobs-$(PART).csv generate.py + env PART=$(PART) python3 ./generate.py touch designs.ok designs: designs.ok %.bit: %.v designs.ok ../syn+par.tcl mkdir -p build-$(basename $@) - cd build-$(basename $@) && env PROJECT_NAME=$(basename $@) VIVADO_PART=${VIVADO_PART} $(XRAY_VIVADO) -mode batch -source ../../syn+par.tcl -nojournal -log ../$@.log + cd build-$(basename $@) && env PROJECT_NAME=$(basename $@) PART=${PART} $(XRAY_VIVADO) -mode batch -source ../../syn+par.tcl -nojournal -log ../$@.log rm -rf *.backup.log %.fasm: %.bit diff --git a/minitests/iostandard/features/generate.py b/minitests/iostandard/features/generate.py index 33d87101..669c7737 100644 --- a/minitests/iostandard/features/generate.py +++ b/minitests/iostandard/features/generate.py @@ -26,7 +26,6 @@ def load_iob_sites(file_name): for site_data in data: iob_sites[site_data["clock_region"]].append(site_data) - print(data) return iob_sites @@ -40,6 +39,7 @@ IOBUF_NOT_ALLOWED = [ DIFF_MAP = { 'SSTL135': 'DIFF_SSTL135', + 'SSTL15': 'DIFF_SSTL15', } @@ -56,10 +56,10 @@ def gen_iosettings(): 'LVCMOS33', 'LVTTL', 'SSTL135', + 'SSTL15', # Those are available but not currently fuzzed. # 'SSTL135_R', - # 'SSTL15', # 'SSTL15_R', # 'SSTL18_I', # 'SSTL18_II', @@ -111,7 +111,7 @@ def run(): """ # Load IOB data - iob_sites = load_iob_sites("iobs-{}.csv".format(os.getenv("VIVADO_PART"))) + iob_sites = load_iob_sites("iobs-{}.csv".format(os.getenv("PART"))) # Generate IOB site to package pin map and *M site to *S site map. site_to_pkg_pin = {} @@ -135,6 +135,8 @@ def run(): design_index = 0 while True: + print("Design #{}".format(design_index)) + num_inp = 0 num_out = 0 num_ino = 0 @@ -194,7 +196,7 @@ def run(): "output": used_sites[2:4], "inout": used_sites[4:5], }) - print(region, iosettings) + print("", region, iosettings) # No more if len(region_data) == 0: diff --git a/minitests/iostandard/syn+par.tcl b/minitests/iostandard/syn+par.tcl index e75a63c8..363d760d 100644 --- a/minitests/iostandard/syn+par.tcl +++ b/minitests/iostandard/syn+par.tcl @@ -1,4 +1,4 @@ -create_project -force -name $env(PROJECT_NAME) -part $env(VIVADO_PART) +create_project -force -name $env(PROJECT_NAME) -part $env(PART) set_property SEVERITY {Warning} [get_drc_checks NSTD-1] set_property SEVERITY {Warning} [get_drc_checks UCIO-1]