From e096d9c17240fa7a1ae82eb0e3ffcb45af9bca36 Mon Sep 17 00:00:00 2001 From: Tomasz Michalak Date: Thu, 27 Jun 2019 14:14:07 +0200 Subject: [PATCH] 005-tilegrid: Add HCLK_IOI base addresses calculation Signed-off-by: Tomasz Michalak --- fuzzers/005-tilegrid/Makefile | 5 ++ fuzzers/005-tilegrid/add_tdb.py | 1 + fuzzers/005-tilegrid/generate_full.py | 17 +++--- fuzzers/005-tilegrid/hclk_ioi/Makefile | 4 ++ fuzzers/005-tilegrid/hclk_ioi/generate.tcl | 3 ++ fuzzers/005-tilegrid/hclk_ioi/top.py | 63 ++++++++++++++++++++++ 6 files changed, 87 insertions(+), 6 deletions(-) create mode 100644 fuzzers/005-tilegrid/hclk_ioi/Makefile create mode 100644 fuzzers/005-tilegrid/hclk_ioi/generate.tcl create mode 100644 fuzzers/005-tilegrid/hclk_ioi/top.py diff --git a/fuzzers/005-tilegrid/Makefile b/fuzzers/005-tilegrid/Makefile index 0d0b31ba..098d9e47 100644 --- a/fuzzers/005-tilegrid/Makefile +++ b/fuzzers/005-tilegrid/Makefile @@ -18,6 +18,7 @@ TILEGRID_TDB_DEPENDENCIES += monitor_int/build/segbits_tilegrid.tdb TILEGRID_TDB_DEPENDENCIES += clk_hrow/build/segbits_tilegrid.tdb TILEGRID_TDB_DEPENDENCIES += clk_bufg/build/segbits_tilegrid.tdb TILEGRID_TDB_DEPENDENCIES += hclk_cmt/build/segbits_tilegrid.tdb +TILEGRID_TDB_DEPENDENCIES += hclk_ioi/build/segbits_tilegrid.tdb GENERATE_FULL_ARGS= ifeq (${XRAY_DATABASE}, zynq7) @@ -116,6 +117,9 @@ clk_bufg/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json hclk_cmt/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json cd hclk_cmt && $(MAKE) +hclk_ioi/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json + cd hclk_ioi && $(MAKE) + build/tilegrid_tdb.json: add_tdb.py $(TILEGRID_TDB_DEPENDENCIES) python3 add_tdb.py \ --fn-in build/basicdb/tilegrid.json \ @@ -154,6 +158,7 @@ clean: cd clk_hrow && $(MAKE) clean cd clk_bufg && $(MAKE) clean cd hclk_cmt && $(MAKE) clean + cd hclk_ioi && $(MAKE) clean .PHONY: database pushdb clean run diff --git a/fuzzers/005-tilegrid/add_tdb.py b/fuzzers/005-tilegrid/add_tdb.py index b893bd30..9f3fbec6 100644 --- a/fuzzers/005-tilegrid/add_tdb.py +++ b/fuzzers/005-tilegrid/add_tdb.py @@ -89,6 +89,7 @@ def run(fn_in, fn_out, verbose=False): ("clk_hrow/build/segbits_tilegrid.tdb", 30, 18), ("clk_bufg/build/segbits_tilegrid.tdb", 30, 8), ("hclk_cmt/build/segbits_tilegrid.tdb", 30, 10), + ("hclk_ioi/build/segbits_tilegrid.tdb", 42, 10), ("clb_int/build/segbits_tilegrid.tdb", int_frames, int_words), ("iob_int/build/segbits_tilegrid.tdb", int_frames, int_words), ("bram_int/build/segbits_tilegrid.tdb", int_frames, int_words), diff --git a/fuzzers/005-tilegrid/generate_full.py b/fuzzers/005-tilegrid/generate_full.py index ee8d1d78..1afa3bec 100644 --- a/fuzzers/005-tilegrid/generate_full.py +++ b/fuzzers/005-tilegrid/generate_full.py @@ -356,12 +356,17 @@ def propagate_IOI_SING(database, tiles_by_grid): break if 'CLB_IO_CLK' in database[tile]['bits']: - assert bits['baseaddr'] == database[tile]['bits'][ - 'CLB_IO_CLK']['baseaddr'] - assert bits['frames'] == database[tile]['bits']['CLB_IO_CLK'][ - 'frames'] - assert bits['words'] == database[tile]['bits']['CLB_IO_CLK'][ - 'words'] + if tile.startswith("LIOI") or tile.startswith("RIOI"): + assert bits['baseaddr'] == database[tile]['bits'][ + 'CLB_IO_CLK']['baseaddr'] + assert bits['frames'] == database[tile]['bits'][ + 'CLB_IO_CLK']['frames'], "{}:{} == {}".format( + tile, bits['frames'], + database[tile]['bits']['CLB_IO_CLK']['frames']) + assert bits['words'] == database[tile]['bits'][ + 'CLB_IO_CLK']['words'], "{}: {} != {}".format( + tile, bits['words'], + database[tile]['bits']['CLB_IO_CLK']['words']) top_tile = tile diff --git a/fuzzers/005-tilegrid/hclk_ioi/Makefile b/fuzzers/005-tilegrid/hclk_ioi/Makefile new file mode 100644 index 00000000..f37874d8 --- /dev/null +++ b/fuzzers/005-tilegrid/hclk_ioi/Makefile @@ -0,0 +1,4 @@ +N ?= 5 +GENERATE_ARGS?="--oneval 1 --design params.csv --dword 5 --dframe 21" +include ../fuzzaddr/common.mk + diff --git a/fuzzers/005-tilegrid/hclk_ioi/generate.tcl b/fuzzers/005-tilegrid/hclk_ioi/generate.tcl new file mode 100644 index 00000000..5a69791f --- /dev/null +++ b/fuzzers/005-tilegrid/hclk_ioi/generate.tcl @@ -0,0 +1,3 @@ +source "$::env(XRAY_DIR)/utils/utils.tcl" + +generate_top diff --git a/fuzzers/005-tilegrid/hclk_ioi/top.py b/fuzzers/005-tilegrid/hclk_ioi/top.py new file mode 100644 index 00000000..9d60542c --- /dev/null +++ b/fuzzers/005-tilegrid/hclk_ioi/top.py @@ -0,0 +1,63 @@ +import os +import random +random.seed(int(os.getenv("SEED"), 16)) +from prjxray import util +from prjxray.db import Database + + +def gen_sites(): + db = Database(util.get_db_root()) + grid = db.grid() + for tile_name in sorted(grid.tiles()): + loc = grid.loc_of_tilename(tile_name) + gridinfo = grid.gridinfo_at_loc(loc) + sites = [] + for site, site_type in gridinfo.sites.items(): + if site_type == 'BUFR': + sites.append(site) + + if sites: + yield tile_name, sorted(sites) + + +def write_params(params): + pinstr = 'tile,val,site\n' + for tile, (site, val) in sorted(params.items()): + pinstr += '%s,%s,%s\n' % (tile, val, site) + open('params.csv', 'w').write(pinstr) + + +def run(): + print(''' +module top(); + ''') + + params = {} + + sites = list(gen_sites()) + for (tile_name, sites), isone in zip(sites, + util.gen_fuzz_states(len(sites))): + site_name = sites[0] + params[tile_name] = (site_name, isone) + + print( + ''' + wire clk_{site}; + BUFMRCE buf_{site} ( + .O(clk_{site}) + ); + + (* KEEP, DONT_TOUCH, LOC = "{site}" *) + BUFR #( + .BUFR_DIVIDE("{divide}") + ) bufr_{site} ( + .I(clk_{site}) + ); +'''.format(site=site_name, divide="2" if isone else "1")) + + print("endmodule") + write_params(params) + + +if __name__ == '__main__': + run()