diff --git a/minitests/srl/Makefile b/minitests/srl/Makefile
index c1d730c9..0e465ae7 100644
--- a/minitests/srl/Makefile
+++ b/minitests/srl/Makefile
@@ -30,7 +30,7 @@ $(YOSYS):
 
 ifeq ($(SYNTH), yosys)
 %.edif: %.v $(YOSYS)
-	$(YOSYS) -p "read_verilog $< ; synth_xilinx -flatten -nosrl -edif $@"  -l $@.log
+	$(YOSYS) -p "read_verilog $< ; synth_xilinx -flatten -nosrl; write_edif -pvector bra -attrprop $@"  -l $@.log
 
 else ifeq ($(SYNTH), vivado)
 %.edif: %.v $(YOSYS)