diff --git a/minitests/bram_fixed/.gitignore b/minitests/bram_fixed/.gitignore new file mode 100644 index 00000000..4e8ac423 --- /dev/null +++ b/minitests/bram_fixed/.gitignore @@ -0,0 +1,10 @@ +/.Xil/ +/design_*/ +/design_*.dcp +/design_*.bit +/design_*.bits +/design_*.segd +/fixed.xdc +/usage_statistics_webtalk.* +/vivado* +/*.seg diff --git a/minitests/bram_fixed/Makefile b/minitests/bram_fixed/Makefile new file mode 100644 index 00000000..774832ac --- /dev/null +++ b/minitests/bram_fixed/Makefile @@ -0,0 +1,8 @@ +all: + bash runme.sh + +clean: + rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit design.txt .Xil design_* *.xdc + +.PHONY: all clean + diff --git a/minitests/bram_fixed/README.txt b/minitests/bram_fixed/README.txt new file mode 100644 index 00000000..0c58a42d --- /dev/null +++ b/minitests/bram_fixed/README.txt @@ -0,0 +1,72 @@ +Some quick tests to understand BRAM configuration +Written before segments were fully developed, so this preliminary writeup is a bit coarse + +Basically all the RAMB36 configuration tests show two bit flips +This indicates that RAMB18 and RAMB36 are fully indepdnently configurable +SDP vs TDP was a lot more complicated, needs more investigation + +Note: tested on a7 after sourcing env.sh. k7 would likely also work + + +Raw data + +set_property LOC RAMB36_X0Y21 [get_cells ram] + +design_CLKARDCLK_INV.bits + < bit_0002031b_013_11 + < bit_0002031b_016_21 + +design_CLKBWRCLK_INV.bits + < bit_0002031b_013_13 + < bit_0002031b_016_19 + +design_CLKARDCLK_INV.bits + < bit_0002031b_013_11 + < bit_0002031b_016_21 + +design_CLKBWRCLK_INV.bits + < bit_0002031b_013_13 + < bit_0002031b_016_19 + +design_ENARDEN_INV.bits + < bit_0002031b_013_16 + < bit_0002031b_016_16 + +design_ENBWREN_INV.bits + < bit_0002031b_013_19 + < bit_0002031b_016_13 + +design_RSTRAMARSTRAM_INV.bits + < bit_0002031b_013_20 + < bit_0002031b_016_12 + +design_RSTRAMB_INV.bits + < bit_0002031b_013_21 + < bit_0002031b_016_11 + +design_RSTREGARSTREG_INV.bits + < bit_0002031b_013_24 + < bit_0002031b_016_08 + +design_RSTREGB_INV.bits + < bit_0002031b_013_27 + < bit_0002031b_016_05 + +design_WRITE_MODE_A_NC.bits + > bit_0002031b_012_00 + > bit_0002031b_018_00 + +design_WRITE_MODE_A_RF.bits + > bit_0002031b_011_24 + > bit_0002031b_018_08 + +TDP vs SDP probably does routing changes, leading to a lot of bit flips +design_RAM_MODE_SDP.bits + > bit_00020282_010_05 + > bit_00020284_010_06 + < bit_00020289_010_04 + < bit_0002028f_010_04 + > bit_00020300_014_11 + < bit_00020300_016_27 + > bit_00020300_016_25 +...etc diff --git a/minitests/bram_fixed/env.sh b/minitests/bram_fixed/env.sh new file mode 100644 index 00000000..9d56a031 --- /dev/null +++ b/minitests/bram_fixed/env.sh @@ -0,0 +1,4 @@ +#!/bin/bash +export XRAY_ROI=SLICE_X6Y100:SLICE_X27Y149 +export XRAY_ROI_FRAMES=0x00000000:0xFFFFFFFF + diff --git a/minitests/bram_fixed/runme.sh b/minitests/bram_fixed/runme.sh new file mode 100755 index 00000000..bc3ed9a4 --- /dev/null +++ b/minitests/bram_fixed/runme.sh @@ -0,0 +1,13 @@ +#!/bin/bash + +set -ex +vivado -mode batch -source runme.tcl +for bit in $(ls *.bit); do + ${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o ${bit}s -z -y $bit +done + +for b in $(ls *.bits); do + echo + echo $b + diff design_ref.bits $b |grep '[<>]' |sed 's/^/ /' +done diff --git a/minitests/bram_fixed/runme.tcl b/minitests/bram_fixed/runme.tcl new file mode 100644 index 00000000..a7d1b27b --- /dev/null +++ b/minitests/bram_fixed/runme.tcl @@ -0,0 +1,61 @@ + +create_project -force -part $::env(XRAY_PART) design_fdre design_fdre +read_verilog top_ref.v + +synth_design -top top + +set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports clk] +set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports stb] +set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports di] +set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do] + +set_property CFGBVS VCCO [current_design] +set_property CONFIG_VOLTAGE 3.3 [current_design] +set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design] +set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF] + +place_design + +set_property LOC RAMB36_X0Y21 [get_cells ram] + +route_design + +#set_property IS_ROUTE_FIXED 1 [get_nets -hierarchical] +set_property IS_LOC_FIXED 1 [get_cells -hierarchical] +set_property IS_BEL_FIXED 1 [get_cells -hierarchical] + +write_xdc -force fixed.xdc + +write_checkpoint -force design_ref.dcp +write_bitstream -force design_ref.bit + +close_project + +foreach variant {CLKARDCLK_INV CLKBWRCLK_INV ENARDEN_INV ENBWREN_INV RSTRAMARSTRAM_INV RSTRAMB_INV RSTREGARSTREG_INV RSTREGB_INV RAM_MODE_SDP WRITE_MODE_A_NC WRITE_MODE_A_RF} { + create_project -force -part $::env(XRAY_PART) design_${variant} design_${variant} + read_verilog top_${variant}.v + read_xdc fixed.xdc + + synth_design -top top + + if {0} { + set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports clk] + set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports stb] + set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports di] + set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do] + + set_property CFGBVS VCCO [current_design] + set_property CONFIG_VOLTAGE 3.3 [current_design] + set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design] + set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF] + } + + place_design + route_design + + write_checkpoint -force design_${variant}.dcp + write_bitstream -force design_${variant}.bit + + close_project +} + diff --git a/minitests/bram_fixed/top_CLKARDCLK_INV.v b/minitests/bram_fixed/top_CLKARDCLK_INV.v new file mode 100644 index 00000000..cfb6e5d0 --- /dev/null +++ b/minitests/bram_fixed/top_CLKARDCLK_INV.v @@ -0,0 +1,213 @@ +module top(input clk, stb, di, output do); + localparam integer DIN_N = 8; + localparam integer DOUT_N = 8; + + reg [DIN_N-1:0] din; + wire [DOUT_N-1:0] dout; + + reg [DIN_N-1:0] din_shr; + reg [DOUT_N-1:0] dout_shr; + + always @(posedge clk) begin + din_shr <= {din_shr, di}; + dout_shr <= {dout_shr, din_shr[DIN_N-1]}; + if (stb) begin + din <= din_shr; + dout_shr <= dout; + end + end + + assign do = dout_shr[DOUT_N-1]; + + + + + + parameter INIT = 256'h0000000000000000000000000000000000000000000000000000000000000000; + + //(* LOC=LOC, BEL=BEL, KEEP, DONT_TOUCH *) + (* KEEP, DONT_TOUCH *) + RAMB36E1 #( + .INITP_00(INIT), + .INITP_01(INIT), + .INITP_02(INIT), + .INITP_03(INIT), + .INITP_04(INIT), + .INITP_05(INIT), + .INITP_06(INIT), + .INITP_07(INIT), + .INITP_08(INIT), + .INITP_09(INIT), + .INITP_0A(INIT), + .INITP_0B(INIT), + .INITP_0C(INIT), + .INITP_0D(INIT), + .INITP_0E(INIT), + .INITP_0F(INIT), + + .INIT_00(INIT), + .INIT_01(INIT), + .INIT_02(INIT), + .INIT_03(INIT), + .INIT_04(INIT), + .INIT_05(INIT), + .INIT_06(INIT), + .INIT_07(INIT), + .INIT_08(INIT), + .INIT_09(INIT), + .INIT_0A(INIT), + .INIT_0B(INIT), + .INIT_0C(INIT), + .INIT_0D(INIT), + .INIT_0E(INIT), + .INIT_0F(INIT), + .INIT_10(INIT), + .INIT_11(INIT), + .INIT_12(INIT), + .INIT_13(INIT), + .INIT_14(INIT), + .INIT_15(INIT), + .INIT_16(INIT), + .INIT_17(INIT), + .INIT_18(INIT), + .INIT_19(INIT), + .INIT_1A(INIT), + .INIT_1B(INIT), + .INIT_1C(INIT), + .INIT_1D(INIT), + .INIT_1E(INIT), + .INIT_1F(INIT), + .INIT_20(INIT), + .INIT_21(INIT), + .INIT_22(INIT), + .INIT_23(INIT), + .INIT_24(INIT), + .INIT_25(INIT), + .INIT_26(INIT), + .INIT_27(INIT), + .INIT_28(INIT), + .INIT_29(INIT), + .INIT_2A(INIT), + .INIT_2B(INIT), + .INIT_2C(INIT), + .INIT_2D(INIT), + .INIT_2E(INIT), + .INIT_2F(INIT), + .INIT_30(INIT), + .INIT_31(INIT), + .INIT_32(INIT), + .INIT_33(INIT), + .INIT_34(INIT), + .INIT_35(INIT), + .INIT_36(INIT), + .INIT_37(INIT), + .INIT_38(INIT), + .INIT_39(INIT), + .INIT_3A(INIT), + .INIT_3B(INIT), + .INIT_3C(INIT), + .INIT_3D(INIT), + .INIT_3E(INIT), + .INIT_3F(INIT), + + .INIT_40(INIT), + .INIT_41(INIT), + .INIT_42(INIT), + .INIT_43(INIT), + .INIT_44(INIT), + .INIT_45(INIT), + .INIT_46(INIT), + .INIT_47(INIT), + .INIT_48(INIT), + .INIT_49(INIT), + .INIT_4A(INIT), + .INIT_4B(INIT), + .INIT_4C(INIT), + .INIT_4D(INIT), + .INIT_4E(INIT), + .INIT_4F(INIT), + .INIT_50(INIT), + .INIT_51(INIT), + .INIT_52(INIT), + .INIT_53(INIT), + .INIT_54(INIT), + .INIT_55(INIT), + .INIT_56(INIT), + .INIT_57(INIT), + .INIT_58(INIT), + .INIT_59(INIT), + .INIT_5A(INIT), + .INIT_5B(INIT), + .INIT_5C(INIT), + .INIT_5D(INIT), + .INIT_5E(INIT), + .INIT_5F(INIT), + .INIT_60(INIT), + .INIT_61(INIT), + .INIT_62(INIT), + .INIT_63(INIT), + .INIT_64(INIT), + .INIT_65(INIT), + .INIT_66(INIT), + .INIT_67(INIT), + .INIT_68(INIT), + .INIT_69(INIT), + .INIT_6A(INIT), + .INIT_6B(INIT), + .INIT_6C(INIT), + .INIT_6D(INIT), + .INIT_6E(INIT), + .INIT_6F(INIT), + .INIT_70(INIT), + .INIT_71(INIT), + .INIT_72(INIT), + .INIT_73(INIT), + .INIT_74(INIT), + .INIT_75(INIT), + .INIT_76(INIT), + .INIT_77(INIT), + .INIT_78(INIT), + .INIT_79(INIT), + .INIT_7A(INIT), + .INIT_7B(INIT), + .INIT_7C(INIT), + .INIT_7D(INIT), + .INIT_7E(INIT), + .INIT_7F(INIT), + + .IS_CLKARDCLK_INVERTED(1'b1), + .IS_CLKBWRCLK_INVERTED(1'b0), + .IS_ENARDEN_INVERTED(1'b0), + .IS_ENBWREN_INVERTED(1'b0), + .IS_RSTRAMARSTRAM_INVERTED(1'b0), + .IS_RSTRAMB_INVERTED(1'b0), + .IS_RSTREGARSTREG_INVERTED(1'b0), + .IS_RSTREGB_INVERTED(1'b0), + .RAM_MODE("TDP"), + .WRITE_MODE_A("WRITE_FIRST"), + .WRITE_MODE_B("WRITE_FIRST") + ) ram ( + .CLKARDCLK(din[0]), + .CLKBWRCLK(din[1]), + .ENARDEN(din[2]), + .ENBWREN(din[3]), + .REGCEAREGCE(din[4]), + .REGCEB(din[5]), + .RSTRAMARSTRAM(din[6]), + .RSTRAMB(din[7]), + .RSTREGARSTREG(din[0]), + .RSTREGB(din[1]), + .ADDRARDADDR(din[2]), + .ADDRBWRADDR(din[3]), + .DIADI(din[4]), + .DIBDI(din[5]), + .DIPADIP(din[6]), + .DIPBDIP(din[7]), + .WEA(din[0]), + .WEBWE(din[1]), + .DOADO(dout[0]), + .DOBDO(dout[1]), + .DOPADOP(dout[2]), + .DOPBDOP(dout[3])); +endmodule + diff --git a/minitests/bram_fixed/top_CLKBWRCLK_INV.v b/minitests/bram_fixed/top_CLKBWRCLK_INV.v new file mode 100644 index 00000000..c12c7892 --- /dev/null +++ b/minitests/bram_fixed/top_CLKBWRCLK_INV.v @@ -0,0 +1,213 @@ +module top(input clk, stb, di, output do); + localparam integer DIN_N = 8; + localparam integer DOUT_N = 8; + + reg [DIN_N-1:0] din; + wire [DOUT_N-1:0] dout; + + reg [DIN_N-1:0] din_shr; + reg [DOUT_N-1:0] dout_shr; + + always @(posedge clk) begin + din_shr <= {din_shr, di}; + dout_shr <= {dout_shr, din_shr[DIN_N-1]}; + if (stb) begin + din <= din_shr; + dout_shr <= dout; + end + end + + assign do = dout_shr[DOUT_N-1]; + + + + + + parameter INIT = 256'h0000000000000000000000000000000000000000000000000000000000000000; + + //(* LOC=LOC, BEL=BEL, KEEP, DONT_TOUCH *) + (* KEEP, DONT_TOUCH *) + RAMB36E1 #( + .INITP_00(INIT), + .INITP_01(INIT), + .INITP_02(INIT), + .INITP_03(INIT), + .INITP_04(INIT), + .INITP_05(INIT), + .INITP_06(INIT), + .INITP_07(INIT), + .INITP_08(INIT), + .INITP_09(INIT), + .INITP_0A(INIT), + .INITP_0B(INIT), + .INITP_0C(INIT), + .INITP_0D(INIT), + .INITP_0E(INIT), + .INITP_0F(INIT), + + .INIT_00(INIT), + .INIT_01(INIT), + .INIT_02(INIT), + .INIT_03(INIT), + .INIT_04(INIT), + .INIT_05(INIT), + .INIT_06(INIT), + .INIT_07(INIT), + .INIT_08(INIT), + .INIT_09(INIT), + .INIT_0A(INIT), + .INIT_0B(INIT), + .INIT_0C(INIT), + .INIT_0D(INIT), + .INIT_0E(INIT), + .INIT_0F(INIT), + .INIT_10(INIT), + .INIT_11(INIT), + .INIT_12(INIT), + .INIT_13(INIT), + .INIT_14(INIT), + .INIT_15(INIT), + .INIT_16(INIT), + .INIT_17(INIT), + .INIT_18(INIT), + .INIT_19(INIT), + .INIT_1A(INIT), + .INIT_1B(INIT), + .INIT_1C(INIT), + .INIT_1D(INIT), + .INIT_1E(INIT), + .INIT_1F(INIT), + .INIT_20(INIT), + .INIT_21(INIT), + .INIT_22(INIT), + .INIT_23(INIT), + .INIT_24(INIT), + .INIT_25(INIT), + .INIT_26(INIT), + .INIT_27(INIT), + .INIT_28(INIT), + .INIT_29(INIT), + .INIT_2A(INIT), + .INIT_2B(INIT), + .INIT_2C(INIT), + .INIT_2D(INIT), + .INIT_2E(INIT), + .INIT_2F(INIT), + .INIT_30(INIT), + .INIT_31(INIT), + .INIT_32(INIT), + .INIT_33(INIT), + .INIT_34(INIT), + .INIT_35(INIT), + .INIT_36(INIT), + .INIT_37(INIT), + .INIT_38(INIT), + .INIT_39(INIT), + .INIT_3A(INIT), + .INIT_3B(INIT), + .INIT_3C(INIT), + .INIT_3D(INIT), + .INIT_3E(INIT), + .INIT_3F(INIT), + + .INIT_40(INIT), + .INIT_41(INIT), + .INIT_42(INIT), + .INIT_43(INIT), + .INIT_44(INIT), + .INIT_45(INIT), + .INIT_46(INIT), + .INIT_47(INIT), + .INIT_48(INIT), + .INIT_49(INIT), + .INIT_4A(INIT), + .INIT_4B(INIT), + .INIT_4C(INIT), + .INIT_4D(INIT), + .INIT_4E(INIT), + .INIT_4F(INIT), + .INIT_50(INIT), + .INIT_51(INIT), + .INIT_52(INIT), + .INIT_53(INIT), + .INIT_54(INIT), + .INIT_55(INIT), + .INIT_56(INIT), + .INIT_57(INIT), + .INIT_58(INIT), + .INIT_59(INIT), + .INIT_5A(INIT), + .INIT_5B(INIT), + .INIT_5C(INIT), + .INIT_5D(INIT), + .INIT_5E(INIT), + .INIT_5F(INIT), + .INIT_60(INIT), + .INIT_61(INIT), + .INIT_62(INIT), + .INIT_63(INIT), + .INIT_64(INIT), + .INIT_65(INIT), + .INIT_66(INIT), + .INIT_67(INIT), + .INIT_68(INIT), + .INIT_69(INIT), + .INIT_6A(INIT), + .INIT_6B(INIT), + .INIT_6C(INIT), + .INIT_6D(INIT), + .INIT_6E(INIT), + .INIT_6F(INIT), + .INIT_70(INIT), + .INIT_71(INIT), + .INIT_72(INIT), + .INIT_73(INIT), + .INIT_74(INIT), + .INIT_75(INIT), + .INIT_76(INIT), + .INIT_77(INIT), + .INIT_78(INIT), + .INIT_79(INIT), + .INIT_7A(INIT), + .INIT_7B(INIT), + .INIT_7C(INIT), + .INIT_7D(INIT), + .INIT_7E(INIT), + .INIT_7F(INIT), + + .IS_CLKARDCLK_INVERTED(1'b0), + .IS_CLKBWRCLK_INVERTED(1'b1), + .IS_ENARDEN_INVERTED(1'b0), + .IS_ENBWREN_INVERTED(1'b0), + .IS_RSTRAMARSTRAM_INVERTED(1'b0), + .IS_RSTRAMB_INVERTED(1'b0), + .IS_RSTREGARSTREG_INVERTED(1'b0), + .IS_RSTREGB_INVERTED(1'b0), + .RAM_MODE("TDP"), + .WRITE_MODE_A("WRITE_FIRST"), + .WRITE_MODE_B("WRITE_FIRST") + ) ram ( + .CLKARDCLK(din[0]), + .CLKBWRCLK(din[1]), + .ENARDEN(din[2]), + .ENBWREN(din[3]), + .REGCEAREGCE(din[4]), + .REGCEB(din[5]), + .RSTRAMARSTRAM(din[6]), + .RSTRAMB(din[7]), + .RSTREGARSTREG(din[0]), + .RSTREGB(din[1]), + .ADDRARDADDR(din[2]), + .ADDRBWRADDR(din[3]), + .DIADI(din[4]), + .DIBDI(din[5]), + .DIPADIP(din[6]), + .DIPBDIP(din[7]), + .WEA(din[0]), + .WEBWE(din[1]), + .DOADO(dout[0]), + .DOBDO(dout[1]), + .DOPADOP(dout[2]), + .DOPBDOP(dout[3])); +endmodule + diff --git a/minitests/bram_fixed/top_ENARDEN_INV.v b/minitests/bram_fixed/top_ENARDEN_INV.v new file mode 100644 index 00000000..8c19c062 --- /dev/null +++ b/minitests/bram_fixed/top_ENARDEN_INV.v @@ -0,0 +1,213 @@ +module top(input clk, stb, di, output do); + localparam integer DIN_N = 8; + localparam integer DOUT_N = 8; + + reg [DIN_N-1:0] din; + wire [DOUT_N-1:0] dout; + + reg [DIN_N-1:0] din_shr; + reg [DOUT_N-1:0] dout_shr; + + always @(posedge clk) begin + din_shr <= {din_shr, di}; + dout_shr <= {dout_shr, din_shr[DIN_N-1]}; + if (stb) begin + din <= din_shr; + dout_shr <= dout; + end + end + + assign do = dout_shr[DOUT_N-1]; + + + + + + parameter INIT = 256'h0000000000000000000000000000000000000000000000000000000000000000; + + //(* LOC=LOC, BEL=BEL, KEEP, DONT_TOUCH *) + (* KEEP, DONT_TOUCH *) + RAMB36E1 #( + .INITP_00(INIT), + .INITP_01(INIT), + .INITP_02(INIT), + .INITP_03(INIT), + .INITP_04(INIT), + .INITP_05(INIT), + .INITP_06(INIT), + .INITP_07(INIT), + .INITP_08(INIT), + .INITP_09(INIT), + .INITP_0A(INIT), + .INITP_0B(INIT), + .INITP_0C(INIT), + .INITP_0D(INIT), + .INITP_0E(INIT), + .INITP_0F(INIT), + + .INIT_00(INIT), + .INIT_01(INIT), + .INIT_02(INIT), + .INIT_03(INIT), + .INIT_04(INIT), + .INIT_05(INIT), + .INIT_06(INIT), + .INIT_07(INIT), + .INIT_08(INIT), + .INIT_09(INIT), + .INIT_0A(INIT), + .INIT_0B(INIT), + .INIT_0C(INIT), + .INIT_0D(INIT), + .INIT_0E(INIT), + .INIT_0F(INIT), + .INIT_10(INIT), + .INIT_11(INIT), + .INIT_12(INIT), + .INIT_13(INIT), + .INIT_14(INIT), + .INIT_15(INIT), + .INIT_16(INIT), + .INIT_17(INIT), + .INIT_18(INIT), + .INIT_19(INIT), + .INIT_1A(INIT), + .INIT_1B(INIT), + .INIT_1C(INIT), + .INIT_1D(INIT), + .INIT_1E(INIT), + .INIT_1F(INIT), + .INIT_20(INIT), + .INIT_21(INIT), + .INIT_22(INIT), + .INIT_23(INIT), + .INIT_24(INIT), + .INIT_25(INIT), + .INIT_26(INIT), + .INIT_27(INIT), + .INIT_28(INIT), + .INIT_29(INIT), + .INIT_2A(INIT), + .INIT_2B(INIT), + .INIT_2C(INIT), + .INIT_2D(INIT), + .INIT_2E(INIT), + .INIT_2F(INIT), + .INIT_30(INIT), + .INIT_31(INIT), + .INIT_32(INIT), + .INIT_33(INIT), + .INIT_34(INIT), + .INIT_35(INIT), + .INIT_36(INIT), + .INIT_37(INIT), + .INIT_38(INIT), + .INIT_39(INIT), + .INIT_3A(INIT), + .INIT_3B(INIT), + .INIT_3C(INIT), + .INIT_3D(INIT), + .INIT_3E(INIT), + .INIT_3F(INIT), + + .INIT_40(INIT), + .INIT_41(INIT), + .INIT_42(INIT), + .INIT_43(INIT), + .INIT_44(INIT), + .INIT_45(INIT), + .INIT_46(INIT), + .INIT_47(INIT), + .INIT_48(INIT), + .INIT_49(INIT), + .INIT_4A(INIT), + .INIT_4B(INIT), + .INIT_4C(INIT), + .INIT_4D(INIT), + .INIT_4E(INIT), + .INIT_4F(INIT), + .INIT_50(INIT), + .INIT_51(INIT), + .INIT_52(INIT), + .INIT_53(INIT), + .INIT_54(INIT), + .INIT_55(INIT), + .INIT_56(INIT), + .INIT_57(INIT), + .INIT_58(INIT), + .INIT_59(INIT), + .INIT_5A(INIT), + .INIT_5B(INIT), + .INIT_5C(INIT), + .INIT_5D(INIT), + .INIT_5E(INIT), + .INIT_5F(INIT), + .INIT_60(INIT), + .INIT_61(INIT), + .INIT_62(INIT), + .INIT_63(INIT), + .INIT_64(INIT), + .INIT_65(INIT), + .INIT_66(INIT), + .INIT_67(INIT), + .INIT_68(INIT), + .INIT_69(INIT), + .INIT_6A(INIT), + .INIT_6B(INIT), + .INIT_6C(INIT), + .INIT_6D(INIT), + .INIT_6E(INIT), + .INIT_6F(INIT), + .INIT_70(INIT), + .INIT_71(INIT), + .INIT_72(INIT), + .INIT_73(INIT), + .INIT_74(INIT), + .INIT_75(INIT), + .INIT_76(INIT), + .INIT_77(INIT), + .INIT_78(INIT), + .INIT_79(INIT), + .INIT_7A(INIT), + .INIT_7B(INIT), + .INIT_7C(INIT), + .INIT_7D(INIT), + .INIT_7E(INIT), + .INIT_7F(INIT), + + .IS_CLKARDCLK_INVERTED(1'b0), + .IS_CLKBWRCLK_INVERTED(1'b0), + .IS_ENARDEN_INVERTED(1'b1), + .IS_ENBWREN_INVERTED(1'b0), + .IS_RSTRAMARSTRAM_INVERTED(1'b0), + .IS_RSTRAMB_INVERTED(1'b0), + .IS_RSTREGARSTREG_INVERTED(1'b0), + .IS_RSTREGB_INVERTED(1'b0), + .RAM_MODE("TDP"), + .WRITE_MODE_A("WRITE_FIRST"), + .WRITE_MODE_B("WRITE_FIRST") + ) ram ( + .CLKARDCLK(din[0]), + .CLKBWRCLK(din[1]), + .ENARDEN(din[2]), + .ENBWREN(din[3]), + .REGCEAREGCE(din[4]), + .REGCEB(din[5]), + .RSTRAMARSTRAM(din[6]), + .RSTRAMB(din[7]), + .RSTREGARSTREG(din[0]), + .RSTREGB(din[1]), + .ADDRARDADDR(din[2]), + .ADDRBWRADDR(din[3]), + .DIADI(din[4]), + .DIBDI(din[5]), + .DIPADIP(din[6]), + .DIPBDIP(din[7]), + .WEA(din[0]), + .WEBWE(din[1]), + .DOADO(dout[0]), + .DOBDO(dout[1]), + .DOPADOP(dout[2]), + .DOPBDOP(dout[3])); +endmodule + diff --git a/minitests/bram_fixed/top_ENBWREN_INV.v b/minitests/bram_fixed/top_ENBWREN_INV.v new file mode 100644 index 00000000..7d2f9d3a --- /dev/null +++ b/minitests/bram_fixed/top_ENBWREN_INV.v @@ -0,0 +1,213 @@ +module top(input clk, stb, di, output do); + localparam integer DIN_N = 8; + localparam integer DOUT_N = 8; + + reg [DIN_N-1:0] din; + wire [DOUT_N-1:0] dout; + + reg [DIN_N-1:0] din_shr; + reg [DOUT_N-1:0] dout_shr; + + always @(posedge clk) begin + din_shr <= {din_shr, di}; + dout_shr <= {dout_shr, din_shr[DIN_N-1]}; + if (stb) begin + din <= din_shr; + dout_shr <= dout; + end + end + + assign do = dout_shr[DOUT_N-1]; + + + + + + parameter INIT = 256'h0000000000000000000000000000000000000000000000000000000000000000; + + //(* LOC=LOC, BEL=BEL, KEEP, DONT_TOUCH *) + (* KEEP, DONT_TOUCH *) + RAMB36E1 #( + .INITP_00(INIT), + .INITP_01(INIT), + .INITP_02(INIT), + .INITP_03(INIT), + .INITP_04(INIT), + .INITP_05(INIT), + .INITP_06(INIT), + .INITP_07(INIT), + .INITP_08(INIT), + .INITP_09(INIT), + .INITP_0A(INIT), + .INITP_0B(INIT), + .INITP_0C(INIT), + .INITP_0D(INIT), + .INITP_0E(INIT), + .INITP_0F(INIT), + + .INIT_00(INIT), + .INIT_01(INIT), + .INIT_02(INIT), + .INIT_03(INIT), + .INIT_04(INIT), + .INIT_05(INIT), + .INIT_06(INIT), + .INIT_07(INIT), + .INIT_08(INIT), + .INIT_09(INIT), + .INIT_0A(INIT), + .INIT_0B(INIT), + .INIT_0C(INIT), + .INIT_0D(INIT), + .INIT_0E(INIT), + .INIT_0F(INIT), + .INIT_10(INIT), + .INIT_11(INIT), + .INIT_12(INIT), + .INIT_13(INIT), + .INIT_14(INIT), + .INIT_15(INIT), + .INIT_16(INIT), + .INIT_17(INIT), + .INIT_18(INIT), + .INIT_19(INIT), + .INIT_1A(INIT), + .INIT_1B(INIT), + .INIT_1C(INIT), + .INIT_1D(INIT), + .INIT_1E(INIT), + .INIT_1F(INIT), + .INIT_20(INIT), + .INIT_21(INIT), + .INIT_22(INIT), + .INIT_23(INIT), + .INIT_24(INIT), + .INIT_25(INIT), + .INIT_26(INIT), + .INIT_27(INIT), + .INIT_28(INIT), + .INIT_29(INIT), + .INIT_2A(INIT), + .INIT_2B(INIT), + .INIT_2C(INIT), + .INIT_2D(INIT), + .INIT_2E(INIT), + .INIT_2F(INIT), + .INIT_30(INIT), + .INIT_31(INIT), + .INIT_32(INIT), + .INIT_33(INIT), + .INIT_34(INIT), + .INIT_35(INIT), + .INIT_36(INIT), + .INIT_37(INIT), + .INIT_38(INIT), + .INIT_39(INIT), + .INIT_3A(INIT), + .INIT_3B(INIT), + .INIT_3C(INIT), + .INIT_3D(INIT), + .INIT_3E(INIT), + .INIT_3F(INIT), + + .INIT_40(INIT), + .INIT_41(INIT), + .INIT_42(INIT), + .INIT_43(INIT), + .INIT_44(INIT), + .INIT_45(INIT), + .INIT_46(INIT), + .INIT_47(INIT), + .INIT_48(INIT), + .INIT_49(INIT), + .INIT_4A(INIT), + .INIT_4B(INIT), + .INIT_4C(INIT), + .INIT_4D(INIT), + .INIT_4E(INIT), + .INIT_4F(INIT), + .INIT_50(INIT), + .INIT_51(INIT), + .INIT_52(INIT), + .INIT_53(INIT), + .INIT_54(INIT), + .INIT_55(INIT), + .INIT_56(INIT), + .INIT_57(INIT), + .INIT_58(INIT), + .INIT_59(INIT), + .INIT_5A(INIT), + .INIT_5B(INIT), + .INIT_5C(INIT), + .INIT_5D(INIT), + .INIT_5E(INIT), + .INIT_5F(INIT), + .INIT_60(INIT), + .INIT_61(INIT), + .INIT_62(INIT), + .INIT_63(INIT), + .INIT_64(INIT), + .INIT_65(INIT), + .INIT_66(INIT), + .INIT_67(INIT), + .INIT_68(INIT), + .INIT_69(INIT), + .INIT_6A(INIT), + .INIT_6B(INIT), + .INIT_6C(INIT), + .INIT_6D(INIT), + .INIT_6E(INIT), + .INIT_6F(INIT), + .INIT_70(INIT), + .INIT_71(INIT), + .INIT_72(INIT), + .INIT_73(INIT), + .INIT_74(INIT), + .INIT_75(INIT), + .INIT_76(INIT), + .INIT_77(INIT), + .INIT_78(INIT), + .INIT_79(INIT), + .INIT_7A(INIT), + .INIT_7B(INIT), + .INIT_7C(INIT), + .INIT_7D(INIT), + .INIT_7E(INIT), + .INIT_7F(INIT), + + .IS_CLKARDCLK_INVERTED(1'b0), + .IS_CLKBWRCLK_INVERTED(1'b0), + .IS_ENARDEN_INVERTED(1'b0), + .IS_ENBWREN_INVERTED(1'b1), + .IS_RSTRAMARSTRAM_INVERTED(1'b0), + .IS_RSTRAMB_INVERTED(1'b0), + .IS_RSTREGARSTREG_INVERTED(1'b0), + .IS_RSTREGB_INVERTED(1'b0), + .RAM_MODE("TDP"), + .WRITE_MODE_A("WRITE_FIRST"), + .WRITE_MODE_B("WRITE_FIRST") + ) ram ( + .CLKARDCLK(din[0]), + .CLKBWRCLK(din[1]), + .ENARDEN(din[2]), + .ENBWREN(din[3]), + .REGCEAREGCE(din[4]), + .REGCEB(din[5]), + .RSTRAMARSTRAM(din[6]), + .RSTRAMB(din[7]), + .RSTREGARSTREG(din[0]), + .RSTREGB(din[1]), + .ADDRARDADDR(din[2]), + .ADDRBWRADDR(din[3]), + .DIADI(din[4]), + .DIBDI(din[5]), + .DIPADIP(din[6]), + .DIPBDIP(din[7]), + .WEA(din[0]), + .WEBWE(din[1]), + .DOADO(dout[0]), + .DOBDO(dout[1]), + .DOPADOP(dout[2]), + .DOPBDOP(dout[3])); +endmodule + diff --git a/minitests/bram_fixed/top_RAM_MODE_SDP.v b/minitests/bram_fixed/top_RAM_MODE_SDP.v new file mode 100644 index 00000000..1ae5b4ac --- /dev/null +++ b/minitests/bram_fixed/top_RAM_MODE_SDP.v @@ -0,0 +1,213 @@ +module top(input clk, stb, di, output do); + localparam integer DIN_N = 8; + localparam integer DOUT_N = 8; + + reg [DIN_N-1:0] din; + wire [DOUT_N-1:0] dout; + + reg [DIN_N-1:0] din_shr; + reg [DOUT_N-1:0] dout_shr; + + always @(posedge clk) begin + din_shr <= {din_shr, di}; + dout_shr <= {dout_shr, din_shr[DIN_N-1]}; + if (stb) begin + din <= din_shr; + dout_shr <= dout; + end + end + + assign do = dout_shr[DOUT_N-1]; + + + + + + parameter INIT = 256'h0000000000000000000000000000000000000000000000000000000000000000; + + //(* LOC=LOC, BEL=BEL, KEEP, DONT_TOUCH *) + (* KEEP, DONT_TOUCH *) + RAMB36E1 #( + .INITP_00(INIT), + .INITP_01(INIT), + .INITP_02(INIT), + .INITP_03(INIT), + .INITP_04(INIT), + .INITP_05(INIT), + .INITP_06(INIT), + .INITP_07(INIT), + .INITP_08(INIT), + .INITP_09(INIT), + .INITP_0A(INIT), + .INITP_0B(INIT), + .INITP_0C(INIT), + .INITP_0D(INIT), + .INITP_0E(INIT), + .INITP_0F(INIT), + + .INIT_00(INIT), + .INIT_01(INIT), + .INIT_02(INIT), + .INIT_03(INIT), + .INIT_04(INIT), + .INIT_05(INIT), + .INIT_06(INIT), + .INIT_07(INIT), + .INIT_08(INIT), + .INIT_09(INIT), + .INIT_0A(INIT), + .INIT_0B(INIT), + .INIT_0C(INIT), + .INIT_0D(INIT), + .INIT_0E(INIT), + .INIT_0F(INIT), + .INIT_10(INIT), + .INIT_11(INIT), + .INIT_12(INIT), + .INIT_13(INIT), + .INIT_14(INIT), + .INIT_15(INIT), + .INIT_16(INIT), + .INIT_17(INIT), + .INIT_18(INIT), + .INIT_19(INIT), + .INIT_1A(INIT), + .INIT_1B(INIT), + .INIT_1C(INIT), + .INIT_1D(INIT), + .INIT_1E(INIT), + .INIT_1F(INIT), + .INIT_20(INIT), + .INIT_21(INIT), + .INIT_22(INIT), + .INIT_23(INIT), + .INIT_24(INIT), + .INIT_25(INIT), + .INIT_26(INIT), + .INIT_27(INIT), + .INIT_28(INIT), + .INIT_29(INIT), + .INIT_2A(INIT), + .INIT_2B(INIT), + .INIT_2C(INIT), + .INIT_2D(INIT), + .INIT_2E(INIT), + .INIT_2F(INIT), + .INIT_30(INIT), + .INIT_31(INIT), + .INIT_32(INIT), + .INIT_33(INIT), + .INIT_34(INIT), + .INIT_35(INIT), + .INIT_36(INIT), + .INIT_37(INIT), + .INIT_38(INIT), + .INIT_39(INIT), + .INIT_3A(INIT), + .INIT_3B(INIT), + .INIT_3C(INIT), + .INIT_3D(INIT), + .INIT_3E(INIT), + .INIT_3F(INIT), + + .INIT_40(INIT), + .INIT_41(INIT), + .INIT_42(INIT), + .INIT_43(INIT), + .INIT_44(INIT), + .INIT_45(INIT), + .INIT_46(INIT), + .INIT_47(INIT), + .INIT_48(INIT), + .INIT_49(INIT), + .INIT_4A(INIT), + .INIT_4B(INIT), + .INIT_4C(INIT), + .INIT_4D(INIT), + .INIT_4E(INIT), + .INIT_4F(INIT), + .INIT_50(INIT), + .INIT_51(INIT), + .INIT_52(INIT), + .INIT_53(INIT), + .INIT_54(INIT), + .INIT_55(INIT), + .INIT_56(INIT), + .INIT_57(INIT), + .INIT_58(INIT), + .INIT_59(INIT), + .INIT_5A(INIT), + .INIT_5B(INIT), + .INIT_5C(INIT), + .INIT_5D(INIT), + .INIT_5E(INIT), + .INIT_5F(INIT), + .INIT_60(INIT), + .INIT_61(INIT), + .INIT_62(INIT), + .INIT_63(INIT), + .INIT_64(INIT), + .INIT_65(INIT), + .INIT_66(INIT), + .INIT_67(INIT), + .INIT_68(INIT), + .INIT_69(INIT), + .INIT_6A(INIT), + .INIT_6B(INIT), + .INIT_6C(INIT), + .INIT_6D(INIT), + .INIT_6E(INIT), + .INIT_6F(INIT), + .INIT_70(INIT), + .INIT_71(INIT), + .INIT_72(INIT), + .INIT_73(INIT), + .INIT_74(INIT), + .INIT_75(INIT), + .INIT_76(INIT), + .INIT_77(INIT), + .INIT_78(INIT), + .INIT_79(INIT), + .INIT_7A(INIT), + .INIT_7B(INIT), + .INIT_7C(INIT), + .INIT_7D(INIT), + .INIT_7E(INIT), + .INIT_7F(INIT), + + .IS_CLKARDCLK_INVERTED(1'b0), + .IS_CLKBWRCLK_INVERTED(1'b0), + .IS_ENARDEN_INVERTED(1'b0), + .IS_ENBWREN_INVERTED(1'b0), + .IS_RSTRAMARSTRAM_INVERTED(1'b0), + .IS_RSTRAMB_INVERTED(1'b0), + .IS_RSTREGARSTREG_INVERTED(1'b0), + .IS_RSTREGB_INVERTED(1'b0), + .RAM_MODE("SDP"), + .WRITE_MODE_A("WRITE_FIRST"), + .WRITE_MODE_B("WRITE_FIRST") + ) ram ( + .CLKARDCLK(din[0]), + .CLKBWRCLK(din[1]), + .ENARDEN(din[2]), + .ENBWREN(din[3]), + .REGCEAREGCE(din[4]), + .REGCEB(din[5]), + .RSTRAMARSTRAM(din[6]), + .RSTRAMB(din[7]), + .RSTREGARSTREG(din[0]), + .RSTREGB(din[1]), + .ADDRARDADDR(din[2]), + .ADDRBWRADDR(din[3]), + .DIADI(din[4]), + .DIBDI(din[5]), + .DIPADIP(din[6]), + .DIPBDIP(din[7]), + .WEA(din[0]), + .WEBWE(din[1]), + .DOADO(dout[0]), + .DOBDO(dout[1]), + .DOPADOP(dout[2]), + .DOPBDOP(dout[3])); +endmodule + diff --git a/minitests/bram_fixed/top_RSTRAMARSTRAM_INV.v b/minitests/bram_fixed/top_RSTRAMARSTRAM_INV.v new file mode 100644 index 00000000..048a0d71 --- /dev/null +++ b/minitests/bram_fixed/top_RSTRAMARSTRAM_INV.v @@ -0,0 +1,213 @@ +module top(input clk, stb, di, output do); + localparam integer DIN_N = 8; + localparam integer DOUT_N = 8; + + reg [DIN_N-1:0] din; + wire [DOUT_N-1:0] dout; + + reg [DIN_N-1:0] din_shr; + reg [DOUT_N-1:0] dout_shr; + + always @(posedge clk) begin + din_shr <= {din_shr, di}; + dout_shr <= {dout_shr, din_shr[DIN_N-1]}; + if (stb) begin + din <= din_shr; + dout_shr <= dout; + end + end + + assign do = dout_shr[DOUT_N-1]; + + + + + + parameter INIT = 256'h0000000000000000000000000000000000000000000000000000000000000000; + + //(* LOC=LOC, BEL=BEL, KEEP, DONT_TOUCH *) + (* KEEP, DONT_TOUCH *) + RAMB36E1 #( + .INITP_00(INIT), + .INITP_01(INIT), + .INITP_02(INIT), + .INITP_03(INIT), + .INITP_04(INIT), + .INITP_05(INIT), + .INITP_06(INIT), + .INITP_07(INIT), + .INITP_08(INIT), + .INITP_09(INIT), + .INITP_0A(INIT), + .INITP_0B(INIT), + .INITP_0C(INIT), + .INITP_0D(INIT), + .INITP_0E(INIT), + .INITP_0F(INIT), + + .INIT_00(INIT), + .INIT_01(INIT), + .INIT_02(INIT), + .INIT_03(INIT), + .INIT_04(INIT), + .INIT_05(INIT), + .INIT_06(INIT), + .INIT_07(INIT), + .INIT_08(INIT), + .INIT_09(INIT), + .INIT_0A(INIT), + .INIT_0B(INIT), + .INIT_0C(INIT), + .INIT_0D(INIT), + .INIT_0E(INIT), + .INIT_0F(INIT), + .INIT_10(INIT), + .INIT_11(INIT), + .INIT_12(INIT), + .INIT_13(INIT), + .INIT_14(INIT), + .INIT_15(INIT), + .INIT_16(INIT), + .INIT_17(INIT), + .INIT_18(INIT), + .INIT_19(INIT), + .INIT_1A(INIT), + .INIT_1B(INIT), + .INIT_1C(INIT), + .INIT_1D(INIT), + .INIT_1E(INIT), + .INIT_1F(INIT), + .INIT_20(INIT), + .INIT_21(INIT), + .INIT_22(INIT), + .INIT_23(INIT), + .INIT_24(INIT), + .INIT_25(INIT), + .INIT_26(INIT), + .INIT_27(INIT), + .INIT_28(INIT), + .INIT_29(INIT), + .INIT_2A(INIT), + .INIT_2B(INIT), + .INIT_2C(INIT), + .INIT_2D(INIT), + .INIT_2E(INIT), + .INIT_2F(INIT), + .INIT_30(INIT), + .INIT_31(INIT), + .INIT_32(INIT), + .INIT_33(INIT), + .INIT_34(INIT), + .INIT_35(INIT), + .INIT_36(INIT), + .INIT_37(INIT), + .INIT_38(INIT), + .INIT_39(INIT), + .INIT_3A(INIT), + .INIT_3B(INIT), + .INIT_3C(INIT), + .INIT_3D(INIT), + .INIT_3E(INIT), + .INIT_3F(INIT), + + .INIT_40(INIT), + .INIT_41(INIT), + .INIT_42(INIT), + .INIT_43(INIT), + .INIT_44(INIT), + .INIT_45(INIT), + .INIT_46(INIT), + .INIT_47(INIT), + .INIT_48(INIT), + .INIT_49(INIT), + .INIT_4A(INIT), + .INIT_4B(INIT), + .INIT_4C(INIT), + .INIT_4D(INIT), + .INIT_4E(INIT), + .INIT_4F(INIT), + .INIT_50(INIT), + .INIT_51(INIT), + .INIT_52(INIT), + .INIT_53(INIT), + .INIT_54(INIT), + .INIT_55(INIT), + .INIT_56(INIT), + .INIT_57(INIT), + .INIT_58(INIT), + .INIT_59(INIT), + .INIT_5A(INIT), + .INIT_5B(INIT), + .INIT_5C(INIT), + .INIT_5D(INIT), + .INIT_5E(INIT), + .INIT_5F(INIT), + .INIT_60(INIT), + .INIT_61(INIT), + .INIT_62(INIT), + .INIT_63(INIT), + .INIT_64(INIT), + .INIT_65(INIT), + .INIT_66(INIT), + .INIT_67(INIT), + .INIT_68(INIT), + .INIT_69(INIT), + .INIT_6A(INIT), + .INIT_6B(INIT), + .INIT_6C(INIT), + .INIT_6D(INIT), + .INIT_6E(INIT), + .INIT_6F(INIT), + .INIT_70(INIT), + .INIT_71(INIT), + .INIT_72(INIT), + .INIT_73(INIT), + .INIT_74(INIT), + .INIT_75(INIT), + .INIT_76(INIT), + .INIT_77(INIT), + .INIT_78(INIT), + .INIT_79(INIT), + .INIT_7A(INIT), + .INIT_7B(INIT), + .INIT_7C(INIT), + .INIT_7D(INIT), + .INIT_7E(INIT), + .INIT_7F(INIT), + + .IS_CLKARDCLK_INVERTED(1'b0), + .IS_CLKBWRCLK_INVERTED(1'b0), + .IS_ENARDEN_INVERTED(1'b0), + .IS_ENBWREN_INVERTED(1'b0), + .IS_RSTRAMARSTRAM_INVERTED(1'b1), + .IS_RSTRAMB_INVERTED(1'b0), + .IS_RSTREGARSTREG_INVERTED(1'b0), + .IS_RSTREGB_INVERTED(1'b0), + .RAM_MODE("TDP"), + .WRITE_MODE_A("WRITE_FIRST"), + .WRITE_MODE_B("WRITE_FIRST") + ) ram ( + .CLKARDCLK(din[0]), + .CLKBWRCLK(din[1]), + .ENARDEN(din[2]), + .ENBWREN(din[3]), + .REGCEAREGCE(din[4]), + .REGCEB(din[5]), + .RSTRAMARSTRAM(din[6]), + .RSTRAMB(din[7]), + .RSTREGARSTREG(din[0]), + .RSTREGB(din[1]), + .ADDRARDADDR(din[2]), + .ADDRBWRADDR(din[3]), + .DIADI(din[4]), + .DIBDI(din[5]), + .DIPADIP(din[6]), + .DIPBDIP(din[7]), + .WEA(din[0]), + .WEBWE(din[1]), + .DOADO(dout[0]), + .DOBDO(dout[1]), + .DOPADOP(dout[2]), + .DOPBDOP(dout[3])); +endmodule + diff --git a/minitests/bram_fixed/top_RSTRAMB_INV.v b/minitests/bram_fixed/top_RSTRAMB_INV.v new file mode 100644 index 00000000..bba5e9e0 --- /dev/null +++ b/minitests/bram_fixed/top_RSTRAMB_INV.v @@ -0,0 +1,213 @@ +module top(input clk, stb, di, output do); + localparam integer DIN_N = 8; + localparam integer DOUT_N = 8; + + reg [DIN_N-1:0] din; + wire [DOUT_N-1:0] dout; + + reg [DIN_N-1:0] din_shr; + reg [DOUT_N-1:0] dout_shr; + + always @(posedge clk) begin + din_shr <= {din_shr, di}; + dout_shr <= {dout_shr, din_shr[DIN_N-1]}; + if (stb) begin + din <= din_shr; + dout_shr <= dout; + end + end + + assign do = dout_shr[DOUT_N-1]; + + + + + + parameter INIT = 256'h0000000000000000000000000000000000000000000000000000000000000000; + + //(* LOC=LOC, BEL=BEL, KEEP, DONT_TOUCH *) + (* KEEP, DONT_TOUCH *) + RAMB36E1 #( + .INITP_00(INIT), + .INITP_01(INIT), + .INITP_02(INIT), + .INITP_03(INIT), + .INITP_04(INIT), + .INITP_05(INIT), + .INITP_06(INIT), + .INITP_07(INIT), + .INITP_08(INIT), + .INITP_09(INIT), + .INITP_0A(INIT), + .INITP_0B(INIT), + .INITP_0C(INIT), + .INITP_0D(INIT), + .INITP_0E(INIT), + .INITP_0F(INIT), + + .INIT_00(INIT), + .INIT_01(INIT), + .INIT_02(INIT), + .INIT_03(INIT), + .INIT_04(INIT), + .INIT_05(INIT), + .INIT_06(INIT), + .INIT_07(INIT), + .INIT_08(INIT), + .INIT_09(INIT), + .INIT_0A(INIT), + .INIT_0B(INIT), + .INIT_0C(INIT), + .INIT_0D(INIT), + .INIT_0E(INIT), + .INIT_0F(INIT), + .INIT_10(INIT), + .INIT_11(INIT), + .INIT_12(INIT), + .INIT_13(INIT), + .INIT_14(INIT), + .INIT_15(INIT), + .INIT_16(INIT), + .INIT_17(INIT), + .INIT_18(INIT), + .INIT_19(INIT), + .INIT_1A(INIT), + .INIT_1B(INIT), + .INIT_1C(INIT), + .INIT_1D(INIT), + .INIT_1E(INIT), + .INIT_1F(INIT), + .INIT_20(INIT), + .INIT_21(INIT), + .INIT_22(INIT), + .INIT_23(INIT), + .INIT_24(INIT), + .INIT_25(INIT), + .INIT_26(INIT), + .INIT_27(INIT), + .INIT_28(INIT), + .INIT_29(INIT), + .INIT_2A(INIT), + .INIT_2B(INIT), + .INIT_2C(INIT), + .INIT_2D(INIT), + .INIT_2E(INIT), + .INIT_2F(INIT), + .INIT_30(INIT), + .INIT_31(INIT), + .INIT_32(INIT), + .INIT_33(INIT), + .INIT_34(INIT), + .INIT_35(INIT), + .INIT_36(INIT), + .INIT_37(INIT), + .INIT_38(INIT), + .INIT_39(INIT), + .INIT_3A(INIT), + .INIT_3B(INIT), + .INIT_3C(INIT), + .INIT_3D(INIT), + .INIT_3E(INIT), + .INIT_3F(INIT), + + .INIT_40(INIT), + .INIT_41(INIT), + .INIT_42(INIT), + .INIT_43(INIT), + .INIT_44(INIT), + .INIT_45(INIT), + .INIT_46(INIT), + .INIT_47(INIT), + .INIT_48(INIT), + .INIT_49(INIT), + .INIT_4A(INIT), + .INIT_4B(INIT), + .INIT_4C(INIT), + .INIT_4D(INIT), + .INIT_4E(INIT), + .INIT_4F(INIT), + .INIT_50(INIT), + .INIT_51(INIT), + .INIT_52(INIT), + .INIT_53(INIT), + .INIT_54(INIT), + .INIT_55(INIT), + .INIT_56(INIT), + .INIT_57(INIT), + .INIT_58(INIT), + .INIT_59(INIT), + .INIT_5A(INIT), + .INIT_5B(INIT), + .INIT_5C(INIT), + .INIT_5D(INIT), + .INIT_5E(INIT), + .INIT_5F(INIT), + .INIT_60(INIT), + .INIT_61(INIT), + .INIT_62(INIT), + .INIT_63(INIT), + .INIT_64(INIT), + .INIT_65(INIT), + .INIT_66(INIT), + .INIT_67(INIT), + .INIT_68(INIT), + .INIT_69(INIT), + .INIT_6A(INIT), + .INIT_6B(INIT), + .INIT_6C(INIT), + .INIT_6D(INIT), + .INIT_6E(INIT), + .INIT_6F(INIT), + .INIT_70(INIT), + .INIT_71(INIT), + .INIT_72(INIT), + .INIT_73(INIT), + .INIT_74(INIT), + .INIT_75(INIT), + .INIT_76(INIT), + .INIT_77(INIT), + .INIT_78(INIT), + .INIT_79(INIT), + .INIT_7A(INIT), + .INIT_7B(INIT), + .INIT_7C(INIT), + .INIT_7D(INIT), + .INIT_7E(INIT), + .INIT_7F(INIT), + + .IS_CLKARDCLK_INVERTED(1'b0), + .IS_CLKBWRCLK_INVERTED(1'b0), + .IS_ENARDEN_INVERTED(1'b0), + .IS_ENBWREN_INVERTED(1'b0), + .IS_RSTRAMARSTRAM_INVERTED(1'b0), + .IS_RSTRAMB_INVERTED(1'b1), + .IS_RSTREGARSTREG_INVERTED(1'b0), + .IS_RSTREGB_INVERTED(1'b0), + .RAM_MODE("TDP"), + .WRITE_MODE_A("WRITE_FIRST"), + .WRITE_MODE_B("WRITE_FIRST") + ) ram ( + .CLKARDCLK(din[0]), + .CLKBWRCLK(din[1]), + .ENARDEN(din[2]), + .ENBWREN(din[3]), + .REGCEAREGCE(din[4]), + .REGCEB(din[5]), + .RSTRAMARSTRAM(din[6]), + .RSTRAMB(din[7]), + .RSTREGARSTREG(din[0]), + .RSTREGB(din[1]), + .ADDRARDADDR(din[2]), + .ADDRBWRADDR(din[3]), + .DIADI(din[4]), + .DIBDI(din[5]), + .DIPADIP(din[6]), + .DIPBDIP(din[7]), + .WEA(din[0]), + .WEBWE(din[1]), + .DOADO(dout[0]), + .DOBDO(dout[1]), + .DOPADOP(dout[2]), + .DOPBDOP(dout[3])); +endmodule + diff --git a/minitests/bram_fixed/top_RSTREGARSTREG_INV.v b/minitests/bram_fixed/top_RSTREGARSTREG_INV.v new file mode 100644 index 00000000..0df37542 --- /dev/null +++ b/minitests/bram_fixed/top_RSTREGARSTREG_INV.v @@ -0,0 +1,213 @@ +module top(input clk, stb, di, output do); + localparam integer DIN_N = 8; + localparam integer DOUT_N = 8; + + reg [DIN_N-1:0] din; + wire [DOUT_N-1:0] dout; + + reg [DIN_N-1:0] din_shr; + reg [DOUT_N-1:0] dout_shr; + + always @(posedge clk) begin + din_shr <= {din_shr, di}; + dout_shr <= {dout_shr, din_shr[DIN_N-1]}; + if (stb) begin + din <= din_shr; + dout_shr <= dout; + end + end + + assign do = dout_shr[DOUT_N-1]; + + + + + + parameter INIT = 256'h0000000000000000000000000000000000000000000000000000000000000000; + + //(* LOC=LOC, BEL=BEL, KEEP, DONT_TOUCH *) + (* KEEP, DONT_TOUCH *) + RAMB36E1 #( + .INITP_00(INIT), + .INITP_01(INIT), + .INITP_02(INIT), + .INITP_03(INIT), + .INITP_04(INIT), + .INITP_05(INIT), + .INITP_06(INIT), + .INITP_07(INIT), + .INITP_08(INIT), + .INITP_09(INIT), + .INITP_0A(INIT), + .INITP_0B(INIT), + .INITP_0C(INIT), + .INITP_0D(INIT), + .INITP_0E(INIT), + .INITP_0F(INIT), + + .INIT_00(INIT), + .INIT_01(INIT), + .INIT_02(INIT), + .INIT_03(INIT), + .INIT_04(INIT), + .INIT_05(INIT), + .INIT_06(INIT), + .INIT_07(INIT), + .INIT_08(INIT), + .INIT_09(INIT), + .INIT_0A(INIT), + .INIT_0B(INIT), + .INIT_0C(INIT), + .INIT_0D(INIT), + .INIT_0E(INIT), + .INIT_0F(INIT), + .INIT_10(INIT), + .INIT_11(INIT), + .INIT_12(INIT), + .INIT_13(INIT), + .INIT_14(INIT), + .INIT_15(INIT), + .INIT_16(INIT), + .INIT_17(INIT), + .INIT_18(INIT), + .INIT_19(INIT), + .INIT_1A(INIT), + .INIT_1B(INIT), + .INIT_1C(INIT), + .INIT_1D(INIT), + .INIT_1E(INIT), + .INIT_1F(INIT), + .INIT_20(INIT), + .INIT_21(INIT), + .INIT_22(INIT), + .INIT_23(INIT), + .INIT_24(INIT), + .INIT_25(INIT), + .INIT_26(INIT), + .INIT_27(INIT), + .INIT_28(INIT), + .INIT_29(INIT), + .INIT_2A(INIT), + .INIT_2B(INIT), + .INIT_2C(INIT), + .INIT_2D(INIT), + .INIT_2E(INIT), + .INIT_2F(INIT), + .INIT_30(INIT), + .INIT_31(INIT), + .INIT_32(INIT), + .INIT_33(INIT), + .INIT_34(INIT), + .INIT_35(INIT), + .INIT_36(INIT), + .INIT_37(INIT), + .INIT_38(INIT), + .INIT_39(INIT), + .INIT_3A(INIT), + .INIT_3B(INIT), + .INIT_3C(INIT), + .INIT_3D(INIT), + .INIT_3E(INIT), + .INIT_3F(INIT), + + .INIT_40(INIT), + .INIT_41(INIT), + .INIT_42(INIT), + .INIT_43(INIT), + .INIT_44(INIT), + .INIT_45(INIT), + .INIT_46(INIT), + .INIT_47(INIT), + .INIT_48(INIT), + .INIT_49(INIT), + .INIT_4A(INIT), + .INIT_4B(INIT), + .INIT_4C(INIT), + .INIT_4D(INIT), + .INIT_4E(INIT), + .INIT_4F(INIT), + .INIT_50(INIT), + .INIT_51(INIT), + .INIT_52(INIT), + .INIT_53(INIT), + .INIT_54(INIT), + .INIT_55(INIT), + .INIT_56(INIT), + .INIT_57(INIT), + .INIT_58(INIT), + .INIT_59(INIT), + .INIT_5A(INIT), + .INIT_5B(INIT), + .INIT_5C(INIT), + .INIT_5D(INIT), + .INIT_5E(INIT), + .INIT_5F(INIT), + .INIT_60(INIT), + .INIT_61(INIT), + .INIT_62(INIT), + .INIT_63(INIT), + .INIT_64(INIT), + .INIT_65(INIT), + .INIT_66(INIT), + .INIT_67(INIT), + .INIT_68(INIT), + .INIT_69(INIT), + .INIT_6A(INIT), + .INIT_6B(INIT), + .INIT_6C(INIT), + .INIT_6D(INIT), + .INIT_6E(INIT), + .INIT_6F(INIT), + .INIT_70(INIT), + .INIT_71(INIT), + .INIT_72(INIT), + .INIT_73(INIT), + .INIT_74(INIT), + .INIT_75(INIT), + .INIT_76(INIT), + .INIT_77(INIT), + .INIT_78(INIT), + .INIT_79(INIT), + .INIT_7A(INIT), + .INIT_7B(INIT), + .INIT_7C(INIT), + .INIT_7D(INIT), + .INIT_7E(INIT), + .INIT_7F(INIT), + + .IS_CLKARDCLK_INVERTED(1'b0), + .IS_CLKBWRCLK_INVERTED(1'b0), + .IS_ENARDEN_INVERTED(1'b0), + .IS_ENBWREN_INVERTED(1'b0), + .IS_RSTRAMARSTRAM_INVERTED(1'b0), + .IS_RSTRAMB_INVERTED(1'b0), + .IS_RSTREGARSTREG_INVERTED(1'b1), + .IS_RSTREGB_INVERTED(1'b0), + .RAM_MODE("TDP"), + .WRITE_MODE_A("WRITE_FIRST"), + .WRITE_MODE_B("WRITE_FIRST") + ) ram ( + .CLKARDCLK(din[0]), + .CLKBWRCLK(din[1]), + .ENARDEN(din[2]), + .ENBWREN(din[3]), + .REGCEAREGCE(din[4]), + .REGCEB(din[5]), + .RSTRAMARSTRAM(din[6]), + .RSTRAMB(din[7]), + .RSTREGARSTREG(din[0]), + .RSTREGB(din[1]), + .ADDRARDADDR(din[2]), + .ADDRBWRADDR(din[3]), + .DIADI(din[4]), + .DIBDI(din[5]), + .DIPADIP(din[6]), + .DIPBDIP(din[7]), + .WEA(din[0]), + .WEBWE(din[1]), + .DOADO(dout[0]), + .DOBDO(dout[1]), + .DOPADOP(dout[2]), + .DOPBDOP(dout[3])); +endmodule + diff --git a/minitests/bram_fixed/top_RSTREGB_INV.v b/minitests/bram_fixed/top_RSTREGB_INV.v new file mode 100644 index 00000000..067d1561 --- /dev/null +++ b/minitests/bram_fixed/top_RSTREGB_INV.v @@ -0,0 +1,213 @@ +module top(input clk, stb, di, output do); + localparam integer DIN_N = 8; + localparam integer DOUT_N = 8; + + reg [DIN_N-1:0] din; + wire [DOUT_N-1:0] dout; + + reg [DIN_N-1:0] din_shr; + reg [DOUT_N-1:0] dout_shr; + + always @(posedge clk) begin + din_shr <= {din_shr, di}; + dout_shr <= {dout_shr, din_shr[DIN_N-1]}; + if (stb) begin + din <= din_shr; + dout_shr <= dout; + end + end + + assign do = dout_shr[DOUT_N-1]; + + + + + + parameter INIT = 256'h0000000000000000000000000000000000000000000000000000000000000000; + + //(* LOC=LOC, BEL=BEL, KEEP, DONT_TOUCH *) + (* KEEP, DONT_TOUCH *) + RAMB36E1 #( + .INITP_00(INIT), + .INITP_01(INIT), + .INITP_02(INIT), + .INITP_03(INIT), + .INITP_04(INIT), + .INITP_05(INIT), + .INITP_06(INIT), + .INITP_07(INIT), + .INITP_08(INIT), + .INITP_09(INIT), + .INITP_0A(INIT), + .INITP_0B(INIT), + .INITP_0C(INIT), + .INITP_0D(INIT), + .INITP_0E(INIT), + .INITP_0F(INIT), + + .INIT_00(INIT), + .INIT_01(INIT), + .INIT_02(INIT), + .INIT_03(INIT), + .INIT_04(INIT), + .INIT_05(INIT), + .INIT_06(INIT), + .INIT_07(INIT), + .INIT_08(INIT), + .INIT_09(INIT), + .INIT_0A(INIT), + .INIT_0B(INIT), + .INIT_0C(INIT), + .INIT_0D(INIT), + .INIT_0E(INIT), + .INIT_0F(INIT), + .INIT_10(INIT), + .INIT_11(INIT), + .INIT_12(INIT), + .INIT_13(INIT), + .INIT_14(INIT), + .INIT_15(INIT), + .INIT_16(INIT), + .INIT_17(INIT), + .INIT_18(INIT), + .INIT_19(INIT), + .INIT_1A(INIT), + .INIT_1B(INIT), + .INIT_1C(INIT), + .INIT_1D(INIT), + .INIT_1E(INIT), + .INIT_1F(INIT), + .INIT_20(INIT), + .INIT_21(INIT), + .INIT_22(INIT), + .INIT_23(INIT), + .INIT_24(INIT), + .INIT_25(INIT), + .INIT_26(INIT), + .INIT_27(INIT), + .INIT_28(INIT), + .INIT_29(INIT), + .INIT_2A(INIT), + .INIT_2B(INIT), + .INIT_2C(INIT), + .INIT_2D(INIT), + .INIT_2E(INIT), + .INIT_2F(INIT), + .INIT_30(INIT), + .INIT_31(INIT), + .INIT_32(INIT), + .INIT_33(INIT), + .INIT_34(INIT), + .INIT_35(INIT), + .INIT_36(INIT), + .INIT_37(INIT), + .INIT_38(INIT), + .INIT_39(INIT), + .INIT_3A(INIT), + .INIT_3B(INIT), + .INIT_3C(INIT), + .INIT_3D(INIT), + .INIT_3E(INIT), + .INIT_3F(INIT), + + .INIT_40(INIT), + .INIT_41(INIT), + .INIT_42(INIT), + .INIT_43(INIT), + .INIT_44(INIT), + .INIT_45(INIT), + .INIT_46(INIT), + .INIT_47(INIT), + .INIT_48(INIT), + .INIT_49(INIT), + .INIT_4A(INIT), + .INIT_4B(INIT), + .INIT_4C(INIT), + .INIT_4D(INIT), + .INIT_4E(INIT), + .INIT_4F(INIT), + .INIT_50(INIT), + .INIT_51(INIT), + .INIT_52(INIT), + .INIT_53(INIT), + .INIT_54(INIT), + .INIT_55(INIT), + .INIT_56(INIT), + .INIT_57(INIT), + .INIT_58(INIT), + .INIT_59(INIT), + .INIT_5A(INIT), + .INIT_5B(INIT), + .INIT_5C(INIT), + .INIT_5D(INIT), + .INIT_5E(INIT), + .INIT_5F(INIT), + .INIT_60(INIT), + .INIT_61(INIT), + .INIT_62(INIT), + .INIT_63(INIT), + .INIT_64(INIT), + .INIT_65(INIT), + .INIT_66(INIT), + .INIT_67(INIT), + .INIT_68(INIT), + .INIT_69(INIT), + .INIT_6A(INIT), + .INIT_6B(INIT), + .INIT_6C(INIT), + .INIT_6D(INIT), + .INIT_6E(INIT), + .INIT_6F(INIT), + .INIT_70(INIT), + .INIT_71(INIT), + .INIT_72(INIT), + .INIT_73(INIT), + .INIT_74(INIT), + .INIT_75(INIT), + .INIT_76(INIT), + .INIT_77(INIT), + .INIT_78(INIT), + .INIT_79(INIT), + .INIT_7A(INIT), + .INIT_7B(INIT), + .INIT_7C(INIT), + .INIT_7D(INIT), + .INIT_7E(INIT), + .INIT_7F(INIT), + + .IS_CLKARDCLK_INVERTED(1'b0), + .IS_CLKBWRCLK_INVERTED(1'b0), + .IS_ENARDEN_INVERTED(1'b0), + .IS_ENBWREN_INVERTED(1'b0), + .IS_RSTRAMARSTRAM_INVERTED(1'b0), + .IS_RSTRAMB_INVERTED(1'b0), + .IS_RSTREGARSTREG_INVERTED(1'b0), + .IS_RSTREGB_INVERTED(1'b1), + .RAM_MODE("TDP"), + .WRITE_MODE_A("WRITE_FIRST"), + .WRITE_MODE_B("WRITE_FIRST") + ) ram ( + .CLKARDCLK(din[0]), + .CLKBWRCLK(din[1]), + .ENARDEN(din[2]), + .ENBWREN(din[3]), + .REGCEAREGCE(din[4]), + .REGCEB(din[5]), + .RSTRAMARSTRAM(din[6]), + .RSTRAMB(din[7]), + .RSTREGARSTREG(din[0]), + .RSTREGB(din[1]), + .ADDRARDADDR(din[2]), + .ADDRBWRADDR(din[3]), + .DIADI(din[4]), + .DIBDI(din[5]), + .DIPADIP(din[6]), + .DIPBDIP(din[7]), + .WEA(din[0]), + .WEBWE(din[1]), + .DOADO(dout[0]), + .DOBDO(dout[1]), + .DOPADOP(dout[2]), + .DOPBDOP(dout[3])); +endmodule + diff --git a/minitests/bram_fixed/top_WRITE_MODE_A_NC.v b/minitests/bram_fixed/top_WRITE_MODE_A_NC.v new file mode 100644 index 00000000..5f768984 --- /dev/null +++ b/minitests/bram_fixed/top_WRITE_MODE_A_NC.v @@ -0,0 +1,213 @@ +module top(input clk, stb, di, output do); + localparam integer DIN_N = 8; + localparam integer DOUT_N = 8; + + reg [DIN_N-1:0] din; + wire [DOUT_N-1:0] dout; + + reg [DIN_N-1:0] din_shr; + reg [DOUT_N-1:0] dout_shr; + + always @(posedge clk) begin + din_shr <= {din_shr, di}; + dout_shr <= {dout_shr, din_shr[DIN_N-1]}; + if (stb) begin + din <= din_shr; + dout_shr <= dout; + end + end + + assign do = dout_shr[DOUT_N-1]; + + + + + + parameter INIT = 256'h0000000000000000000000000000000000000000000000000000000000000000; + + //(* LOC=LOC, BEL=BEL, KEEP, DONT_TOUCH *) + (* KEEP, DONT_TOUCH *) + RAMB36E1 #( + .INITP_00(INIT), + .INITP_01(INIT), + .INITP_02(INIT), + .INITP_03(INIT), + .INITP_04(INIT), + .INITP_05(INIT), + .INITP_06(INIT), + .INITP_07(INIT), + .INITP_08(INIT), + .INITP_09(INIT), + .INITP_0A(INIT), + .INITP_0B(INIT), + .INITP_0C(INIT), + .INITP_0D(INIT), + .INITP_0E(INIT), + .INITP_0F(INIT), + + .INIT_00(INIT), + .INIT_01(INIT), + .INIT_02(INIT), + .INIT_03(INIT), + .INIT_04(INIT), + .INIT_05(INIT), + .INIT_06(INIT), + .INIT_07(INIT), + .INIT_08(INIT), + .INIT_09(INIT), + .INIT_0A(INIT), + .INIT_0B(INIT), + .INIT_0C(INIT), + .INIT_0D(INIT), + .INIT_0E(INIT), + .INIT_0F(INIT), + .INIT_10(INIT), + .INIT_11(INIT), + .INIT_12(INIT), + .INIT_13(INIT), + .INIT_14(INIT), + .INIT_15(INIT), + .INIT_16(INIT), + .INIT_17(INIT), + .INIT_18(INIT), + .INIT_19(INIT), + .INIT_1A(INIT), + .INIT_1B(INIT), + .INIT_1C(INIT), + .INIT_1D(INIT), + .INIT_1E(INIT), + .INIT_1F(INIT), + .INIT_20(INIT), + .INIT_21(INIT), + .INIT_22(INIT), + .INIT_23(INIT), + .INIT_24(INIT), + .INIT_25(INIT), + .INIT_26(INIT), + .INIT_27(INIT), + .INIT_28(INIT), + .INIT_29(INIT), + .INIT_2A(INIT), + .INIT_2B(INIT), + .INIT_2C(INIT), + .INIT_2D(INIT), + .INIT_2E(INIT), + .INIT_2F(INIT), + .INIT_30(INIT), + .INIT_31(INIT), + .INIT_32(INIT), + .INIT_33(INIT), + .INIT_34(INIT), + .INIT_35(INIT), + .INIT_36(INIT), + .INIT_37(INIT), + .INIT_38(INIT), + .INIT_39(INIT), + .INIT_3A(INIT), + .INIT_3B(INIT), + .INIT_3C(INIT), + .INIT_3D(INIT), + .INIT_3E(INIT), + .INIT_3F(INIT), + + .INIT_40(INIT), + .INIT_41(INIT), + .INIT_42(INIT), + .INIT_43(INIT), + .INIT_44(INIT), + .INIT_45(INIT), + .INIT_46(INIT), + .INIT_47(INIT), + .INIT_48(INIT), + .INIT_49(INIT), + .INIT_4A(INIT), + .INIT_4B(INIT), + .INIT_4C(INIT), + .INIT_4D(INIT), + .INIT_4E(INIT), + .INIT_4F(INIT), + .INIT_50(INIT), + .INIT_51(INIT), + .INIT_52(INIT), + .INIT_53(INIT), + .INIT_54(INIT), + .INIT_55(INIT), + .INIT_56(INIT), + .INIT_57(INIT), + .INIT_58(INIT), + .INIT_59(INIT), + .INIT_5A(INIT), + .INIT_5B(INIT), + .INIT_5C(INIT), + .INIT_5D(INIT), + .INIT_5E(INIT), + .INIT_5F(INIT), + .INIT_60(INIT), + .INIT_61(INIT), + .INIT_62(INIT), + .INIT_63(INIT), + .INIT_64(INIT), + .INIT_65(INIT), + .INIT_66(INIT), + .INIT_67(INIT), + .INIT_68(INIT), + .INIT_69(INIT), + .INIT_6A(INIT), + .INIT_6B(INIT), + .INIT_6C(INIT), + .INIT_6D(INIT), + .INIT_6E(INIT), + .INIT_6F(INIT), + .INIT_70(INIT), + .INIT_71(INIT), + .INIT_72(INIT), + .INIT_73(INIT), + .INIT_74(INIT), + .INIT_75(INIT), + .INIT_76(INIT), + .INIT_77(INIT), + .INIT_78(INIT), + .INIT_79(INIT), + .INIT_7A(INIT), + .INIT_7B(INIT), + .INIT_7C(INIT), + .INIT_7D(INIT), + .INIT_7E(INIT), + .INIT_7F(INIT), + + .IS_CLKARDCLK_INVERTED(1'b0), + .IS_CLKBWRCLK_INVERTED(1'b0), + .IS_ENARDEN_INVERTED(1'b0), + .IS_ENBWREN_INVERTED(1'b0), + .IS_RSTRAMARSTRAM_INVERTED(1'b0), + .IS_RSTRAMB_INVERTED(1'b0), + .IS_RSTREGARSTREG_INVERTED(1'b0), + .IS_RSTREGB_INVERTED(1'b0), + .RAM_MODE("TDP"), + .WRITE_MODE_A("NO_CHANGE"), + .WRITE_MODE_B("WRITE_FIRST") + ) ram ( + .CLKARDCLK(din[0]), + .CLKBWRCLK(din[1]), + .ENARDEN(din[2]), + .ENBWREN(din[3]), + .REGCEAREGCE(din[4]), + .REGCEB(din[5]), + .RSTRAMARSTRAM(din[6]), + .RSTRAMB(din[7]), + .RSTREGARSTREG(din[0]), + .RSTREGB(din[1]), + .ADDRARDADDR(din[2]), + .ADDRBWRADDR(din[3]), + .DIADI(din[4]), + .DIBDI(din[5]), + .DIPADIP(din[6]), + .DIPBDIP(din[7]), + .WEA(din[0]), + .WEBWE(din[1]), + .DOADO(dout[0]), + .DOBDO(dout[1]), + .DOPADOP(dout[2]), + .DOPBDOP(dout[3])); +endmodule + diff --git a/minitests/bram_fixed/top_WRITE_MODE_A_RF.v b/minitests/bram_fixed/top_WRITE_MODE_A_RF.v new file mode 100644 index 00000000..efb8d2d8 --- /dev/null +++ b/minitests/bram_fixed/top_WRITE_MODE_A_RF.v @@ -0,0 +1,213 @@ +module top(input clk, stb, di, output do); + localparam integer DIN_N = 8; + localparam integer DOUT_N = 8; + + reg [DIN_N-1:0] din; + wire [DOUT_N-1:0] dout; + + reg [DIN_N-1:0] din_shr; + reg [DOUT_N-1:0] dout_shr; + + always @(posedge clk) begin + din_shr <= {din_shr, di}; + dout_shr <= {dout_shr, din_shr[DIN_N-1]}; + if (stb) begin + din <= din_shr; + dout_shr <= dout; + end + end + + assign do = dout_shr[DOUT_N-1]; + + + + + + parameter INIT = 256'h0000000000000000000000000000000000000000000000000000000000000000; + + //(* LOC=LOC, BEL=BEL, KEEP, DONT_TOUCH *) + (* KEEP, DONT_TOUCH *) + RAMB36E1 #( + .INITP_00(INIT), + .INITP_01(INIT), + .INITP_02(INIT), + .INITP_03(INIT), + .INITP_04(INIT), + .INITP_05(INIT), + .INITP_06(INIT), + .INITP_07(INIT), + .INITP_08(INIT), + .INITP_09(INIT), + .INITP_0A(INIT), + .INITP_0B(INIT), + .INITP_0C(INIT), + .INITP_0D(INIT), + .INITP_0E(INIT), + .INITP_0F(INIT), + + .INIT_00(INIT), + .INIT_01(INIT), + .INIT_02(INIT), + .INIT_03(INIT), + .INIT_04(INIT), + .INIT_05(INIT), + .INIT_06(INIT), + .INIT_07(INIT), + .INIT_08(INIT), + .INIT_09(INIT), + .INIT_0A(INIT), + .INIT_0B(INIT), + .INIT_0C(INIT), + .INIT_0D(INIT), + .INIT_0E(INIT), + .INIT_0F(INIT), + .INIT_10(INIT), + .INIT_11(INIT), + .INIT_12(INIT), + .INIT_13(INIT), + .INIT_14(INIT), + .INIT_15(INIT), + .INIT_16(INIT), + .INIT_17(INIT), + .INIT_18(INIT), + .INIT_19(INIT), + .INIT_1A(INIT), + .INIT_1B(INIT), + .INIT_1C(INIT), + .INIT_1D(INIT), + .INIT_1E(INIT), + .INIT_1F(INIT), + .INIT_20(INIT), + .INIT_21(INIT), + .INIT_22(INIT), + .INIT_23(INIT), + .INIT_24(INIT), + .INIT_25(INIT), + .INIT_26(INIT), + .INIT_27(INIT), + .INIT_28(INIT), + .INIT_29(INIT), + .INIT_2A(INIT), + .INIT_2B(INIT), + .INIT_2C(INIT), + .INIT_2D(INIT), + .INIT_2E(INIT), + .INIT_2F(INIT), + .INIT_30(INIT), + .INIT_31(INIT), + .INIT_32(INIT), + .INIT_33(INIT), + .INIT_34(INIT), + .INIT_35(INIT), + .INIT_36(INIT), + .INIT_37(INIT), + .INIT_38(INIT), + .INIT_39(INIT), + .INIT_3A(INIT), + .INIT_3B(INIT), + .INIT_3C(INIT), + .INIT_3D(INIT), + .INIT_3E(INIT), + .INIT_3F(INIT), + + .INIT_40(INIT), + .INIT_41(INIT), + .INIT_42(INIT), + .INIT_43(INIT), + .INIT_44(INIT), + .INIT_45(INIT), + .INIT_46(INIT), + .INIT_47(INIT), + .INIT_48(INIT), + .INIT_49(INIT), + .INIT_4A(INIT), + .INIT_4B(INIT), + .INIT_4C(INIT), + .INIT_4D(INIT), + .INIT_4E(INIT), + .INIT_4F(INIT), + .INIT_50(INIT), + .INIT_51(INIT), + .INIT_52(INIT), + .INIT_53(INIT), + .INIT_54(INIT), + .INIT_55(INIT), + .INIT_56(INIT), + .INIT_57(INIT), + .INIT_58(INIT), + .INIT_59(INIT), + .INIT_5A(INIT), + .INIT_5B(INIT), + .INIT_5C(INIT), + .INIT_5D(INIT), + .INIT_5E(INIT), + .INIT_5F(INIT), + .INIT_60(INIT), + .INIT_61(INIT), + .INIT_62(INIT), + .INIT_63(INIT), + .INIT_64(INIT), + .INIT_65(INIT), + .INIT_66(INIT), + .INIT_67(INIT), + .INIT_68(INIT), + .INIT_69(INIT), + .INIT_6A(INIT), + .INIT_6B(INIT), + .INIT_6C(INIT), + .INIT_6D(INIT), + .INIT_6E(INIT), + .INIT_6F(INIT), + .INIT_70(INIT), + .INIT_71(INIT), + .INIT_72(INIT), + .INIT_73(INIT), + .INIT_74(INIT), + .INIT_75(INIT), + .INIT_76(INIT), + .INIT_77(INIT), + .INIT_78(INIT), + .INIT_79(INIT), + .INIT_7A(INIT), + .INIT_7B(INIT), + .INIT_7C(INIT), + .INIT_7D(INIT), + .INIT_7E(INIT), + .INIT_7F(INIT), + + .IS_CLKARDCLK_INVERTED(1'b0), + .IS_CLKBWRCLK_INVERTED(1'b0), + .IS_ENARDEN_INVERTED(1'b0), + .IS_ENBWREN_INVERTED(1'b0), + .IS_RSTRAMARSTRAM_INVERTED(1'b0), + .IS_RSTRAMB_INVERTED(1'b0), + .IS_RSTREGARSTREG_INVERTED(1'b0), + .IS_RSTREGB_INVERTED(1'b0), + .RAM_MODE("READ_FIRST"), + .WRITE_MODE_A("READ_FIRST"), + .WRITE_MODE_B("WRITE_FIRST") + ) ram ( + .CLKARDCLK(din[0]), + .CLKBWRCLK(din[1]), + .ENARDEN(din[2]), + .ENBWREN(din[3]), + .REGCEAREGCE(din[4]), + .REGCEB(din[5]), + .RSTRAMARSTRAM(din[6]), + .RSTRAMB(din[7]), + .RSTREGARSTREG(din[0]), + .RSTREGB(din[1]), + .ADDRARDADDR(din[2]), + .ADDRBWRADDR(din[3]), + .DIADI(din[4]), + .DIBDI(din[5]), + .DIPADIP(din[6]), + .DIPBDIP(din[7]), + .WEA(din[0]), + .WEBWE(din[1]), + .DOADO(dout[0]), + .DOBDO(dout[1]), + .DOPADOP(dout[2]), + .DOPBDOP(dout[3])); +endmodule + diff --git a/minitests/bram_fixed/top_ref.v b/minitests/bram_fixed/top_ref.v new file mode 100644 index 00000000..f0660857 --- /dev/null +++ b/minitests/bram_fixed/top_ref.v @@ -0,0 +1,213 @@ +module top(input clk, stb, di, output do); + localparam integer DIN_N = 8; + localparam integer DOUT_N = 8; + + reg [DIN_N-1:0] din; + wire [DOUT_N-1:0] dout; + + reg [DIN_N-1:0] din_shr; + reg [DOUT_N-1:0] dout_shr; + + always @(posedge clk) begin + din_shr <= {din_shr, di}; + dout_shr <= {dout_shr, din_shr[DIN_N-1]}; + if (stb) begin + din <= din_shr; + dout_shr <= dout; + end + end + + assign do = dout_shr[DOUT_N-1]; + + + + + + parameter INIT = 256'h0000000000000000000000000000000000000000000000000000000000000000; + + //(* LOC=LOC, BEL=BEL, KEEP, DONT_TOUCH *) + (* KEEP, DONT_TOUCH *) + RAMB36E1 #( + .INITP_00(INIT), + .INITP_01(INIT), + .INITP_02(INIT), + .INITP_03(INIT), + .INITP_04(INIT), + .INITP_05(INIT), + .INITP_06(INIT), + .INITP_07(INIT), + .INITP_08(INIT), + .INITP_09(INIT), + .INITP_0A(INIT), + .INITP_0B(INIT), + .INITP_0C(INIT), + .INITP_0D(INIT), + .INITP_0E(INIT), + .INITP_0F(INIT), + + .INIT_00(INIT), + .INIT_01(INIT), + .INIT_02(INIT), + .INIT_03(INIT), + .INIT_04(INIT), + .INIT_05(INIT), + .INIT_06(INIT), + .INIT_07(INIT), + .INIT_08(INIT), + .INIT_09(INIT), + .INIT_0A(INIT), + .INIT_0B(INIT), + .INIT_0C(INIT), + .INIT_0D(INIT), + .INIT_0E(INIT), + .INIT_0F(INIT), + .INIT_10(INIT), + .INIT_11(INIT), + .INIT_12(INIT), + .INIT_13(INIT), + .INIT_14(INIT), + .INIT_15(INIT), + .INIT_16(INIT), + .INIT_17(INIT), + .INIT_18(INIT), + .INIT_19(INIT), + .INIT_1A(INIT), + .INIT_1B(INIT), + .INIT_1C(INIT), + .INIT_1D(INIT), + .INIT_1E(INIT), + .INIT_1F(INIT), + .INIT_20(INIT), + .INIT_21(INIT), + .INIT_22(INIT), + .INIT_23(INIT), + .INIT_24(INIT), + .INIT_25(INIT), + .INIT_26(INIT), + .INIT_27(INIT), + .INIT_28(INIT), + .INIT_29(INIT), + .INIT_2A(INIT), + .INIT_2B(INIT), + .INIT_2C(INIT), + .INIT_2D(INIT), + .INIT_2E(INIT), + .INIT_2F(INIT), + .INIT_30(INIT), + .INIT_31(INIT), + .INIT_32(INIT), + .INIT_33(INIT), + .INIT_34(INIT), + .INIT_35(INIT), + .INIT_36(INIT), + .INIT_37(INIT), + .INIT_38(INIT), + .INIT_39(INIT), + .INIT_3A(INIT), + .INIT_3B(INIT), + .INIT_3C(INIT), + .INIT_3D(INIT), + .INIT_3E(INIT), + .INIT_3F(INIT), + + .INIT_40(INIT), + .INIT_41(INIT), + .INIT_42(INIT), + .INIT_43(INIT), + .INIT_44(INIT), + .INIT_45(INIT), + .INIT_46(INIT), + .INIT_47(INIT), + .INIT_48(INIT), + .INIT_49(INIT), + .INIT_4A(INIT), + .INIT_4B(INIT), + .INIT_4C(INIT), + .INIT_4D(INIT), + .INIT_4E(INIT), + .INIT_4F(INIT), + .INIT_50(INIT), + .INIT_51(INIT), + .INIT_52(INIT), + .INIT_53(INIT), + .INIT_54(INIT), + .INIT_55(INIT), + .INIT_56(INIT), + .INIT_57(INIT), + .INIT_58(INIT), + .INIT_59(INIT), + .INIT_5A(INIT), + .INIT_5B(INIT), + .INIT_5C(INIT), + .INIT_5D(INIT), + .INIT_5E(INIT), + .INIT_5F(INIT), + .INIT_60(INIT), + .INIT_61(INIT), + .INIT_62(INIT), + .INIT_63(INIT), + .INIT_64(INIT), + .INIT_65(INIT), + .INIT_66(INIT), + .INIT_67(INIT), + .INIT_68(INIT), + .INIT_69(INIT), + .INIT_6A(INIT), + .INIT_6B(INIT), + .INIT_6C(INIT), + .INIT_6D(INIT), + .INIT_6E(INIT), + .INIT_6F(INIT), + .INIT_70(INIT), + .INIT_71(INIT), + .INIT_72(INIT), + .INIT_73(INIT), + .INIT_74(INIT), + .INIT_75(INIT), + .INIT_76(INIT), + .INIT_77(INIT), + .INIT_78(INIT), + .INIT_79(INIT), + .INIT_7A(INIT), + .INIT_7B(INIT), + .INIT_7C(INIT), + .INIT_7D(INIT), + .INIT_7E(INIT), + .INIT_7F(INIT), + + .IS_CLKARDCLK_INVERTED(1'b0), + .IS_CLKBWRCLK_INVERTED(1'b0), + .IS_ENARDEN_INVERTED(1'b0), + .IS_ENBWREN_INVERTED(1'b0), + .IS_RSTRAMARSTRAM_INVERTED(1'b0), + .IS_RSTRAMB_INVERTED(1'b0), + .IS_RSTREGARSTREG_INVERTED(1'b0), + .IS_RSTREGB_INVERTED(1'b0), + .RAM_MODE("TDP"), + .WRITE_MODE_A("WRITE_FIRST"), + .WRITE_MODE_B("WRITE_FIRST") + ) ram ( + .CLKARDCLK(din[0]), + .CLKBWRCLK(din[1]), + .ENARDEN(din[2]), + .ENBWREN(din[3]), + .REGCEAREGCE(din[4]), + .REGCEB(din[5]), + .RSTRAMARSTRAM(din[6]), + .RSTRAMB(din[7]), + .RSTREGARSTREG(din[0]), + .RSTREGB(din[1]), + .ADDRARDADDR(din[2]), + .ADDRBWRADDR(din[3]), + .DIADI(din[4]), + .DIBDI(din[5]), + .DIPADIP(din[6]), + .DIPBDIP(din[7]), + .WEA(din[0]), + .WEBWE(din[1]), + .DOADO(dout[0]), + .DOBDO(dout[1]), + .DOPADOP(dout[2]), + .DOPBDOP(dout[3])); +endmodule +