From a84da31c0c37806510ae61edfd35a268997a36d3 Mon Sep 17 00:00:00 2001 From: Keith Rothman <537074+litghost@users.noreply.github.com> Date: Thu, 1 Aug 2019 11:06:18 -0700 Subject: [PATCH] Move ILOGIC and OLOGIC to IOI3 tiles for consistency. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com> --- fuzzers/035-iob-ilogic/Makefile | 26 +++++++++++++++++--------- fuzzers/035-iob-ilogic/generate.py | 19 ++++++++++--------- fuzzers/036-iob-ologic/Makefile | 26 +++++++++++++++++--------- fuzzers/036-iob-ologic/generate.py | 10 ++++++---- 4 files changed, 50 insertions(+), 31 deletions(-) diff --git a/fuzzers/035-iob-ilogic/Makefile b/fuzzers/035-iob-ilogic/Makefile index a8780e89..b72691fd 100644 --- a/fuzzers/035-iob-ilogic/Makefile +++ b/fuzzers/035-iob-ilogic/Makefile @@ -1,20 +1,28 @@ N := 30 include ../fuzzer.mk -database: build/segbits_xiob33.db +database: build/segbits_xioi3.db -build/segbits_xiob33.rdb: $(SPECIMENS_OK) - ${XRAY_SEGMATCH} -c 6 -o build/segbits_xiob33.rdb $$(find -name segdata_liob33.txt) $$(find -name segdata_riob33.txt) +build/segbits_xioi3.rdb: $(SPECIMENS_OK) + ${XRAY_SEGMATCH} -c 6 -o build/segbits_xioi3.rdb $$(find -name segdata_*) -build/segbits_xiob33.db: build/segbits_xiob33.rdb +build/segbits_xioi3.db: build/segbits_xioi3.rdb ${XRAY_DBFIXUP} --db-root build --zero-db bits.dbf --seg-fn-in $^ --seg-fn-out $@ - ${XRAY_MASKMERGE} build/mask_xiob33.db $$(find -name segdata_liob33.txt) $$(find -name segdata_riob33.txt) + ${XRAY_MASKMERGE} build/mask_xioi3.db $$(find -name segdata_*) pushdb: - ${XRAY_MERGEDB} liob33 build/segbits_xiob33.db - ${XRAY_MERGEDB} riob33 build/segbits_xiob33.db - ${XRAY_MERGEDB} mask_liob33 build/mask_xiob33.db - ${XRAY_MERGEDB} mask_riob33 build/mask_xiob33.db + ${XRAY_MERGEDB} lioi3 build/segbits_xioi3.db + ${XRAY_MERGEDB} lioi3_tbytesrc build/segbits_xioi3.db + ${XRAY_MERGEDB} lioi3_tbyteterm build/segbits_xioi3.db + ${XRAY_MERGEDB} rioi3 build/segbits_xioi3.db + ${XRAY_MERGEDB} rioi3_tbytesrc build/segbits_xioi3.db + ${XRAY_MERGEDB} rioi3_tbyteterm build/segbits_xioi3.db + ${XRAY_MERGEDB} mask_lioi3 build/mask_xioi3.db + ${XRAY_MERGEDB} mask_lioi3_tbytesrc build/mask_xioi3.db + ${XRAY_MERGEDB} mask_lioi3_tbyteterm build/mask_xioi3.db + ${XRAY_MERGEDB} mask_rioi3 build/mask_xioi3.db + ${XRAY_MERGEDB} mask_rioi3_tbytesrc build/mask_xioi3.db + ${XRAY_MERGEDB} mask_rioi3_tbyteterm build/mask_xioi3.db .PHONY: database pushdb diff --git a/fuzzers/035-iob-ilogic/generate.py b/fuzzers/035-iob-ilogic/generate.py index de5b2672..93b9fc4c 100644 --- a/fuzzers/035-iob-ilogic/generate.py +++ b/fuzzers/035-iob-ilogic/generate.py @@ -19,6 +19,8 @@ def handle_data_width(segmk, d): if 'DATA_WIDTH' not in d: return + site = d['ilogic_loc'] + # It appears several widths end up with the same bitstream pattern. # This groups those widths together for documentation. widths = [ @@ -40,31 +42,30 @@ def handle_data_width(segmk, d): zero_opt = 2 W_OPT_ZERO = width_map[zero_opt] if d['DATA_WIDTH'] == zero_opt: - segmk.add_site_tag( - d['site'], 'ISERDES.DATA_WIDTH.{}'.format(W_OPT_ZERO), 1) + segmk.add_site_tag(site, 'ISERDES.DATA_WIDTH.{}'.format(W_OPT_ZERO), 1) for opt in width_map.values(): if opt == W_OPT_ZERO: continue - segmk.add_site_tag( - d['site'], 'ISERDES.DATA_WIDTH.{}'.format(opt), 0) + segmk.add_site_tag(site, 'ISERDES.DATA_WIDTH.{}'.format(opt), 0) else: w_opt = width_map[d['DATA_WIDTH']] if w_opt != W_OPT_ZERO: segmk.add_site_tag( - d['site'], 'ISERDES.DATA_WIDTH.{}'.format(W_OPT_ZERO), 0) - segmk.add_site_tag( - d['site'], 'ISERDES.DATA_WIDTH.{}'.format(w_opt), 1) + site, 'ISERDES.DATA_WIDTH.{}'.format(W_OPT_ZERO), 0) + segmk.add_site_tag(site, 'ISERDES.DATA_WIDTH.{}'.format(w_opt), 1) def handle_data_rate(segmk, d): if 'DATA_WIDTH' not in d: return + site = d['ilogic_loc'] + for opt in ['SDR', 'DDR']: segmk.add_site_tag( - d['site'], 'ISERDES.DATA_RATE.{}'.format(opt), + site, 'ISERDES.DATA_RATE.{}'.format(opt), verilog.unquote(d['DATA_RATE']) == opt) @@ -76,7 +77,7 @@ def main(): design = json.load(f) for d in design: - site = d['site'] + site = d['ilogic_loc'] handle_data_width(segmk, d) handle_data_rate(segmk, d) diff --git a/fuzzers/036-iob-ologic/Makefile b/fuzzers/036-iob-ologic/Makefile index 63e4b3ad..7810a83f 100644 --- a/fuzzers/036-iob-ologic/Makefile +++ b/fuzzers/036-iob-ologic/Makefile @@ -1,20 +1,28 @@ N := 40 include ../fuzzer.mk -database: build/segbits_xiob33.db +database: build/segbits_xioi3.db -build/segbits_xiob33.rdb: $(SPECIMENS_OK) - ${XRAY_SEGMATCH} -c 6 -o build/segbits_xiob33.rdb $$(find -name segdata_liob33.txt) $$(find -name segdata_riob33.txt) +build/segbits_xioi3.rdb: $(SPECIMENS_OK) + ${XRAY_SEGMATCH} -c 6 -o build/segbits_xioi3.rdb $$(find -name segdata_*) -build/segbits_xiob33.db: build/segbits_xiob33.rdb +build/segbits_xioi3.db: build/segbits_xioi3.rdb ${XRAY_DBFIXUP} --db-root build --zero-db bits.dbf --seg-fn-in $^ --seg-fn-out $@ - ${XRAY_MASKMERGE} build/mask_xiob33.db $$(find -name segdata_liob33.txt) $$(find -name segdata_riob33.txt) + ${XRAY_MASKMERGE} build/mask_xioi3.db $$(find -name segdata_*) pushdb: - ${XRAY_MERGEDB} liob33 build/segbits_xiob33.db - ${XRAY_MERGEDB} riob33 build/segbits_xiob33.db - ${XRAY_MERGEDB} mask_liob33 build/mask_xiob33.db - ${XRAY_MERGEDB} mask_riob33 build/mask_xiob33.db + ${XRAY_MERGEDB} lioi3 build/segbits_xioi3.db + ${XRAY_MERGEDB} lioi3_tbytesrc build/segbits_xioi3.db + ${XRAY_MERGEDB} lioi3_tbyteterm build/segbits_xioi3.db + ${XRAY_MERGEDB} rioi3 build/segbits_xioi3.db + ${XRAY_MERGEDB} rioi3_tbytesrc build/segbits_xioi3.db + ${XRAY_MERGEDB} rioi3_tbyteterm build/segbits_xioi3.db + ${XRAY_MERGEDB} mask_lioi3 build/mask_xioi3.db + ${XRAY_MERGEDB} mask_lioi3_tbytesrc build/mask_xioi3.db + ${XRAY_MERGEDB} mask_lioi3_tbyteterm build/mask_xioi3.db + ${XRAY_MERGEDB} mask_rioi3 build/mask_xioi3.db + ${XRAY_MERGEDB} mask_rioi3_tbytesrc build/mask_xioi3.db + ${XRAY_MERGEDB} mask_rioi3_tbyteterm build/mask_xioi3.db .PHONY: database pushdb diff --git a/fuzzers/036-iob-ologic/generate.py b/fuzzers/036-iob-ologic/generate.py index 197e7f91..4a7b3355 100644 --- a/fuzzers/036-iob-ologic/generate.py +++ b/fuzzers/036-iob-ologic/generate.py @@ -19,23 +19,25 @@ def handle_data_width(segmk, d): if 'DATA_WIDTH' not in d: return + site = d['ologic_loc'] + for opt in [2, 3, 4, 5, 6, 7, 8]: segmk.add_site_tag( - d['site'], 'OSERDESE.DATA_WIDTH.W{}'.format(opt), + site, 'OSERDESE.DATA_WIDTH.W{}'.format(opt), d['DATA_WIDTH'] == opt) if verilog.unquote(d['DATA_RATE_OQ']) == 'DDR': # DDR + WIDTH 6/8 have some overlapping bits, create a feature. OVERLAPPING_WIDTHS = [6, 8] segmk.add_site_tag( - d['site'], 'OSERDESE.DATA_WIDTH.DDR.W{}'.format( + site, 'OSERDESE.DATA_WIDTH.DDR.W{}'.format( '_'.join(map(str, OVERLAPPING_WIDTHS))), d['DATA_WIDTH'] in OVERLAPPING_WIDTHS) else: # SDR + WIDTH 2/4/5/6 have some overlapping bits, create a feature. OVERLAPPING_WIDTHS = [2, 4, 5, 6] segmk.add_site_tag( - d['site'], 'OSERDESE.DATA_WIDTH.SDR.W{}'.format( + site, 'OSERDESE.DATA_WIDTH.SDR.W{}'.format( '_'.join(map(str, OVERLAPPING_WIDTHS))), d['DATA_WIDTH'] in OVERLAPPING_WIDTHS) @@ -48,7 +50,7 @@ def main(): design = json.load(f) for d in design: - site = d['site'] + site = d['ologic_loc'] handle_data_width(segmk, d)