diff --git a/docs/dev_database/common/cell_data.rst b/docs/dev_database/common/cell_data.rst index 07dbf8da..37b0dcd4 100644 --- a/docs/dev_database/common/cell_data.rst +++ b/docs/dev_database/common/cell_data.rst @@ -65,7 +65,8 @@ Ports files This is a JSON file containing a dictionary of ports, each one with two attributes: - - Direction: Corresponds to the port directiona and can have the ``input`` or ``output`` values. + - Direction: Corresponds to the port directiona and can have the ``input``, ``output``, ``clock`` values. + Note that the ``clock`` value is implicitly considered also as an ``input``. - Width: Indicates the width of the port bus. As an example of parameter please, refer to the following:: diff --git a/fuzzers/061-pcie-conf/generate_ports.tcl b/fuzzers/061-pcie-conf/generate_ports.tcl index 603d37ef..262fe225 100644 --- a/fuzzers/061-pcie-conf/generate_ports.tcl +++ b/fuzzers/061-pcie-conf/generate_ports.tcl @@ -6,28 +6,7 @@ # # SPDX-License-Identifier: ISC -proc dump_pins {file_name site_prefix} { - set fp [open $file_name w] - - puts $fp "name,is_input,is_output" - set site [lindex [get_sites $site_prefix*] 0] - - set pins [get_site_pins -of_objects $site] - foreach pin $pins { - set connected_pip [get_pips -of_objects [get_nodes -of_objects $pin]] - - if { $connected_pip == "" } { - continue - } - - set pin_name [lindex [split $pin "/"] 1] - set is_input [get_property IS_INPUT $pin] - set is_output [get_property IS_OUTPUT $pin] - - puts $fp "$pin_name,$is_input,$is_output" - } - close $fp -} +source "$::env(XRAY_DIR)/utils/utils.tcl" create_project -force -name design -part $::env(XRAY_PART) set_property design_mode PinPlanning [current_fileset] diff --git a/fuzzers/063-gtp-common-conf/generate_ports.tcl b/fuzzers/063-gtp-common-conf/generate_ports.tcl index 75f7c7ff..4dab6783 100644 --- a/fuzzers/063-gtp-common-conf/generate_ports.tcl +++ b/fuzzers/063-gtp-common-conf/generate_ports.tcl @@ -6,28 +6,7 @@ # # SPDX-License-Identifier: ISC -proc dump_pins {file_name site_prefix} { - set fp [open $file_name w] - - puts $fp "name,is_input,is_output" - set site [lindex [get_sites $site_prefix*] 0] - - set pins [get_site_pins -of_objects $site] - foreach pin $pins { - set connected_pip [get_pips -of_objects [get_nodes -of_objects $pin]] - - if { $connected_pip == "" } { - continue - } - - set pin_name [lindex [split $pin "/"] 1] - set is_input [get_property IS_INPUT $pin] - set is_output [get_property IS_OUTPUT $pin] - - puts $fp "$pin_name,$is_input,$is_output" - } - close $fp -} +source "$::env(XRAY_DIR)/utils/utils.tcl" create_project -force -name design -part $::env(XRAY_PART) set_property design_mode PinPlanning [current_fileset] diff --git a/fuzzers/064-gtp-channel-conf/attrs.json b/fuzzers/064-gtp-channel-conf/attrs.json index f852a255..6c1e0227 100644 --- a/fuzzers/064-gtp-channel-conf/attrs.json +++ b/fuzzers/064-gtp-channel-conf/attrs.json @@ -904,13 +904,13 @@ "type": "INT", "values": [1, 2, 4, 8], "encoding": [0, 1, 2, 3], - "digits": 3 + "digits": 2 }, "RXOUT_DIV": { "type": "INT", "values": [1, 2, 4, 8], "encoding": [0, 1, 2, 3], - "digits": 3 + "digits": 2 }, "CFOK_CFG": { "type": "BIN", diff --git a/fuzzers/064-gtp-channel-conf/generate_ports.tcl b/fuzzers/064-gtp-channel-conf/generate_ports.tcl index f8479240..2c1d63c6 100644 --- a/fuzzers/064-gtp-channel-conf/generate_ports.tcl +++ b/fuzzers/064-gtp-channel-conf/generate_ports.tcl @@ -6,28 +6,7 @@ # # SPDX-License-Identifier: ISC -proc dump_pins {file_name site_prefix} { - set fp [open $file_name w] - - puts $fp "name,is_input,is_output" - set site [lindex [get_sites $site_prefix*] 0] - - set pins [get_site_pins -of_objects $site] - foreach pin $pins { - set connected_pip [get_pips -of_objects [get_nodes -of_objects $pin]] - - if { $connected_pip == "" } { - continue - } - - set pin_name [lindex [split $pin "/"] 1] - set is_input [get_property IS_INPUT $pin] - set is_output [get_property IS_OUTPUT $pin] - - puts $fp "$pin_name,$is_input,$is_output" - } - close $fp -} +source "$::env(XRAY_DIR)/utils/utils.tcl" create_project -force -name design -part $::env(XRAY_PART) set_property design_mode PinPlanning [current_fileset] diff --git a/utils/make_ports.py b/utils/make_ports.py index e31600c3..27eecdab 100644 --- a/utils/make_ports.py +++ b/utils/make_ports.py @@ -81,9 +81,12 @@ def main(): # Get direction is_input = int(pin["is_input"]) is_output = int(pin["is_output"]) + is_clock = int(pin["is_clock"]) if is_input: direction = "input" + if is_clock: + direction = "clock" elif is_output: direction = "output" else: diff --git a/utils/update_resources.py b/utils/update_resources.py index 275aea6c..3b2209dd 100755 --- a/utils/update_resources.py +++ b/utils/update_resources.py @@ -13,6 +13,8 @@ import yaml import subprocess import os import re +import tempfile +import json from prjxray import util @@ -39,23 +41,36 @@ def main(): information = {} parts = util.get_parts(args.db_root) + processed_parts = dict() for part in parts.keys(): + # Skip parts which differ only in the speedgrade, as they have the same pins + fields = part.split("-") + common_part = fields[0] + if common_part in processed_parts: + information[part] = processed_parts[common_part] + continue + print("Find pins for {}".format(part)) env['XRAY_PART'] = part + _, tmp_file = tempfile.mkstemp() # Asks with get_package_pins and different filters for pins with # specific properties. - command = "{} -mode batch -source update_resources.tcl".format( - env['XRAY_VIVADO']) + command = "env TMP_FILE={} {} -mode batch -source update_resources.tcl".format( + tmp_file, env['XRAY_VIVADO']) result = subprocess.run( command.split(' '), check=True, env=env, cwd=cwd, stdout=subprocess.PIPE) - # Formats the output and stores the pins - output = result.stdout.decode('utf-8').splitlines() - clk_pins = output[-4].split(' ') - data_pins = output[-2].strip().split(' ') + + with open(tmp_file, "r") as fp: + pins_json = json.load(fp) + + os.remove(tmp_file) + + clk_pins = pins_json["clk_pins"].split() + data_pins = pins_json["data_pins"].split() pins = { 0: clk_pins[0], 1: data_pins[0], @@ -63,6 +78,7 @@ def main(): 3: data_pins[-1] } information[part] = {'pins': pins} + processed_parts[common_part] = {'pins': pins} # Overwrites the /resources.yaml file completly with new data util.set_part_resources(resource_path, information) diff --git a/utils/update_resources.tcl b/utils/update_resources.tcl index a95f1e06..292041db 100644 --- a/utils/update_resources.tcl +++ b/utils/update_resources.tcl @@ -21,5 +21,9 @@ foreach bank [split $banks " "] { append data_pins " " [get_package_pins -filter "IS_GENERAL_PURPOSE && BANK==$bank"] } -puts $clk_pins -puts $data_pins +set fp [open $::env(TMP_FILE) w] + +puts $fp "{" + puts $fp "\t\"clk_pins\": \"$clk_pins\"," + puts $fp "\t\"data_pins\": \"$data_pins\"" +puts $fp "}" diff --git a/utils/utils.tcl b/utils/utils.tcl index 751f8847..83c8cba0 100644 --- a/utils/utils.tcl +++ b/utils/utils.tcl @@ -168,3 +168,37 @@ proc generate_top {} { write_checkpoint -force design.dcp write_bitstream -force design.bit } + +# Dumps all pins of a site, with the direction info (clock, input, output) +proc dump_pins {file_name site_prefix} { + set fp [open $file_name w] + + puts $fp "name,is_input,is_output,is_clock" + set site [lindex [get_sites $site_prefix*] 0] + set bel [get_bels -of_objects $site] + set bel_pins [get_bel_pins -of_objects $bel] + + set bel_pins_dict [dict create] + foreach pin $bel_pins { + set pin_name [lindex [split $pin "/"] 2] + set is_clock [get_property IS_CLOCK $pin] + dict set bel_pins_dict $pin_name $is_clock + } + + set site_pins [get_site_pins -of_objects $site] + foreach pin $site_pins { + set connected_pip [get_pips -of_objects [get_nodes -of_objects $pin]] + + if { $connected_pip == "" } { + continue + } + + set pin_name [lindex [split $pin "/"] 1] + set is_input [get_property IS_INPUT $pin] + set is_output [get_property IS_OUTPUT $pin] + set is_clock [dict get $bel_pins_dict $pin_name] + + puts $fp "$pin_name,$is_input,$is_output,$is_clock" + } + close $fp +}