From 99c5e9f4b54d6b9e2862e7ee840f76c40cfc7c62 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sun, 19 Nov 2017 05:25:17 +0100 Subject: [PATCH] Add fuzzers/052-clkin Signed-off-by: Clifford Wolf Signed-off-by: Tim 'mithro' Ansell --- fuzzers/052-clkin/.gitignore | 13 ++++++ fuzzers/052-clkin/Makefile | 29 ++++++++++++ fuzzers/052-clkin/generate.sh | 9 ++++ fuzzers/052-clkin/generate.tcl | 85 ++++++++++++++++++++++++++++++++++ fuzzers/052-clkin/maketodo.py | 21 +++++++++ fuzzers/052-clkin/piplist.tcl | 39 ++++++++++++++++ fuzzers/052-clkin/top.v | 3 ++ 7 files changed, 199 insertions(+) create mode 100644 fuzzers/052-clkin/.gitignore create mode 100644 fuzzers/052-clkin/Makefile create mode 100644 fuzzers/052-clkin/generate.sh create mode 100644 fuzzers/052-clkin/generate.tcl create mode 100644 fuzzers/052-clkin/maketodo.py create mode 100644 fuzzers/052-clkin/piplist.tcl create mode 100644 fuzzers/052-clkin/top.v diff --git a/fuzzers/052-clkin/.gitignore b/fuzzers/052-clkin/.gitignore new file mode 100644 index 00000000..9c926485 --- /dev/null +++ b/fuzzers/052-clkin/.gitignore @@ -0,0 +1,13 @@ +/filtered_seg_int_l.segbits +/filtered_seg_int_r.segbits +/pattern_l.txt +/pattern_r.txt +/piplist.dcp +/piplist/ +/pips_int_l.txt +/pips_int_r.txt +/seg_int_l.segbits +/seg_int_r.segbits +/specimen_[0-9][0-9][0-9]/ +/todo.txt +/vivado* diff --git a/fuzzers/052-clkin/Makefile b/fuzzers/052-clkin/Makefile new file mode 100644 index 00000000..3edb4f05 --- /dev/null +++ b/fuzzers/052-clkin/Makefile @@ -0,0 +1,29 @@ + +N := 10 +SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N))) +SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS)) + +database: $(SPECIMENS_OK) + ${XRAY_SEGMATCH} -m 5 -M 15 -o seg_int_l.segbits $(addsuffix /segdata_clbl[lm]_l.txt,$(SPECIMENS)) + ${XRAY_SEGMATCH} -m 5 -M 15 -o seg_int_r.segbits $(addsuffix /segdata_clbl[lm]_r.txt,$(SPECIMENS)) + +pushdb: + ${XRAY_MERGEDB} int_l seg_int_l.segbits + ${XRAY_MERGEDB} int_r seg_int_r.segbits + ${XRAY_DBFIXUP} + +$(SPECIMENS_OK): todo.txt + bash generate.sh $(subst /OK,,$@) + touch $@ + +todo.txt: + vivado -mode batch -source piplist.tcl + python3 maketodo.py | sort -R | head -n10 > todo.txt + +clean: + rm -rf .Xil/ .cache/ filtered_seg_int_[lr].segbits + rm -rf todo.txt vivado* piplist/ piplist.dcp pattern_[lr].txt pips_int_[lr].txt + rm -rf specimen_[0-9][0-9][0-9]/ seg_int_[lr].segbits mask_clbl[lm]_[lr].segbits + +.PHONY: database pushdb clean + diff --git a/fuzzers/052-clkin/generate.sh b/fuzzers/052-clkin/generate.sh new file mode 100644 index 00000000..4aa8d11e --- /dev/null +++ b/fuzzers/052-clkin/generate.sh @@ -0,0 +1,9 @@ +#!/bin/bash + +source ${XRAY_GENHEADER} + +vivado -mode batch -source ../generate.tcl + +${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit +python3 ../../050-intpips/generate.py + diff --git a/fuzzers/052-clkin/generate.tcl b/fuzzers/052-clkin/generate.tcl new file mode 100644 index 00000000..6e76bd36 --- /dev/null +++ b/fuzzers/052-clkin/generate.tcl @@ -0,0 +1,85 @@ +create_project -force -part $::env(XRAY_PART) design design + +read_verilog ../top.v +synth_design -top top + +set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports i] +set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports o] + +create_pblock roi +resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)" + +set_property CFGBVS VCCO [current_design] +set_property CONFIG_VOLTAGE 3.3 [current_design] +set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design] + +place_design +route_design + +# write_checkpoint -force design.dcp + +source ../../../utils/utils.tcl + +set fp [open "../todo.txt" r] +set todo_lines {} +for {gets $fp line} {$line != ""} {gets $fp line} { + lappend todo_lines [split $line .] +} +close $fp + +set int_l_tiles [randsample_list [llength $todo_lines] [filter [pblock_tiles roi] {TYPE == INT_L}]] +set int_r_tiles [randsample_list [llength $todo_lines] [filter [pblock_tiles roi] {TYPE == INT_R}]] + +for {set idx 0} {$idx < [llength $todo_lines]} {incr idx} { + set line [lindex $todo_lines $idx] + puts "== $idx: $line" + + set tile_type [lindex $line 0] + set dst_wire [lindex $line 1] + set src_wire [lindex $line 2] + + if {$tile_type == "INT_L"} {set tile [lindex $int_l_tiles $idx]; set other_tile [lindex $int_r_tiles $idx]} + if {$tile_type == "INT_R"} {set tile [lindex $int_r_tiles $idx]; set other_tile [lindex $int_l_tiles $idx]} + + set driver_site [get_sites -of_objects [get_site_pins -of_objects [get_nodes -downhill \ + -of_objects [get_nodes -of_objects [get_wires $other_tile/CLK*0]]]]] + + set recv_site [get_sites -of_objects [get_site_pins -of_objects [get_nodes -downhill \ + -of_objects [get_nodes -of_objects [get_wires $tile/$dst_wire]]]]] + + set mylut [create_cell -reference LUT1 mylut_$idx] + set_property -dict "LOC $driver_site BEL A6LUT" $mylut + + set myff [create_cell -reference FDRE myff_$idx] + set ffbel [lindex "AFF A5FF BFF B5FF CFF C5FF DFF D5FF" [expr {int(rand()*8)}]] + set_property -dict "LOC $recv_site BEL $ffbel" $myff + + set mynet [create_net mynet_$idx] + connect_net -net $mynet -objects "$mylut/O $myff/C" + route_via $mynet "$tile/$src_wire $tile/$dst_wire" +} + +proc write_txtdata {filename} { + puts "Writing $filename." + set fp [open $filename w] + set all_pips [lsort -unique [get_pips -of_objects [get_nets -hierarchical]]] + if {$all_pips != {}} { + puts "Dumping pips." + foreach tile [get_tiles [regsub -all {CLBL[LM]} [get_tiles -of_objects [get_sites -of_objects [get_pblocks roi]]] INT]] { + foreach pip [filter $all_pips "TILE == $tile"] { + set src_wire [get_wires -uphill -of_objects $pip] + set dst_wire [get_wires -downhill -of_objects $pip] + set num_pips [llength [get_nodes -uphill -of_objects [get_nodes -of_objects $dst_wire]]] + set dir_prop [get_property IS_DIRECTIONAL $pip] + puts $fp "$tile $pip $src_wire $dst_wire $num_pips $dir_prop" + } + } + } + close $fp +} + +route_design +write_checkpoint -force design.dcp +write_bitstream -force design.bit +write_txtdata design.txt + diff --git a/fuzzers/052-clkin/maketodo.py b/fuzzers/052-clkin/maketodo.py new file mode 100644 index 00000000..b64bb484 --- /dev/null +++ b/fuzzers/052-clkin/maketodo.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python3 + +import os, re + +def maketodo(pipfile, dbfile): + todos = set() + with open(pipfile, "r") as f: + for line in f: + line = line.split() + todos.add(line[0]) + with open(dbfile, "r") as f: + for line in f: + line = line.split() + todos.remove(line[0]) + for line in todos: + if re.match(r"^INT_[LR].CLK", line): + print(line) + +maketodo("pips_int_l.txt", "%s/%s/segbits_int_l.db" % (os.getenv("XRAY_DATABASE_DIR"), os.getenv("XRAY_DATABASE"))) +maketodo("pips_int_r.txt", "%s/%s/segbits_int_r.db" % (os.getenv("XRAY_DATABASE_DIR"), os.getenv("XRAY_DATABASE"))) + diff --git a/fuzzers/052-clkin/piplist.tcl b/fuzzers/052-clkin/piplist.tcl new file mode 100644 index 00000000..98a590a6 --- /dev/null +++ b/fuzzers/052-clkin/piplist.tcl @@ -0,0 +1,39 @@ +create_project -force -part $::env(XRAY_PART) piplist piplist + +read_verilog top.v +synth_design -top top + +set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports i] +set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports o] + +create_pblock roi +resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)" + +set_property CFGBVS VCCO [current_design] +set_property CONFIG_VOLTAGE 3.3 [current_design] +set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design] + +place_design +route_design + +write_checkpoint -force piplist.dcp + +source ../../utils/utils.tcl + +proc print_tile_pips {tile_type filename} { + set tile [lindex [get_tiles -filter "TYPE == $tile_type"] 0] + puts "Dumping and PIPs for tile $tile ($tile_type) to $filename." + set fp [open $filename w] + foreach pip [lsort [get_pips -filter {IS_DIRECTIONAL} -of_objects [get_tiles $tile]]] { + set src [get_wires -uphill -of_objects $pip] + set dst [get_wires -downhill -of_objects $pip] + if {[llength [get_nodes -uphill -of_objects [get_nodes -of_objects $dst]]] != 1} { + puts $fp "$tile_type.[regsub {.*/} $dst ""].[regsub {.*/} $src ""]" + } + } + close $fp +} + +print_tile_pips INT_L pips_int_l.txt +print_tile_pips INT_R pips_int_r.txt + diff --git a/fuzzers/052-clkin/top.v b/fuzzers/052-clkin/top.v new file mode 100644 index 00000000..c0e91c58 --- /dev/null +++ b/fuzzers/052-clkin/top.v @@ -0,0 +1,3 @@ +module top (input i, output o); + assign o = i; +endmodule