diff --git a/fuzzers/011-clb-ffconfig/top.py b/fuzzers/011-clb-ffconfig/top.py index 87106984..e403081a 100644 --- a/fuzzers/011-clb-ffconfig/top.py +++ b/fuzzers/011-clb-ffconfig/top.py @@ -1,11 +1,14 @@ -import random +import os, random random.seed(0) from prjxray import util from prjxray import verilog from prims import * -CLBN = 600 +# INCREMENT is the amount of additional CLBN to be instantiated in the design. +# This makes the fuzzer compilation more robust against failures. +INCREMENT = os.getenv('CLBN', 0) +CLBN = 600 + int(INCREMENT) print('//Requested CLBs: %s' % str(CLBN)) f = open("top.txt", "w") diff --git a/fuzzers/012-clb-n5ffmux/top.py b/fuzzers/012-clb-n5ffmux/top.py index 8d2ec5d9..a2be2d3d 100644 --- a/fuzzers/012-clb-n5ffmux/top.py +++ b/fuzzers/012-clb-n5ffmux/top.py @@ -1,9 +1,12 @@ -import random +import os, random random.seed(0) from prjxray import util from prjxray import verilog -CLBN = 40 +# INCREMENT is the amount of additional CLBN to be instantiated in the design. +# This makes the fuzzer compilation more robust against failures. +INCREMENT = os.getenv('CLBN', 0) +CLBN = 40 + int(INCREMENT) print('//Requested CLBs: %s' % str(CLBN)) diff --git a/fuzzers/013-clb-ncy0/top.py b/fuzzers/013-clb-ncy0/top.py index 1510ca77..65949a7f 100644 --- a/fuzzers/013-clb-ncy0/top.py +++ b/fuzzers/013-clb-ncy0/top.py @@ -1,9 +1,12 @@ -import random +import os, random random.seed(0) from prjxray import util from prjxray import verilog -CLBN = 400 +# INCREMENT is the amount of additional CLBN to be instantiated in the design. +# This makes the fuzzer compilation more robust against failures. +INCREMENT = os.getenv('CLBN', 0) +CLBN = 400 + int(INCREMENT) print('//Requested CLBs: %s' % str(CLBN)) @@ -107,7 +110,7 @@ module clb_NCY0_O5 (input clk, input [7:0] din, output [7:0] dout); always @(*) begin s = din[7:4]; s[N] = o6; - + di = {din[3:0]}; di[N] = o5; end diff --git a/fuzzers/014-clb-ffsrcemux/top.py b/fuzzers/014-clb-ffsrcemux/top.py index f56c3029..e0112629 100644 --- a/fuzzers/014-clb-ffsrcemux/top.py +++ b/fuzzers/014-clb-ffsrcemux/top.py @@ -5,7 +5,10 @@ import re from prjxray import util from prjxray import verilog -CLBN = 600 +# INCREMENT is the amount of additional CLBN to be instantiated in the design. +# This makes the fuzzer compilation more robust against failures. +INCREMENT = os.getenv('CLBN', 0) +CLBN = 600 + int(INCREMENT) print('//Requested CLBs: %s' % str(CLBN)) diff --git a/fuzzers/015-clb-nffmux/top.py b/fuzzers/015-clb-nffmux/top.py index d233b89f..90769867 100644 --- a/fuzzers/015-clb-nffmux/top.py +++ b/fuzzers/015-clb-nffmux/top.py @@ -1,9 +1,12 @@ -import random +import os, random random.seed(0) from prjxray import util from prjxray import verilog -CLBN = 400 +# INCREMENT is the amount of additional CLBN to be instantiated in the design. +# This makes the fuzzer compilation more robust against failures. +INCREMENT = os.getenv('CLBN', 0) +CLBN = 400 + int(INCREMENT) print('//Requested CLBs: %s' % str(CLBN)) diff --git a/fuzzers/016-clb-noutmux/top.py b/fuzzers/016-clb-noutmux/top.py index 4cc660c0..808ef73c 100644 --- a/fuzzers/016-clb-noutmux/top.py +++ b/fuzzers/016-clb-noutmux/top.py @@ -1,9 +1,12 @@ -import random +import os, random random.seed(0) from prjxray import util from prjxray import verilog -CLBN = 400 +# INCREMENT is the amount of additional CLBN to be instantiated in the design. +# This makes the fuzzer compilation more robust against failures. +INCREMENT = os.getenv('CLBN', 0) +CLBN = 400 + int(INCREMENT) print('//Requested CLBs: %s' % str(CLBN)) diff --git a/fuzzers/017-clb-precyinit/top.py b/fuzzers/017-clb-precyinit/top.py index 348ec7e4..2edb311c 100644 --- a/fuzzers/017-clb-precyinit/top.py +++ b/fuzzers/017-clb-precyinit/top.py @@ -5,7 +5,10 @@ import re from prjxray import verilog from prjxray import util -CLBN = 400 +# INCREMENT is the amount of additional CLBN to be instantiated in the design. +# This makes the fuzzer compilation more robust against failures. +INCREMENT = os.getenv('CLBN', 0) +CLBN = 400 + int(INCREMENT) SLICEX, SLICEY = util.site_xy_minmax([ 'SLICEL', 'SLICEM', diff --git a/fuzzers/018-clb-ram/top.py b/fuzzers/018-clb-ram/top.py index a7a02280..c96db4d7 100644 --- a/fuzzers/018-clb-ram/top.py +++ b/fuzzers/018-clb-ram/top.py @@ -15,12 +15,15 @@ SRLC32E_N Note: LUT6 was added to try to simplify reduction, although it might not be needed ''' -import random +import os, random random.seed(0) from prjxray import util from prjxray import verilog -CLBN = 50 +# INCREMENT is the amount of additional CLBN to be instantiated in the design. +# This makes the fuzzer compilation more robust against failures. +INCREMENT = os.getenv('CLBN', 0) +CLBN = 50 + int(INCREMENT) print('//Requested CLBs: %s' % str(CLBN)) diff --git a/fuzzers/019-clb-ndi1mux/top.py b/fuzzers/019-clb-ndi1mux/top.py index 5966a563..f9ce5224 100644 --- a/fuzzers/019-clb-ndi1mux/top.py +++ b/fuzzers/019-clb-ndi1mux/top.py @@ -1,9 +1,12 @@ -import random +import os, random random.seed(0) from prjxray import util from prjxray import verilog -CLBN = 50 +# INCREMENT is the amount of additional CLBN to be instantiated in the design. +# This makes the fuzzer compilation more robust against failures. +INCREMENT = os.getenv('CLBN', 0) +CLBN = 50 + int(INCREMENT) print('//Requested CLBs: %s' % str(CLBN))