From 93d1ae82f73ab567f6a27d0e14c6d1187a9d4540 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Tue, 14 Jan 2020 16:23:05 +0100 Subject: [PATCH 01/35] Enable the generation of extra part-dependents files This change affects the extra-db target, by adding also the generation of other part-dependent files, such as tilegrid, tileconn, and others. Signed-off-by: Alessandro Comodi --- Makefile | 28 +++++++++++++-- fuzzers/005-tilegrid/generate_tiles.tcl | 20 ++++++++++- fuzzers/005-tilegrid/util.tcl | 11 ++++-- fuzzers/Makefile | 45 ++++++++++++++++++++++--- settings/artix200t.sh | 19 +++++++++++ settings/artix50t.sh | 19 +++++++++++ settings/artix7.sh | 2 ++ settings/kintex7.sh | 2 ++ settings/zynq7.sh | 2 ++ utils/environment.sh | 1 + 10 files changed, 139 insertions(+), 10 deletions(-) create mode 100644 settings/artix200t.sh create mode 100644 settings/artix50t.sh diff --git a/Makefile b/Makefile index 03cae068..9b5078d6 100644 --- a/Makefile +++ b/Makefile @@ -139,9 +139,31 @@ $(foreach DB,$(DATABASES),$(eval $(call database,$(DB)))) .PHONY: db-extras-artix7 db-extras-kintex7 db-extras-zynq7 +# Targets related to Project X-Ray parts +# -------------------------------------- + +ARTIX_PARTS=artix50t artix200t +ZYNQ_PARTS=zynq020 +KINTEX_PARTS=kintex70t + +XRAY_PARTS=${ARTIX_PARTS} ${ZYNQ_PARTS} ${KINTEX_PARTS} + +define multiple-parts + +# $(1): PART to be used + +db-part-only-$(1): + +source settings/$(1).sh && $(MAKE) -C fuzzers part_only + +endef + +$(foreach PART,$(XRAY_PARTS),$(eval $(call multiple-parts,$(PART)))) + +db-extras-artix7-parts: $(addprefix db-part-only-,$(ARTIX_PARTS)) + db-extras-artix7: - +source minitests/roi_harness/basys3-swbut.sh && $(MAKE) -C fuzzers part_only - +source minitests/roi_harness/arty-uart.sh && $(MAKE) -C fuzzers part_only + +source minitests/roi_harness/basys3-swbut.sh && $(MAKE) -C fuzzers roi_only + +source minitests/roi_harness/arty-uart.sh && $(MAKE) -C fuzzers roi_only +source minitests/roi_harness/basys3-swbut.sh && \ $(MAKE) -C minitests/roi_harness \ HARNESS_DIR=$(XRAY_DATABASE_DIR)/artix7/harness/basys3/swbut run copy @@ -158,6 +180,8 @@ db-extras-artix7: +source minitests/roi_harness/arty-swbut.sh && \ $(MAKE) -C minitests/roi_harness \ HARNESS_DIR=$(XRAY_DATABASE_DIR)/artix7/harness/arty-a7/swbut run copy + # Generate multiple part support + +$(MAKE) db-extras-artix7-parts db-extras-kintex7: @true diff --git a/fuzzers/005-tilegrid/generate_tiles.tcl b/fuzzers/005-tilegrid/generate_tiles.tcl index 64b62656..bdfb4304 100644 --- a/fuzzers/005-tilegrid/generate_tiles.tcl +++ b/fuzzers/005-tilegrid/generate_tiles.tcl @@ -3,6 +3,7 @@ source "$::env(FUZDIR)/util.tcl" proc write_tiles_txt {} { # Get all tiles, ie not just the selected LUTs set tiles [get_tiles] + set not_allowed_sites [get_sites -of_objects [get_pblocks exclude_roi]] # Write tiles.txt with site metadata set fp [open "tiles.txt" w] @@ -12,6 +13,23 @@ proc write_tiles_txt {} { set grid_x [get_property GRID_POINT_X $tile] set grid_y [get_property GRID_POINT_Y $tile] set sites [get_sites -quiet -of_objects $tile] + + # There are some sites which are not allowed to be placed. + # This check excludes tiles in the EXCLUDE_ROI pblock + # be added to tilegrid.json + set skip_tile 0 + foreach site $sites { + set res [lsearch $not_allowed_sites $site] + if { $res != -1 } { + set skip_tile 1 + break + } + } + + if { $skip_tile == 1 } { + continue + } + set typed_sites {} set clock_region "NA" @@ -41,7 +59,7 @@ proc write_tiles_txt {} { proc run {} { # Generate grid of entire part - make_project_roi XRAY_ROI_TILEGRID + make_project_roi XRAY_ROI_TILEGRID XRAY_EXCLUDE_ROI_TILEGRID place_design route_design diff --git a/fuzzers/005-tilegrid/util.tcl b/fuzzers/005-tilegrid/util.tcl index dc9b511c..3765fff3 100644 --- a/fuzzers/005-tilegrid/util.tcl +++ b/fuzzers/005-tilegrid/util.tcl @@ -138,10 +138,10 @@ proc assign_iobs {} { proc make_project {} { # Generate .bit only over ROI - make_project_roi XRAY_ROI_TILEGRID + make_project_roi XRAY_ROI_TILEGRID XRAY_EXCLUDE_ROI_TILEGRID } -proc make_project_roi { roi_var } { +proc make_project_roi { roi_var exclude_roi_var } { # 6 CMTs in our reference part # What is the largest? set n_di 16 @@ -160,6 +160,13 @@ proc make_project_roi { roi_var } { resize_pblock [get_pblocks roi] -add "$roi" } + create_pblock exclude_roi + add_cells_to_pblock [get_pblocks roi] [get_cells roi] + foreach roi "$::env($exclude_roi_var)" { + puts "ROI: $roi" + resize_pblock [get_pblocks exclude_roi] -add "$roi" + } + set_property CFGBVS VCCO [current_design] set_property CONFIG_VOLTAGE 3.3 [current_design] set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design] diff --git a/fuzzers/Makefile b/fuzzers/Makefile index cea2fe41..1a1d4ac7 100644 --- a/fuzzers/Makefile +++ b/fuzzers/Makefile @@ -127,11 +127,46 @@ $(eval $(call fuzzer,100-dsp-mskpat,005-tilegrid)) quick: $(MAKE) QUICK=Y -# part_only runs the fuzzers required for supporting additional parts. -# Note: In theory this includes 005-tilegrid, but there isn't support for -# multiple tilegrid's per family at this time. -part_only: +# roi_only runs the fuzzers required for supporting additional parts when building +# an roi harness. +roi_only: +$(MAKE) -C 001-part-yaml run +$(MAKE) -C 075-pins run -.PHONY: all clean clean_fuzzers clean_logs quick part_only +# Part only targets +# ----------------- + +part_only_yaml: + echo ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.yaml + +$(MAKE) -C 001-part-yaml run + cp ${XRAY_FAMILY_DIR}/${XRAY_PART}.yaml ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.yaml + cp ${XRAY_FAMILY_DIR}/${XRAY_PART}.json ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.json + +part_only_tilegrid: + +$(MAKE) -C 005-tilegrid run + cp ${XRAY_FAMILY_DIR}/tilegrid.json ${XRAY_FAMILY_DIR}/${XRAY_PART}/tilegrid.json + +part_only_tileconn: + +$(MAKE) -C 072-ordered_wires run + +$(MAKE) -C 073-get_counts run + +$(MAKE) -C 074-dump_all run + cp ${XRAY_FAMILY_DIR}/tileconn.json ${XRAY_FAMILY_DIR}/${XRAY_PART}/tileconn.json + +part_only_pins: + +$(MAKE) -C 075-pins run + cp ${XRAY_FAMILY_DIR}/${XRAY_PART}_package_pins.csv ${XRAY_FAMILY_DIR}/${XRAY_PART}/package_pins.csv + +part_only: + # Create PART-specific directory + mkdir -p ${XRAY_FAMILY_DIR}/${XRAY_PART} + # Generate YAML + +$(MAKE) part_only_yaml + # Generate Tile grid + +$(MAKE) part_only_tilegrid + # Generate Tile connections + +$(MAKE) part_only_tileconn + # Generate package pins + +$(MAKE) part_only_pins + + +.PHONY: all clean clean_fuzzers clean_logs quick part_only roi_only diff --git a/settings/artix200t.sh b/settings/artix200t.sh new file mode 100644 index 00000000..ea58e36d --- /dev/null +++ b/settings/artix200t.sh @@ -0,0 +1,19 @@ +export XRAY_DATABASE="artix7" +export XRAY_PART="xc7a200tffg1156-1" +export XRAY_ROI_FRAMES="0x00000000:0xffffffff" + +# All CLB's in part, all BRAM's in part, all DSP's in part. +# tcl queries IOB => don't bother adding +export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X163Y249 RAMB18_X0Y0:RAMB18_X8Y99 RAMB36_X0Y0:RAMB36_X8Y49 DSP48_X0Y0:DSP48_X8Y99 IOB_X0Y0:IOB_X1Y249" + +export XRAY_EXCLUDE_ROI_TILEGRID="SLICE_X82Y200:SLICE_X83Y249 SLICE_X82Y0:SLICE_X83Y49" + +export XRAY_PIN_00="R26" +export XRAY_PIN_01="P26" +export XRAY_PIN_02="N26" +export XRAY_PIN_03="M27" +export XRAY_PIN_04="U25" +export XRAY_PIN_05="T25" +export XRAY_PIN_06="P24" + +source $(dirname ${BASH_SOURCE[0]})/../utils/environment.sh diff --git a/settings/artix50t.sh b/settings/artix50t.sh new file mode 100644 index 00000000..726fb337 --- /dev/null +++ b/settings/artix50t.sh @@ -0,0 +1,19 @@ +export XRAY_DATABASE="artix7" +export XRAY_PART="xc7a50tfgg484-1" +export XRAY_ROI_FRAMES="0x00000000:0xffffffff" + +# All CLB's in part, all BRAM's in part, all DSP's in part. +# tcl queries IOB => don't bother adding +export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X65Y99 SLICE_X0Y100:SLICE_X57Y149 RAMB18_X0Y0:RAMB18_X1Y59 RAMB36_X0Y0:RAMB36_X1Y29 RAMB18_X2Y0:RAMB18_X2Y39 RAMB36_X2Y0:RAMB36_X2Y19 DSP48_X0Y0:DSP48_X1Y59" + +export XRAY_EXCLUDE_ROI_TILEGRID="" + +export XRAY_PIN_00="E22" +export XRAY_PIN_01="D22" +export XRAY_PIN_02="E21" +export XRAY_PIN_03="D21" +export XRAY_PIN_04="G21" +export XRAY_PIN_05="G22" +export XRAY_PIN_06="F21" + +source $(dirname ${BASH_SOURCE[0]})/../utils/environment.sh diff --git a/settings/artix7.sh b/settings/artix7.sh index 7c8a9386..a6322781 100644 --- a/settings/artix7.sh +++ b/settings/artix7.sh @@ -6,6 +6,8 @@ export XRAY_ROI_FRAMES="0x00000000:0xffffffff" # tcl queries IOB => don't bother adding export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X65Y99 SLICE_X0Y100:SLICE_X57Y149 RAMB18_X0Y0:RAMB18_X1Y59 RAMB36_X0Y0:RAMB36_X1Y29 RAMB18_X2Y0:RAMB18_X2Y39 RAMB36_X2Y0:RAMB36_X2Y19 DSP48_X0Y0:DSP48_X1Y59" +export XRAY_EXCLUDE_ROI_TILEGRID="" + # These settings must remain in sync export XRAY_ROI="SLICE_X0Y100:SLICE_X35Y149 RAMB18_X0Y40:RAMB18_X0Y59 RAMB36_X0Y20:RAMB36_X0Y29 DSP48_X0Y40:DSP48_X0Y59 IOB_X0Y100:IOB_X0Y149" # Most of CMT X0Y2. diff --git a/settings/kintex7.sh b/settings/kintex7.sh index acd366a3..a2a66ea0 100644 --- a/settings/kintex7.sh +++ b/settings/kintex7.sh @@ -5,6 +5,8 @@ export XRAY_ROI_FRAMES="0x00000000:0xffffffff" # FIXME: make entire part export XRAY_ROI_TILEGRID="SLICE_X0Y50:SLICE_X19Y99 DSP48_X0Y20:DSP48_X0Y39 RAMB18_X0Y20:RAMB18_X0Y39 RAMB36_X0Y10:RAMB36_X0Y19" +export XRAY_EXCLUDE_ROI_TILEGRID="" + # These settings must remain in sync export XRAY_ROI="SLICE_X0Y50:SLICE_X19Y99 DSP48_X0Y20:DSP48_X0Y39 RAMB18_X0Y20:RAMB18_X0Y39 RAMB36_X0Y10:RAMB36_X0Y19 IOB_X0Y50:IOB_X0Y99" # Part of CMT X0Y1 diff --git a/settings/zynq7.sh b/settings/zynq7.sh index 64c75b87..97a9b826 100644 --- a/settings/zynq7.sh +++ b/settings/zynq7.sh @@ -5,6 +5,8 @@ export XRAY_ROI_FRAMES="0x00000000:0xffffffff" # All CLB's in part, all BRAM's in part, all DSP's in part. export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X43Y99 RAMB18_X0Y0:RAMB18_X2Y39 RAMB36_X0Y0:RAMB36_X2Y19 DSP48_X0Y0:DSP48_X1Y39" +export XRAY_EXCLUDE_ROI_TILEGRID="" + # These settings must remain in sync export XRAY_ROI="SLICE_X00Y50:SLICE_X43Y99 RAMB18_X0Y20:RAMB18_X2Y39 RAMB36_X0Y10:RAMB36_X2Y19 IOB_X0Y50:IOB_X0Y99" diff --git a/utils/environment.sh b/utils/environment.sh index 90b328b7..3158ad03 100644 --- a/utils/environment.sh +++ b/utils/environment.sh @@ -10,6 +10,7 @@ export XRAY_DIR="$( dirname "$XRAY_UTILS_DIR" )" export XRAY_DATABASE_DIR="${XRAY_DIR}/database" export XRAY_TOOLS_DIR="${XRAY_DIR}/build/tools" export XRAY_FUZZERS_DIR="${XRAY_DIR}/fuzzers" +export XRAY_FAMILY_DIR="${XRAY_DATABASE_DIR}/${XRAY_DATABASE}" if [ -e "${XRAY_DIR}/env/bin/activate" ]; then source "${XRAY_DIR}/env/bin/activate" From 5c829daa8ca2661a08505a6b0a286e4eba7f5d9d Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Tue, 14 Jan 2020 17:04:02 +0100 Subject: [PATCH 02/35] 005-tilegrid: fixed some over-specific settings in generate_full Also added specimens to make some rquired fuzzers find all necessary features Signed-off-by: Alessandro Comodi --- fuzzers/005-tilegrid/generate_full.py | 13 ++++--------- fuzzers/005-tilegrid/hclk_cmt/Makefile | 2 +- fuzzers/005-tilegrid/hclk_ioi/Makefile | 2 +- fuzzers/005-tilegrid/pll/Makefile | 2 +- settings/artix200t.sh | 2 ++ settings/artix50t.sh | 2 ++ settings/artix7.sh | 2 ++ settings/kintex7.sh | 2 ++ settings/zynq7.sh | 2 ++ 9 files changed, 17 insertions(+), 12 deletions(-) diff --git a/fuzzers/005-tilegrid/generate_full.py b/fuzzers/005-tilegrid/generate_full.py index e88ca15e..e0b54b04 100644 --- a/fuzzers/005-tilegrid/generate_full.py +++ b/fuzzers/005-tilegrid/generate_full.py @@ -395,15 +395,10 @@ def propagate_IOI_Y9(database, tiles_by_grid): higher than the rest, just like for some of the SING tiles. """ - arch = os.getenv('XRAY_DATABASE') - if arch in 'artix7': - tiles = ['RIOI3_X43Y9', 'LIOI3_X0Y9'] - elif arch in 'kintex7': - tiles = ['LIOI3_X0Y9'] - elif arch in 'zynq7': - tiles = ['RIOI3_X31Y9'] - else: - assert False, "Unsupported architecture" + ioi_tiles = os.getenv('XRAY_IOI3_TILES') + + assert ioi_tiles is not None, "XRAY_IOI3_TILES env variable not set" + tiles = ioi_tiles.split(" ") for tile in tiles: prev_tile = tiles_by_grid[( diff --git a/fuzzers/005-tilegrid/hclk_cmt/Makefile b/fuzzers/005-tilegrid/hclk_cmt/Makefile index c6172fe8..8aa2699d 100644 --- a/fuzzers/005-tilegrid/hclk_cmt/Makefile +++ b/fuzzers/005-tilegrid/hclk_cmt/Makefile @@ -1,4 +1,4 @@ -N ?= 5 +N ?= 10 GENERATE_ARGS?="--oneval 1 --design params.csv --dword 5 --dframe 1C" include ../fuzzaddr/common.mk diff --git a/fuzzers/005-tilegrid/hclk_ioi/Makefile b/fuzzers/005-tilegrid/hclk_ioi/Makefile index 1e616a32..3f9f5e2a 100644 --- a/fuzzers/005-tilegrid/hclk_ioi/Makefile +++ b/fuzzers/005-tilegrid/hclk_ioi/Makefile @@ -1,4 +1,4 @@ -N ?= 5 +N ?= 10 GENERATE_ARGS?="--oneval 1 --design params.csv --dword 0 --dframe 21" include ../fuzzaddr/common.mk diff --git a/fuzzers/005-tilegrid/pll/Makefile b/fuzzers/005-tilegrid/pll/Makefile index 0d8e4d19..0ff5ced3 100644 --- a/fuzzers/005-tilegrid/pll/Makefile +++ b/fuzzers/005-tilegrid/pll/Makefile @@ -1,3 +1,3 @@ -N ?= 5 +N ?= 10 GENERATE_ARGS?="--oneval 1 --design params.csv --dframe 1C --dword 23" include ../fuzzaddr/common.mk diff --git a/settings/artix200t.sh b/settings/artix200t.sh index ea58e36d..392f00c4 100644 --- a/settings/artix200t.sh +++ b/settings/artix200t.sh @@ -8,6 +8,8 @@ export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X163Y249 RAMB18_X0Y0:RAMB18_X8Y99 RAM export XRAY_EXCLUDE_ROI_TILEGRID="SLICE_X82Y200:SLICE_X83Y249 SLICE_X82Y0:SLICE_X83Y49" +export XRAY_IOI3_TILES="RIOI3_X105Y9 LIOI3_X0Y9" + export XRAY_PIN_00="R26" export XRAY_PIN_01="P26" export XRAY_PIN_02="N26" diff --git a/settings/artix50t.sh b/settings/artix50t.sh index 726fb337..852f0299 100644 --- a/settings/artix50t.sh +++ b/settings/artix50t.sh @@ -8,6 +8,8 @@ export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X65Y99 SLICE_X0Y100:SLICE_X57Y149 RAM export XRAY_EXCLUDE_ROI_TILEGRID="" +export XRAY_IOI3_TILES="LIOI3_X0Y9 RIOI3_X43Y9" + export XRAY_PIN_00="E22" export XRAY_PIN_01="D22" export XRAY_PIN_02="E21" diff --git a/settings/artix7.sh b/settings/artix7.sh index a6322781..805cee9f 100644 --- a/settings/artix7.sh +++ b/settings/artix7.sh @@ -8,6 +8,8 @@ export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X65Y99 SLICE_X0Y100:SLICE_X57Y149 RAM export XRAY_EXCLUDE_ROI_TILEGRID="" +export XRAY_IOI3_TILES="LIOI3_X0Y9 RIOI3_X43Y9" + # These settings must remain in sync export XRAY_ROI="SLICE_X0Y100:SLICE_X35Y149 RAMB18_X0Y40:RAMB18_X0Y59 RAMB36_X0Y20:RAMB36_X0Y29 DSP48_X0Y40:DSP48_X0Y59 IOB_X0Y100:IOB_X0Y149" # Most of CMT X0Y2. diff --git a/settings/kintex7.sh b/settings/kintex7.sh index a2a66ea0..1ec6b199 100644 --- a/settings/kintex7.sh +++ b/settings/kintex7.sh @@ -7,6 +7,8 @@ export XRAY_ROI_TILEGRID="SLICE_X0Y50:SLICE_X19Y99 DSP48_X0Y20:DSP48_X0Y39 RAMB1 export XRAY_EXCLUDE_ROI_TILEGRID="" +export XRAY_IOI3_TILES="LIOI3_X0Y9" + # These settings must remain in sync export XRAY_ROI="SLICE_X0Y50:SLICE_X19Y99 DSP48_X0Y20:DSP48_X0Y39 RAMB18_X0Y20:RAMB18_X0Y39 RAMB36_X0Y10:RAMB36_X0Y19 IOB_X0Y50:IOB_X0Y99" # Part of CMT X0Y1 diff --git a/settings/zynq7.sh b/settings/zynq7.sh index 97a9b826..4d1895f4 100644 --- a/settings/zynq7.sh +++ b/settings/zynq7.sh @@ -7,6 +7,8 @@ export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X43Y99 RAMB18_X0Y0:RAMB18_X2Y39 RAMB3 export XRAY_EXCLUDE_ROI_TILEGRID="" +export XRAY_IOI3_TILES="RIOI3_X31Y9" + # These settings must remain in sync export XRAY_ROI="SLICE_X00Y50:SLICE_X43Y99 RAMB18_X0Y20:RAMB18_X2Y39 RAMB36_X0Y10:RAMB36_X2Y19 IOB_X0Y50:IOB_X0Y99" From e8a2777a17cd02ffd6d7d95113283f70687f7bf4 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Tue, 14 Jan 2020 17:47:32 +0100 Subject: [PATCH 03/35] 005-tilegrid: reduce number of specimens Signed-off-by: Alessandro Comodi --- fuzzers/005-tilegrid/hclk_cmt/Makefile | 2 +- fuzzers/005-tilegrid/hclk_ioi/Makefile | 2 +- fuzzers/005-tilegrid/pll/Makefile | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/fuzzers/005-tilegrid/hclk_cmt/Makefile b/fuzzers/005-tilegrid/hclk_cmt/Makefile index 8aa2699d..dd7543db 100644 --- a/fuzzers/005-tilegrid/hclk_cmt/Makefile +++ b/fuzzers/005-tilegrid/hclk_cmt/Makefile @@ -1,4 +1,4 @@ -N ?= 10 +N ?= 6 GENERATE_ARGS?="--oneval 1 --design params.csv --dword 5 --dframe 1C" include ../fuzzaddr/common.mk diff --git a/fuzzers/005-tilegrid/hclk_ioi/Makefile b/fuzzers/005-tilegrid/hclk_ioi/Makefile index 3f9f5e2a..d0a1ce10 100644 --- a/fuzzers/005-tilegrid/hclk_ioi/Makefile +++ b/fuzzers/005-tilegrid/hclk_ioi/Makefile @@ -1,4 +1,4 @@ -N ?= 10 +N ?= 6 GENERATE_ARGS?="--oneval 1 --design params.csv --dword 0 --dframe 21" include ../fuzzaddr/common.mk diff --git a/fuzzers/005-tilegrid/pll/Makefile b/fuzzers/005-tilegrid/pll/Makefile index 0ff5ced3..e8557d80 100644 --- a/fuzzers/005-tilegrid/pll/Makefile +++ b/fuzzers/005-tilegrid/pll/Makefile @@ -1,3 +1,3 @@ -N ?= 10 +N ?= 6 GENERATE_ARGS?="--oneval 1 --design params.csv --dframe 1C --dword 23" include ../fuzzaddr/common.mk From c5a33cb1614a0fc5ff9888b22e90dd8fe23c7e86 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Tue, 14 Jan 2020 18:53:51 +0100 Subject: [PATCH 04/35] 005-tilegrid: further increasing to 6 number of specimens for mmcm Signed-off-by: Alessandro Comodi --- fuzzers/005-tilegrid/mmcm/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fuzzers/005-tilegrid/mmcm/Makefile b/fuzzers/005-tilegrid/mmcm/Makefile index 14b574cf..b207cd5a 100644 --- a/fuzzers/005-tilegrid/mmcm/Makefile +++ b/fuzzers/005-tilegrid/mmcm/Makefile @@ -1,4 +1,4 @@ -N ?= 5 +N ?= 6 # Was expecting oneval 3, but bits might be inverted # FIXME: dword # Ex: 0002009D_029_15 From 63bb8337f8e989f4c51513bc6235be5ddd2248a4 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Wed, 15 Jan 2020 16:46:48 +0100 Subject: [PATCH 05/35] 072-ordered_wires: increased parallel jobs. This changes also the way the ordered wires final files are generated. In fact, now, with the help of a Lock, all the suprocesses directly access the final files, updating them. Once the write completes, the temporary file is deleted. This saves up disk space. Signed-off-by: Alessandro Comodi --- fuzzers/072-ordered_wires/Makefile | 4 +-- fuzzers/072-ordered_wires/run_fuzzer.py | 35 ++++++++++++++----------- 2 files changed, 22 insertions(+), 17 deletions(-) diff --git a/fuzzers/072-ordered_wires/Makefile b/fuzzers/072-ordered_wires/Makefile index 851bebc8..48439017 100644 --- a/fuzzers/072-ordered_wires/Makefile +++ b/fuzzers/072-ordered_wires/Makefile @@ -2,8 +2,8 @@ N := 1 SPECIMENS := $(addprefix build/specimen_,$(shell seq -f '%03.0f' $(N))) SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS)) -MAX_VIVADO_PROCESS ?= 4 -MAX_PIPS_INSTANCE ?= 340000 +MAX_VIVADO_PROCESS ?= 8 +MAX_PIPS_INSTANCE ?= 680000 database: $(SPECIMENS_OK) true diff --git a/fuzzers/072-ordered_wires/run_fuzzer.py b/fuzzers/072-ordered_wires/run_fuzzer.py index f166c900..8bf345ae 100644 --- a/fuzzers/072-ordered_wires/run_fuzzer.py +++ b/fuzzers/072-ordered_wires/run_fuzzer.py @@ -3,13 +3,14 @@ import shutil import sys import subprocess import signal -from multiprocessing import Pool +from multiprocessing import Pool, Lock from itertools import chain import argparse # Can be used to redirect vivado tons of output # stdout=DEVNULL in subprocess.check_call +MP_LOCK = Lock() # Worker function called from threads def start_pips(argList): @@ -20,6 +21,24 @@ def start_pips(argList): str(blockID) + " " + str(start) + " " + str(stop), shell=True) + uphill_wires = "wires/uphill_wires_{}.txt".format(blockID) + downhill_wires = "wires/downhill_wires_{}.txt".format(blockID) + + # Locking to write on final file and remove the temporary one + MP_LOCK.acquire() + with open("uphill_wires.txt", "a") as wfd: + f = uphill_wires + with open(f, "r") as fd: + shutil.copyfileobj(fd, wfd) + + with open("downhill_wires.txt", "a") as wfd: + f = downhill_wires + with open(f, "r") as fd: + shutil.copyfileobj(fd, wfd) + MP_LOCK.release() + + os.remove(uphill_wires) + os.remove(downhill_wires) # Function called once to get the total numbers of pips to list def get_nb_pips(): @@ -116,20 +135,6 @@ def main(argv): pipsFileCount = run_pool( pipscount, nbPipsBlock, blockPipsSize, nbParBlock, start_pips) - print("Generating final files") - - with open("uphill_wires.txt", "w") as wfd: - for j in range(0, pipsFileCount): - f = "wires/uphill_wires_" + str(j) + ".txt" - with open(f, "r") as fd: - shutil.copyfileobj(fd, wfd) - - with open("downhill_wires.txt", "w") as wed: - for j in range(0, pipsFileCount): - e = "wires/downhill_wires_" + str(j) + ".txt" - with open(e, "r") as ed: - shutil.copyfileobj(ed, wed) - print("Work done !") return 0 From 3865c726f2dcfe8564142e72271c7c8e62090cc9 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Wed, 15 Jan 2020 16:55:49 +0100 Subject: [PATCH 06/35] 074-dump_all: increase jobs and tiles per job Signed-off-by: Alessandro Comodi --- fuzzers/074-dump_all/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/fuzzers/074-dump_all/Makefile b/fuzzers/074-dump_all/Makefile index f9ba3ed9..053286fc 100644 --- a/fuzzers/074-dump_all/Makefile +++ b/fuzzers/074-dump_all/Makefile @@ -2,9 +2,9 @@ N := 1 SPECIMENS := $(addprefix build/specimen_,$(shell seq -f '%03.0f' $(N))) SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS)) -MAX_VIVADO_PROCESS ?= 4 -MAX_TILES_INSTANCE ?= 300 -MAX_NODES_INSTANCE ?= 30000 +MAX_VIVADO_PROCESS ?= 8 +MAX_TILES_INSTANCE ?= 600 +MAX_NODES_INSTANCE ?= 60000 database: $(SPECIMENS_OK) true From e44027bcafa943a0f5e492412acf26fae3a3a780 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Wed, 15 Jan 2020 16:55:12 +0100 Subject: [PATCH 07/35] Move all part-specific files to dedicated directory Signed-off-by: Alessandro Comodi --- Makefile | 4 +-- fuzzers/001-part-yaml/Makefile | 7 +++-- fuzzers/005-tilegrid/Makefile | 2 +- fuzzers/005-tilegrid/bram/top.py | 2 +- fuzzers/005-tilegrid/bram_block/top.py | 2 +- fuzzers/005-tilegrid/bram_int/top.py | 2 +- fuzzers/005-tilegrid/cfg/top.py | 2 +- fuzzers/005-tilegrid/cfg_int/top.py | 2 +- fuzzers/005-tilegrid/clb/top.py | 2 +- fuzzers/005-tilegrid/clb_int/top.py | 2 +- fuzzers/005-tilegrid/clk_bufg/top.py | 2 +- fuzzers/005-tilegrid/clk_hrow/top.py | 2 +- fuzzers/005-tilegrid/dsp/top.py | 2 +- fuzzers/005-tilegrid/dsp_int/top.py | 2 +- fuzzers/005-tilegrid/fifo_int/top.py | 2 +- fuzzers/005-tilegrid/hclk_cmt/top.py | 2 +- fuzzers/005-tilegrid/hclk_ioi/top.py | 2 +- fuzzers/005-tilegrid/iob/top.py | 2 +- fuzzers/005-tilegrid/iob_int/top.py | 2 +- fuzzers/005-tilegrid/ioi/top.py | 2 +- fuzzers/005-tilegrid/mmcm/top.py | 2 +- fuzzers/005-tilegrid/monitor/top.py | 2 +- fuzzers/005-tilegrid/monitor_int/top.py | 2 +- fuzzers/005-tilegrid/orphan_int_column/top.py | 2 +- fuzzers/005-tilegrid/pll/top.py | 2 +- fuzzers/028-fifo-config/top.py | 2 +- fuzzers/029-bram-fifo-config/top.py | 2 +- fuzzers/030-iob/top.py | 2 +- fuzzers/032-cmt-pll/top.py | 2 +- fuzzers/034-cmt-pll-pips/top.py | 2 +- fuzzers/035-iob-ilogic/top.py | 2 +- fuzzers/035a-iob-idelay/top.py | 2 +- fuzzers/036-iob-ologic/top.py | 2 +- fuzzers/037-iob-pips/top.py | 2 +- fuzzers/038-cfg/top.py | 2 +- fuzzers/039-hclk-config/top.py | 2 +- fuzzers/040-clk-hrow-config/top.py | 2 +- fuzzers/041-clk-hrow-pips/top.py | 6 ++-- fuzzers/042-clk-bufg-config/top.py | 2 +- fuzzers/043-clk-rebuf-pips/generate.py | 6 ++-- fuzzers/043-clk-rebuf-pips/top.py | 4 +-- fuzzers/044-clk-bufg-pips/top.py | 2 +- fuzzers/045-hclk-cmt-pips/top.py | 2 +- fuzzers/046-clk-bufg-muxed-pips/top.py | 2 +- fuzzers/047-hclk-ioi-pips/top.py | 2 +- fuzzers/047a-hclk-idelayctrl-pips/top.py | 2 +- fuzzers/049-int-imux-gfan/top.py | 2 +- fuzzers/060-bram-cascades/top.py | 2 +- fuzzers/072-ordered_wires/run_fuzzer.py | 2 ++ fuzzers/075-pins/Makefile | 2 +- fuzzers/100-dsp-mskpat/top.py | 2 +- fuzzers/Makefile | 5 ---- minitests/roi_harness/create_design_json.py | 4 +-- minitests/timing/Makefile | 1 - .../timing/create_timing_worksheet_db.py | 6 ++-- prjxray/db.py | 29 ++++++++++--------- prjxray/lms_solver.py | 3 +- prjxray/util.py | 23 ++++++++++++++- utils/bit2fasm.py | 9 +++--- utils/checkdb.py | 4 +-- utils/fasm2frames.py | 24 ++------------- utils/fasm2pips.py | 15 +++------- utils/fasm_pprint.py | 23 +++++---------- utils/tilegrid_report.py | 7 +++-- utils/verify_tile_connections.py | 6 ++-- 65 files changed, 137 insertions(+), 141 deletions(-) diff --git a/Makefile b/Makefile index 9b5078d6..6fef2f15 100644 --- a/Makefile +++ b/Makefile @@ -118,7 +118,7 @@ db-check-$(1): @echo @echo "Checking $(1) database" @echo "============================" - @$(IN_ENV) python3 utils/checkdb.py --db-root database/$(1) + @$(IN_ENV) python3 utils/checkdb.py db-format-$(1): @echo @@ -142,7 +142,7 @@ $(foreach DB,$(DATABASES),$(eval $(call database,$(DB)))) # Targets related to Project X-Ray parts # -------------------------------------- -ARTIX_PARTS=artix50t artix200t +ARTIX_PARTS=artix200t ZYNQ_PARTS=zynq020 KINTEX_PARTS=kintex70t diff --git a/fuzzers/001-part-yaml/Makefile b/fuzzers/001-part-yaml/Makefile index 70b92fe7..efc4320c 100644 --- a/fuzzers/001-part-yaml/Makefile +++ b/fuzzers/001-part-yaml/Makefile @@ -13,9 +13,10 @@ $(SPECIMENS): Makefile.specimen $(MAKE) -C $@ -f ../../Makefile.specimen pushdb: - cp build/part.yaml ${XRAY_DATABASE_DIR}/$(XRAY_DATABASE)/${XRAY_PART}.yaml - cp build/part.json ${XRAY_DATABASE_DIR}/$(XRAY_DATABASE)/${XRAY_PART}.json - cp build/${XRAY_PART}_required_features.fasm ${XRAY_DATABASE_DIR}/$(XRAY_DATABASE)/${XRAY_PART}_required_features.fasm 2>/dev/null || true + mkdir -p ${XRAY_FAMILY_DIR}/${XRAY_PART} + cp build/part.json $(XRAY_FAMILY_DIR)/${XRAY_PART}/part.json + cp build/part.yaml $(XRAY_FAMILY_DIR)/${XRAY_PART}/part.yaml + cp build/${XRAY_PART}_required_features.fasm ${XRAY_FAMILY_DIR}/${XRAY_PART}/required_features.fasm 2>/dev/null || true run: $(MAKE) clean diff --git a/fuzzers/005-tilegrid/Makefile b/fuzzers/005-tilegrid/Makefile index 0e4a9717..c12d6ef5 100644 --- a/fuzzers/005-tilegrid/Makefile +++ b/fuzzers/005-tilegrid/Makefile @@ -40,7 +40,7 @@ endif database: build/tilegrid.json pushdb: build/tilegrid.json - cp build/tilegrid.json ${XRAY_DATABASE_DIR}/$(XRAY_DATABASE)/tilegrid.json + cp build/tilegrid.json ${XRAY_FAMILY_DIR}/${XRAY_PART}/tilegrid.json build/tiles/tiles.txt: bash generate.sh build/tiles tiles diff --git a/fuzzers/005-tilegrid/bram/top.py b/fuzzers/005-tilegrid/bram/top.py index 20197892..030d7768 100644 --- a/fuzzers/005-tilegrid/bram/top.py +++ b/fuzzers/005-tilegrid/bram/top.py @@ -6,7 +6,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/bram_block/top.py b/fuzzers/005-tilegrid/bram_block/top.py index 1723904c..40e50a2f 100644 --- a/fuzzers/005-tilegrid/bram_block/top.py +++ b/fuzzers/005-tilegrid/bram_block/top.py @@ -6,7 +6,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/bram_int/top.py b/fuzzers/005-tilegrid/bram_int/top.py index 43d9c973..8b99e2fb 100644 --- a/fuzzers/005-tilegrid/bram_int/top.py +++ b/fuzzers/005-tilegrid/bram_int/top.py @@ -7,7 +7,7 @@ from prjxray.db import Database def gen_brams(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/cfg/top.py b/fuzzers/005-tilegrid/cfg/top.py index e1d3a3e9..99a12acc 100644 --- a/fuzzers/005-tilegrid/cfg/top.py +++ b/fuzzers/005-tilegrid/cfg/top.py @@ -6,7 +6,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/cfg_int/top.py b/fuzzers/005-tilegrid/cfg_int/top.py index cccfa898..d726bc16 100644 --- a/fuzzers/005-tilegrid/cfg_int/top.py +++ b/fuzzers/005-tilegrid/cfg_int/top.py @@ -6,7 +6,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/clb/top.py b/fuzzers/005-tilegrid/clb/top.py index ba040149..f8b24892 100644 --- a/fuzzers/005-tilegrid/clb/top.py +++ b/fuzzers/005-tilegrid/clb/top.py @@ -6,7 +6,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/clb_int/top.py b/fuzzers/005-tilegrid/clb_int/top.py index dfe9cb33..64671b86 100644 --- a/fuzzers/005-tilegrid/clb_int/top.py +++ b/fuzzers/005-tilegrid/clb_int/top.py @@ -6,7 +6,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/clk_bufg/top.py b/fuzzers/005-tilegrid/clk_bufg/top.py index 95cdea87..6f821ff8 100644 --- a/fuzzers/005-tilegrid/clk_bufg/top.py +++ b/fuzzers/005-tilegrid/clk_bufg/top.py @@ -6,7 +6,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in grid.tiles(): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/clk_hrow/top.py b/fuzzers/005-tilegrid/clk_hrow/top.py index 268b2112..8a724427 100644 --- a/fuzzers/005-tilegrid/clk_hrow/top.py +++ b/fuzzers/005-tilegrid/clk_hrow/top.py @@ -6,7 +6,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/dsp/top.py b/fuzzers/005-tilegrid/dsp/top.py index 6208136c..6bd4dbeb 100644 --- a/fuzzers/005-tilegrid/dsp/top.py +++ b/fuzzers/005-tilegrid/dsp/top.py @@ -6,7 +6,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/dsp_int/top.py b/fuzzers/005-tilegrid/dsp_int/top.py index 5d8f852c..3bf8154d 100644 --- a/fuzzers/005-tilegrid/dsp_int/top.py +++ b/fuzzers/005-tilegrid/dsp_int/top.py @@ -7,7 +7,7 @@ from prjxray.db import Database def gen_dsps(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/fifo_int/top.py b/fuzzers/005-tilegrid/fifo_int/top.py index 134fbb70..35c9ff5e 100644 --- a/fuzzers/005-tilegrid/fifo_int/top.py +++ b/fuzzers/005-tilegrid/fifo_int/top.py @@ -7,7 +7,7 @@ from prjxray.db import Database def gen_fifos(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/hclk_cmt/top.py b/fuzzers/005-tilegrid/hclk_cmt/top.py index 3fd68bc0..2665828e 100644 --- a/fuzzers/005-tilegrid/hclk_cmt/top.py +++ b/fuzzers/005-tilegrid/hclk_cmt/top.py @@ -6,7 +6,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/hclk_ioi/top.py b/fuzzers/005-tilegrid/hclk_ioi/top.py index 9d60542c..63e231ce 100644 --- a/fuzzers/005-tilegrid/hclk_ioi/top.py +++ b/fuzzers/005-tilegrid/hclk_ioi/top.py @@ -6,7 +6,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/iob/top.py b/fuzzers/005-tilegrid/iob/top.py index 46114dae..8656e360 100644 --- a/fuzzers/005-tilegrid/iob/top.py +++ b/fuzzers/005-tilegrid/iob/top.py @@ -12,7 +12,7 @@ def gen_sites(): IOB33: not a diff pair. Relatively rare (at least in ROI...2 of them?) Focus on IOB33S to start ''' - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/iob_int/top.py b/fuzzers/005-tilegrid/iob_int/top.py index 4ec12e5d..bc3485a9 100644 --- a/fuzzers/005-tilegrid/iob_int/top.py +++ b/fuzzers/005-tilegrid/iob_int/top.py @@ -18,7 +18,7 @@ def gen_sites(): IOB33: not a diff pair. Relatively rare (at least in ROI...2 of them?) Focus on IOB33S to start ''' - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/ioi/top.py b/fuzzers/005-tilegrid/ioi/top.py index cfd9536e..2009a8be 100644 --- a/fuzzers/005-tilegrid/ioi/top.py +++ b/fuzzers/005-tilegrid/ioi/top.py @@ -11,7 +11,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/mmcm/top.py b/fuzzers/005-tilegrid/mmcm/top.py index 6b3f1ac0..f92e862d 100644 --- a/fuzzers/005-tilegrid/mmcm/top.py +++ b/fuzzers/005-tilegrid/mmcm/top.py @@ -7,7 +7,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): gridinfo = grid.gridinfo_at_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/monitor/top.py b/fuzzers/005-tilegrid/monitor/top.py index ddcabe1d..e61eaa49 100644 --- a/fuzzers/005-tilegrid/monitor/top.py +++ b/fuzzers/005-tilegrid/monitor/top.py @@ -6,7 +6,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/monitor_int/top.py b/fuzzers/005-tilegrid/monitor_int/top.py index e2e0c902..6e58123e 100644 --- a/fuzzers/005-tilegrid/monitor_int/top.py +++ b/fuzzers/005-tilegrid/monitor_int/top.py @@ -6,7 +6,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/005-tilegrid/orphan_int_column/top.py b/fuzzers/005-tilegrid/orphan_int_column/top.py index ff960e7b..85596a15 100644 --- a/fuzzers/005-tilegrid/orphan_int_column/top.py +++ b/fuzzers/005-tilegrid/orphan_int_column/top.py @@ -321,7 +321,7 @@ module top(); int_tiles = [] - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() params = {} for int_l_column, int_r_column in gen_orphan_ints(grid): diff --git a/fuzzers/005-tilegrid/pll/top.py b/fuzzers/005-tilegrid/pll/top.py index e5235d79..a31bc7de 100644 --- a/fuzzers/005-tilegrid/pll/top.py +++ b/fuzzers/005-tilegrid/pll/top.py @@ -7,7 +7,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): gridinfo = grid.gridinfo_at_tilename(tile_name) diff --git a/fuzzers/028-fifo-config/top.py b/fuzzers/028-fifo-config/top.py index bcf91635..dab705f8 100644 --- a/fuzzers/028-fifo-config/top.py +++ b/fuzzers/028-fifo-config/top.py @@ -11,7 +11,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/029-bram-fifo-config/top.py b/fuzzers/029-bram-fifo-config/top.py index ee33c4e3..fed507e4 100644 --- a/fuzzers/029-bram-fifo-config/top.py +++ b/fuzzers/029-bram-fifo-config/top.py @@ -11,7 +11,7 @@ WRITE_MODES = ("WRITE_FIRST", "NO_CHANGE", "READ_FIRST") def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/030-iob/top.py b/fuzzers/030-iob/top.py index 4e027f9f..3eac39e2 100644 --- a/fuzzers/030-iob/top.py +++ b/fuzzers/030-iob/top.py @@ -16,7 +16,7 @@ def gen_sites(): IOB33: not a diff pair. Relatively rare (at least in ROI...2 of them?) Focus on IOB33S to start ''' - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/032-cmt-pll/top.py b/fuzzers/032-cmt-pll/top.py index 441028a8..1e9de083 100644 --- a/fuzzers/032-cmt-pll/top.py +++ b/fuzzers/032-cmt-pll/top.py @@ -8,7 +8,7 @@ import json def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/034-cmt-pll-pips/top.py b/fuzzers/034-cmt-pll-pips/top.py index 1727d4bc..25abe1e6 100644 --- a/fuzzers/034-cmt-pll-pips/top.py +++ b/fuzzers/034-cmt-pll-pips/top.py @@ -73,7 +73,7 @@ def find_phasers_for_pll(grid, loc): def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/035-iob-ilogic/top.py b/fuzzers/035-iob-ilogic/top.py index 99186546..10076047 100644 --- a/fuzzers/035-iob-ilogic/top.py +++ b/fuzzers/035-iob-ilogic/top.py @@ -16,7 +16,7 @@ def gen_sites(): IOB33: not a diff pair. Relatively rare (at least in ROI...2 of them?) Focus on IOB33S to start ''' - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/035a-iob-idelay/top.py b/fuzzers/035a-iob-idelay/top.py index 39f25d88..cc8ae951 100644 --- a/fuzzers/035a-iob-idelay/top.py +++ b/fuzzers/035a-iob-idelay/top.py @@ -13,7 +13,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() tile_list = [] diff --git a/fuzzers/036-iob-ologic/top.py b/fuzzers/036-iob-ologic/top.py index b55e5054..c6fe2313 100644 --- a/fuzzers/036-iob-ologic/top.py +++ b/fuzzers/036-iob-ologic/top.py @@ -16,7 +16,7 @@ def gen_sites(): IOB33: not a diff pair. Relatively rare (at least in ROI...2 of them?) Focus on IOB33S to start ''' - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/037-iob-pips/top.py b/fuzzers/037-iob-pips/top.py index 43207af4..283c5ba3 100644 --- a/fuzzers/037-iob-pips/top.py +++ b/fuzzers/037-iob-pips/top.py @@ -23,7 +23,7 @@ def read_site_to_cmt(): def gen_sites(): ''' Return dict of ISERDES/OSERDES locations. ''' - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() xy_fun = util.create_xy_fun('\S+') diff --git a/fuzzers/038-cfg/top.py b/fuzzers/038-cfg/top.py index 86e45a48..e8cf4ced 100644 --- a/fuzzers/038-cfg/top.py +++ b/fuzzers/038-cfg/top.py @@ -11,7 +11,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/039-hclk-config/top.py b/fuzzers/039-hclk-config/top.py index 77b7ad7e..61d2dc7d 100644 --- a/fuzzers/039-hclk-config/top.py +++ b/fuzzers/039-hclk-config/top.py @@ -9,7 +9,7 @@ from prjxray.lut_maker import LutMaker def gen_sites(): xy_fun = util.create_xy_fun('BUFR_') - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/040-clk-hrow-config/top.py b/fuzzers/040-clk-hrow-config/top.py index 56a0d54f..2306ed80 100644 --- a/fuzzers/040-clk-hrow-config/top.py +++ b/fuzzers/040-clk-hrow-config/top.py @@ -9,7 +9,7 @@ from prjxray.db import Database def gen_sites(): get_xy = util.create_xy_fun('BUFHCE_') - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/041-clk-hrow-pips/top.py b/fuzzers/041-clk-hrow-pips/top.py index 3993fd03..c24cbf61 100644 --- a/fuzzers/041-clk-hrow-pips/top.py +++ b/fuzzers/041-clk-hrow-pips/top.py @@ -22,7 +22,7 @@ def eprint(*args, **kwargs): def gen_sites(desired_site_type): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): @@ -34,7 +34,7 @@ def gen_sites(desired_site_type): def gen_bufhce_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) @@ -50,7 +50,7 @@ def gen_bufhce_sites(): def get_cmt_loc(cmt_tile_name): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() return grid.loc_of_tilename(cmt_tile_name) diff --git a/fuzzers/042-clk-bufg-config/top.py b/fuzzers/042-clk-bufg-config/top.py index ed050c6b..ca22613a 100644 --- a/fuzzers/042-clk-bufg-config/top.py +++ b/fuzzers/042-clk-bufg-config/top.py @@ -9,7 +9,7 @@ from prjxray.state_gen import StateGen def gen_sites(): xy_fun = util.create_xy_fun('BUFGCTRL_') - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/043-clk-rebuf-pips/generate.py b/fuzzers/043-clk-rebuf-pips/generate.py index d88a2d49..e96b6c2d 100644 --- a/fuzzers/043-clk-rebuf-pips/generate.py +++ b/fuzzers/043-clk-rebuf-pips/generate.py @@ -2,7 +2,7 @@ from prjxray.segmaker import Segmaker from prjxray.db import Database -from prjxray.util import get_db_root +from prjxray.util import get_db_root, get_part import re REBUF_GCLK = re.compile('^CLK_BUFG_REBUF_R_CK_GCLK([0-9]+)_BOT$') @@ -17,8 +17,8 @@ def gclk_of_wire(wire): class ClockColumn(object): - def __init__(self, db_root): - db = Database(db_root) + def __init__(self, db_root, part): + db = Database(db_root, part) grid = db.grid() tiles_in_gclk_columns = [] diff --git a/fuzzers/043-clk-rebuf-pips/top.py b/fuzzers/043-clk-rebuf-pips/top.py index 769372e8..8754b84b 100644 --- a/fuzzers/043-clk-rebuf-pips/top.py +++ b/fuzzers/043-clk-rebuf-pips/top.py @@ -26,7 +26,7 @@ def get_xy(s): def gen_sites(desired_site_type): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): @@ -38,7 +38,7 @@ def gen_sites(desired_site_type): def gen_bufhce_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile_name) diff --git a/fuzzers/044-clk-bufg-pips/top.py b/fuzzers/044-clk-bufg-pips/top.py index 5f1a38c1..68e77f56 100644 --- a/fuzzers/044-clk-bufg-pips/top.py +++ b/fuzzers/044-clk-bufg-pips/top.py @@ -118,7 +118,7 @@ module top(); clock_sources = ClockSources() - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() def gen_sites(desired_site_type): diff --git a/fuzzers/045-hclk-cmt-pips/top.py b/fuzzers/045-hclk-cmt-pips/top.py index 4f2e8462..e765f3e5 100644 --- a/fuzzers/045-hclk-cmt-pips/top.py +++ b/fuzzers/045-hclk-cmt-pips/top.py @@ -178,7 +178,7 @@ def main(): adv_clock_sources = ClockSources() site_to_cmt = dict(read_site_to_cmt()) - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() def gen_sites(desired_site_type): diff --git a/fuzzers/046-clk-bufg-muxed-pips/top.py b/fuzzers/046-clk-bufg-muxed-pips/top.py index 5f1a38c1..68e77f56 100644 --- a/fuzzers/046-clk-bufg-muxed-pips/top.py +++ b/fuzzers/046-clk-bufg-muxed-pips/top.py @@ -118,7 +118,7 @@ module top(); clock_sources = ClockSources() - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() def gen_sites(desired_site_type): diff --git a/fuzzers/047-hclk-ioi-pips/top.py b/fuzzers/047-hclk-ioi-pips/top.py index 528f90c3..5231a84d 100644 --- a/fuzzers/047-hclk-ioi-pips/top.py +++ b/fuzzers/047-hclk-ioi-pips/top.py @@ -101,7 +101,7 @@ def main(): clock_region_limit = dict() clock_region_serdes_location = dict() - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() def gen_sites(desired_site_type): diff --git a/fuzzers/047a-hclk-idelayctrl-pips/top.py b/fuzzers/047a-hclk-idelayctrl-pips/top.py index accb9351..fe607497 100644 --- a/fuzzers/047a-hclk-idelayctrl-pips/top.py +++ b/fuzzers/047a-hclk-idelayctrl-pips/top.py @@ -101,7 +101,7 @@ def main(): clock_region_limit = dict() clock_region_serdes_location = dict() - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() def gen_sites(desired_site_type): diff --git a/fuzzers/049-int-imux-gfan/top.py b/fuzzers/049-int-imux-gfan/top.py index 3b3b7471..6a10a437 100644 --- a/fuzzers/049-int-imux-gfan/top.py +++ b/fuzzers/049-int-imux-gfan/top.py @@ -7,7 +7,7 @@ random.seed(int(os.getenv("SEED"), 16)) def gen_sites(lr): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile_name in grid.tiles(): diff --git a/fuzzers/060-bram-cascades/top.py b/fuzzers/060-bram-cascades/top.py index 4d4c0ad7..61b56ca9 100644 --- a/fuzzers/060-bram-cascades/top.py +++ b/fuzzers/060-bram-cascades/top.py @@ -9,7 +9,7 @@ random.seed(int(os.getenv("SEED"), 16)) def bram_count(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() count = 0 diff --git a/fuzzers/072-ordered_wires/run_fuzzer.py b/fuzzers/072-ordered_wires/run_fuzzer.py index 8bf345ae..98859c49 100644 --- a/fuzzers/072-ordered_wires/run_fuzzer.py +++ b/fuzzers/072-ordered_wires/run_fuzzer.py @@ -12,6 +12,7 @@ import argparse MP_LOCK = Lock() + # Worker function called from threads def start_pips(argList): blockID, start, stop, total = argList @@ -40,6 +41,7 @@ def start_pips(argList): os.remove(uphill_wires) os.remove(downhill_wires) + # Function called once to get the total numbers of pips to list def get_nb_pips(): print("Fetching total number of pips") diff --git a/fuzzers/075-pins/Makefile b/fuzzers/075-pins/Makefile index cedfc7f9..1a076586 100644 --- a/fuzzers/075-pins/Makefile +++ b/fuzzers/075-pins/Makefile @@ -5,7 +5,7 @@ SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS)) database: $(SPECIMENS_OK) pushdb: - cp build/specimen_001/*_package_pins.csv ${XRAY_DATABASE_DIR}/$(XRAY_DATABASE)/ + cp build/specimen_001/*_package_pins.csv ${XRAY_FAMILY_DIR}/${XRAY_PART}/package_pins.csv $(SPECIMENS_OK): bash generate.sh $(subst /OK,,$@) diff --git a/fuzzers/100-dsp-mskpat/top.py b/fuzzers/100-dsp-mskpat/top.py index a480ebb6..129b01d2 100644 --- a/fuzzers/100-dsp-mskpat/top.py +++ b/fuzzers/100-dsp-mskpat/top.py @@ -8,7 +8,7 @@ from prjxray.db import Database def gen_sites(): - db = Database(util.get_db_root()) + db = Database(util.get_db_root(), util.get_part()) grid = db.grid() for tile in sorted(grid.tiles()): loc = grid.loc_of_tilename(tile) diff --git a/fuzzers/Makefile b/fuzzers/Makefile index 1a1d4ac7..140ffed0 100644 --- a/fuzzers/Makefile +++ b/fuzzers/Makefile @@ -137,10 +137,7 @@ roi_only: # ----------------- part_only_yaml: - echo ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.yaml +$(MAKE) -C 001-part-yaml run - cp ${XRAY_FAMILY_DIR}/${XRAY_PART}.yaml ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.yaml - cp ${XRAY_FAMILY_DIR}/${XRAY_PART}.json ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.json part_only_tilegrid: +$(MAKE) -C 005-tilegrid run @@ -150,11 +147,9 @@ part_only_tileconn: +$(MAKE) -C 072-ordered_wires run +$(MAKE) -C 073-get_counts run +$(MAKE) -C 074-dump_all run - cp ${XRAY_FAMILY_DIR}/tileconn.json ${XRAY_FAMILY_DIR}/${XRAY_PART}/tileconn.json part_only_pins: +$(MAKE) -C 075-pins run - cp ${XRAY_FAMILY_DIR}/${XRAY_PART}_package_pins.csv ${XRAY_FAMILY_DIR}/${XRAY_PART}/package_pins.csv part_only: # Create PART-specific directory diff --git a/minitests/roi_harness/create_design_json.py b/minitests/roi_harness/create_design_json.py index 7ec273d9..ac336fa5 100644 --- a/minitests/roi_harness/create_design_json.py +++ b/minitests/roi_harness/create_design_json.py @@ -5,7 +5,7 @@ import sys import fasm from prjxray.db import Database from prjxray.roi import Roi -from prjxray.util import get_db_root +from prjxray.util import get_db_root, get_part def set_port_wires(ports, name, pin, wires_outside_roi): @@ -42,7 +42,7 @@ def main(): design_json['info'][name] = int(value) - db = Database(get_db_root()) + db = Database(get_db_root(), get_part()) grid = db.grid() roi = Roi( diff --git a/minitests/timing/Makefile b/minitests/timing/Makefile index 9bb97724..6595ab39 100644 --- a/minitests/timing/Makefile +++ b/minitests/timing/Makefile @@ -27,7 +27,6 @@ build/$(2)_$(1)/timing_$(2)_$(1).json5: build/.touch runme.tcl $(3) build/timing_$(2)_$(1).xlsx: build/$(2)_$(1)/timing_$(2)_$(1).json create_timing_worksheet_db.py python3 create_timing_worksheet_db.py \ --timing_json build/$(2)_$(1)/timing_$(2)_$(1).json \ - --db_root ${XRAY_DATABASE_DIR}/${XRAY_DATABASE} \ --output_xlsx build/timing_$(2)_$(1).xlsx build/$(2)_$(1)/design_$(2)_$(1).fasm: build/$(2)_$(1)/timing_$(2)_$(1).json diff --git a/minitests/timing/create_timing_worksheet_db.py b/minitests/timing/create_timing_worksheet_db.py index e3fde662..3e2ace86 100644 --- a/minitests/timing/create_timing_worksheet_db.py +++ b/minitests/timing/create_timing_worksheet_db.py @@ -6,6 +6,7 @@ from prjxray.timing import Outpin, Inpin, Wire, Buffer, \ PassTransistor, IntristicDelay, RcElement, PvtCorner from prjxray.math_models import ExcelMathModel from prjxray.db import Database +from prjxray import util FAST = PvtCorner.FAST SLOW = PvtCorner.SLOW @@ -443,8 +444,9 @@ def main(): parser = argparse.ArgumentParser( description="Create timing worksheet for 7-series timing analysis.") + util.db_root_arg(parser) + util.part_arg(parser) parser.add_argument('--timing_json', required=True) - parser.add_argument('--db_root', required=True) parser.add_argument('--output_xlsx', required=True) args = parser.parse_args() @@ -452,7 +454,7 @@ def main(): with open(args.timing_json) as f: timing = json.load(f) - db = Database(args.db_root) + db = Database(args.db_root, args.part) nodes = {} for net in timing: diff --git a/prjxray/db.py b/prjxray/db.py index bdc85fc3..dfe11730 100644 --- a/prjxray/db.py +++ b/prjxray/db.py @@ -25,7 +25,7 @@ def get_available_databases(prjxray_root): class Database(object): - def __init__(self, db_root): + def __init__(self, db_root, part): """ Create project x-ray Database at given db_root. db_root: Path to directory containing settings.sh, *.db, tilegrid.json and @@ -33,6 +33,7 @@ class Database(object): """ self.db_root = db_root + self.part = part # tilegrid.json JSON object self.tilegrid = None self.tileconn = None @@ -87,17 +88,17 @@ class Database(object): self.site_types[site_type_name] = os.path.join(self.db_root, f) - if f.endswith('_required_features.fasm'): - part = f[:-len('_required_features.fasm')] + required_features_path = os.path.join( + self.db_root, self.part, "required_features.fasm") + if os.path.isfile(required_features_path): + with open(required_features_path, "r") as fp: + features = [] + for line in fp: + line = line.strip() + if len(line) > 0: + features.append(line) - with open(os.path.join(self.db_root, f), "r") as fp: - features = [] - for line in fp: - line = line.strip() - if len(line) > 0: - features.append(line) - - self.required_features[part] = set(features) + self.required_features[self.part] = set(features) self.tile_types_obj = {} @@ -116,13 +117,15 @@ class Database(object): def _read_tilegrid(self): """ Read tilegrid database if not already read. """ if not self.tilegrid: - with open(os.path.join(self.db_root, 'tilegrid.json')) as f: + with open(os.path.join(self.db_root, self.part, + 'tilegrid.json')) as f: self.tilegrid = json.load(f) def _read_tileconn(self): """ Read tileconn database if not already read. """ if not self.tileconn: - with open(os.path.join(self.db_root, 'tileconn.json')) as f: + with open(os.path.join(self.db_root, self.part, + 'tileconn.json')) as f: self.tileconn = json.load(f) def grid(self): diff --git a/prjxray/lms_solver.py b/prjxray/lms_solver.py index 98dcef30..5dacddf6 100755 --- a/prjxray/lms_solver.py +++ b/prjxray/lms_solver.py @@ -824,7 +824,8 @@ def main(): # Build (baseaddr, offset) -> tile name map database_dir = os.path.join( - os.getenv("XRAY_DATABASE_DIR"), os.getenv("XRAY_DATABASE")) + os.getenv("XRAY_DATABASE_DIR"), os.getenv("XRAY_DATABASE"), + os.getenv("XRAY_PART")) tilegrid_file = os.path.join(database_dir, "tilegrid.json") address_map = build_address_map(tilegrid_file) diff --git a/prjxray/util.py b/prjxray/util.py index ffe6e717..ff2c7bf1 100644 --- a/prjxray/util.py +++ b/prjxray/util.py @@ -15,6 +15,13 @@ def get_db_root(): os.getenv("XRAY_DATABASE_DIR"), os.getenv("XRAY_DATABASE")) +def get_part(): + ret = os.getenv("XRAY_PART", None) + assert ret + + return ret + + def roi_xy(): x1 = int(os.getenv('XRAY_ROI_GRID_X1', 0)) x2 = int(os.getenv('XRAY_ROI_GRID_X2', 58)) @@ -73,7 +80,7 @@ def slice_xy(): def get_roi(): from .db import Database (x1, x2), (y1, y2) = roi_xy() - db = Database(get_db_root()) + db = Database(get_db_root(), get_part()) return Roi(db=db, x1=x1, x2=x2, y1=y1, y2=y2) @@ -115,6 +122,20 @@ def db_root_arg(parser): parser.add_argument('--db-root', help="Database root.", **db_root_kwargs) +def part_arg(parser): + part = os.getenv("XRAY_PART") + part_kwargs = {} + if part is None: + part_kwargs['required'] = True + else: + part_kwargs['required'] = False + part_kwargs['default'] = part + parser.add_argument( + '--part', + help="Part name. When not given defaults to XRAY_PART env. var.", + **part_kwargs) + + def parse_db_line(line): '''Return tag name, bit values (if any), mode (if any)''' parts = line.split() diff --git a/utils/bit2fasm.py b/utils/bit2fasm.py index 46dba630..dcde86d9 100755 --- a/utils/bit2fasm.py +++ b/utils/bit2fasm.py @@ -27,8 +27,8 @@ def bit_to_bits(bitread, part_yaml, bit_file, bits_file, frame_range=None): shell=True) -def bits_to_fasm(db_root, bits_file, verbose, canonical): - db = Database(db_root) +def bits_to_fasm(db_root, part, bits_file, verbose, canonical): + db = Database(db_root, part) grid = db.grid() disassembler = fasm_disassembler.FasmDisassembler(db) @@ -102,14 +102,15 @@ def main(): bit_to_bits( bitread=args.bitread, - part_yaml=os.path.join(args.db_root, '{}.yaml'.format(args.part)), + part_yaml=os.path.join(args.db_root, args.part, "part.yaml"), bit_file=args.bit_file, bits_file=bits_file.name, frame_range=args.frame_range, ) bits_to_fasm( - args.db_root, bits_file.name, args.verbose, args.canonical) + args.db_root, args.part, bits_file.name, args.verbose, + args.canonical) if __name__ == '__main__': diff --git a/utils/checkdb.py b/utils/checkdb.py index 9b939124..988ae7bd 100755 --- a/utils/checkdb.py +++ b/utils/checkdb.py @@ -142,13 +142,13 @@ def check_tile_overlap(db, verbose=False): print("Checked %s tiles, %s bits" % (tiles_checked, len(mall))) -def run(db_root, verbose=False): +def run(db_root, part, verbose=False): # Start by running a basic check on db files print("Checking individual .db...") parsedb_all(db_root, verbose=verbose) # Now load and verify tile consistency - db = prjxraydb.Database(db_root) + db = prjxraydb.Database(db_root, part) db._read_tilegrid() ''' these don't load properly without .json files diff --git a/utils/fasm2frames.py b/utils/fasm2frames.py index c73590bb..4b9821ac 100755 --- a/utils/fasm2frames.py +++ b/utils/fasm2frames.py @@ -271,28 +271,8 @@ def main(): 'Convert FPGA configuration description ("FPGA assembly") into binary frame equivalent' ) - database_dir = os.getenv("XRAY_DATABASE_DIR") - database = os.getenv("XRAY_DATABASE") - db_root_kwargs = {} - if database_dir is None or database is None: - db_root_kwargs['required'] = True - else: - db_root_kwargs['required'] = False - db_root_kwargs['default'] = os.path.join(database_dir, database) - - db_part = os.getenv("XRAY_PART") - db_part_kwargs = {} - if db_part is None: - db_part_kwargs['required'] = True - else: - db_part_kwargs['required'] = False - db_part_kwargs['default'] = db_part - - parser.add_argument('--db-root', help="Database root.", **db_root_kwargs) - parser.add_argument( - '--part', - help="Part name. When not given defaults to XRAY_PART env. var.", - **db_part_kwargs) + util.db_root_arg(parser) + util.part_arg(parser) parser.add_argument( '--sparse', action='store_true', help="Don't zero fill all frames") parser.add_argument( diff --git a/utils/fasm2pips.py b/utils/fasm2pips.py index 62e4302a..862bb7a0 100755 --- a/utils/fasm2pips.py +++ b/utils/fasm2pips.py @@ -8,6 +8,7 @@ from __future__ import print_function import os.path import fasm from prjxray import db +from prjxray import util def main(): @@ -17,20 +18,12 @@ def main(): description= 'Outputs a Vivavo highlight_objects command from a FASM file.') - database_dir = os.getenv("XRAY_DATABASE_DIR") - database = os.getenv("XRAY_DATABASE") - db_root_kwargs = {} - if database_dir is None or database is None: - db_root_kwargs['required'] = True - else: - db_root_kwargs['required'] = False - db_root_kwargs['default'] = os.path.join(database_dir, database) - - parser.add_argument('--db-root', help="Database root.", **db_root_kwargs) + util.db_root_arg(parser) + util.part_arg(parser) parser.add_argument('fn_in', help='Input FPGA assembly (.fasm) file') args = parser.parse_args() - database = db.Database(args.db_root) + database = db.Database(args.db_root, args.part) grid = database.grid() def inner(): diff --git a/utils/fasm_pprint.py b/utils/fasm_pprint.py index 8c42cd9f..2b3d1d19 100755 --- a/utils/fasm_pprint.py +++ b/utils/fasm_pprint.py @@ -13,8 +13,8 @@ import fasm from prjxray import db -def process_fasm(db_root, fasm_file, canonical): - database = db.Database(db_root) +def process_fasm(db_root, part, fasm_file, canonical): + database = db.Database(db_root, part) grid = database.grid() for fasm_line in fasm.parse_fasm_filename(fasm_file): @@ -56,10 +56,11 @@ def process_fasm(db_root, fasm_file, canonical): yield fasm_line -def run(db_root, fasm_file, canonical): +def run(db_root, part, fasm_file, canonical): print( fasm.fasm_tuple_to_string( - process_fasm(db_root, fasm_file, canonical), canonical=canonical)) + process_fasm(db_root, part, fasm_file, canonical), + canonical=canonical)) def main(): @@ -67,22 +68,14 @@ def main(): parser = argparse.ArgumentParser(description='Pretty print a FASM file.') - database_dir = os.getenv("XRAY_DATABASE_DIR") - database = os.getenv("XRAY_DATABASE") - db_root_kwargs = {} - if database_dir is None or database is None: - db_root_kwargs['required'] = True - else: - db_root_kwargs['required'] = False - db_root_kwargs['default'] = os.path.join(database_dir, database) - - parser.add_argument('--db-root', help="Database root.", **db_root_kwargs) + util.db_root_arg(parser) + util.part_arg(parser) parser.add_argument('fasm_file', help='Input FASM file') parser.add_argument( '--canonical', help='Output canonical bitstream.', action='store_true') args = parser.parse_args() - run(args.db_root, args.fasm_file, args.canonical) + run(args.db_root, args.part, args.fasm_file, args.canonical) if __name__ == '__main__': diff --git a/utils/tilegrid_report.py b/utils/tilegrid_report.py index ff622e14..2e04fb09 100755 --- a/utils/tilegrid_report.py +++ b/utils/tilegrid_report.py @@ -2,18 +2,21 @@ import argparse from prjxray.db import Database from prjxray.grid import BlockType +from prjxray import util def main(): parser = argparse.ArgumentParser( description="Tool for checking which tiles have bits defined.") - parser.add_argument('db_root') + + util.db_root_arg(parser) + util.part_arg(parser) parser.add_argument('--show-only-missing', action='store_true') parser.add_argument('--verbose', action='store_true') args = parser.parse_args() - db = Database(args.db_root) + db = Database(args.db_root, args.part) grid = db.grid() tile_types = {} diff --git a/utils/verify_tile_connections.py b/utils/verify_tile_connections.py index 2ee7bbdd..d8da4555 100755 --- a/utils/verify_tile_connections.py +++ b/utils/verify_tile_connections.py @@ -8,6 +8,7 @@ import multiprocessing import pyjson5 as json5 import json import sys +from prjxray import util def full_wire_name(wire_in_grid): @@ -60,7 +61,8 @@ def read_json5(fname): def main(): parser = argparse.ArgumentParser( description="Tests database against raw node list.") - parser.add_argument('--db-root', required=True) + util.db_root_arg(parser) + util.part_arg(parser) parser.add_argument('--raw_node_root', required=True) parser.add_argument('--error_nodes', default="error_nodes.json") parser.add_argument('--ignored_wires') @@ -88,7 +90,7 @@ def main(): bar.update(idx + 1) print('{} Creating connections'.format(datetime.datetime.now())) - generated_nodes = make_connections(args.db_root) + generated_nodes = make_connections(args.db_root, args.part) print('{} Verifying connections'.format(datetime.datetime.now())) error_nodes = [] From c7cf7099a1846fe92073be0ada222f888c31fccf Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Wed, 15 Jan 2020 17:01:22 +0100 Subject: [PATCH 08/35] address review comments Signed-off-by: Alessandro Comodi --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 6fef2f15..d8d49cb6 100644 --- a/Makefile +++ b/Makefile @@ -153,7 +153,7 @@ define multiple-parts # $(1): PART to be used db-part-only-$(1): - +source settings/$(1).sh && $(MAKE) -C fuzzers part_only + +source settings/$(1).sh && $$(MAKE) -C fuzzers part_only endef From 93d448e135284ec429935387f0b82b5da1f0ac21 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Wed, 15 Jan 2020 17:34:33 +0100 Subject: [PATCH 09/35] fixing tests Signed-off-by: Alessandro Comodi --- tests/test_util.py | 1 + utils/fasm2frames.py | 7 +++---- utils/quick_test.py | 11 +++++++---- utils/segprint.py | 5 ++++- .../db/{xc7_package_pins.csv => xc7/package_pins.csv} | 0 utils/test_data/db/{xc7.json => xc7/part.json} | 0 utils/test_data/db/{ => xc7}/tilegrid.json | 0 utils/verify_tile_connections.py | 5 +++-- 8 files changed, 18 insertions(+), 11 deletions(-) rename utils/test_data/db/{xc7_package_pins.csv => xc7/package_pins.csv} (100%) rename utils/test_data/db/{xc7.json => xc7/part.json} (100%) rename utils/test_data/db/{ => xc7}/tilegrid.json (100%) diff --git a/tests/test_util.py b/tests/test_util.py index 929ea9e0..98f83fb3 100755 --- a/tests/test_util.py +++ b/tests/test_util.py @@ -10,6 +10,7 @@ from unittest import TestCase, main # in the current subdirectory, which will be a temporary one, to allow concurent # testing. environ['XRAY_DATABASE_ROOT'] = '.' +environ['XRAY_PART'] = './' from prjxray.util import get_roi diff --git a/utils/fasm2frames.py b/utils/fasm2frames.py index 4b9821ac..8260a95e 100755 --- a/utils/fasm2frames.py +++ b/utils/fasm2frames.py @@ -109,7 +109,7 @@ def run( roi=None, debug=False, emit_pudc_b_pullup=False): - db = Database(db_root) + db = Database(db_root, part) assembler = fasm_assembler.FasmAssembler(db) set_features = set() @@ -124,12 +124,11 @@ def run( bank_to_tile = defaultdict(lambda: set()) if part is not None: - with open(os.path.join(db_root, part + "_package_pins.csv"), - "r") as fp: + with open(os.path.join(db_root, part, "package_pins.csv"), "r") as fp: reader = csv.DictReader(fp) package_pins = [l for l in reader] - with open(os.path.join(db_root, part + ".json"), "r") as fp: + with open(os.path.join(db_root, part, "part.json"), "r") as fp: part_data = json.load(fp) for bank, loc in part_data["iobanks"].items(): diff --git a/utils/quick_test.py b/utils/quick_test.py index 6575d129..c8ced2b2 100755 --- a/utils/quick_test.py +++ b/utils/quick_test.py @@ -1,10 +1,11 @@ from __future__ import print_function import prjxray.db +import prjxray.util import argparse -def quick_test(db_root): - db = prjxray.db.Database(db_root) +def quick_test(db_root, part): + db = prjxray.db.Database(db_root, part) g = db.grid() # Verify that we have some tile information for every tile in grid. @@ -47,11 +48,13 @@ def quick_test(db_root): def main(): parser = argparse.ArgumentParser( description="Runs a sanity check on a prjxray database.") - parser.add_argument('--db-root', required=True) + + util.db_root_arg(parser) + util.part_arg(parser) args = parser.parse_args() - quick_test(args.db_root) + quick_test(args.db_root, args.part) if __name__ == '__main__': diff --git a/utils/segprint.py b/utils/segprint.py index 2a40de34..fcdd2ec7 100755 --- a/utils/segprint.py +++ b/utils/segprint.py @@ -428,6 +428,7 @@ def load_tiles(db_root): def run( db_root, + part, bits_file, segnames, omit_empty_segs=False, @@ -436,7 +437,7 @@ def run( flag_decode_omit=False, bit_only=False, verbose=False): - db = prjxraydb.Database(db_root) + db = prjxraydb.Database(db_root, part) tiles = load_tiles(db_root) segments = mk_segments(tiles) bitdata = bitstream.load_bitdata2(open(bits_file, "r")) @@ -477,6 +478,7 @@ def main(): description="Decode bits within a tile's address space") util.db_root_arg(parser) + util.part_arg(parser) parser.add_argument('--verbose', action='store_true', help='') parser.add_argument( '-z', @@ -503,6 +505,7 @@ def main(): run( args.db_root, + args.part, args.bits_file, args.segnames, args.z, diff --git a/utils/test_data/db/xc7_package_pins.csv b/utils/test_data/db/xc7/package_pins.csv similarity index 100% rename from utils/test_data/db/xc7_package_pins.csv rename to utils/test_data/db/xc7/package_pins.csv diff --git a/utils/test_data/db/xc7.json b/utils/test_data/db/xc7/part.json similarity index 100% rename from utils/test_data/db/xc7.json rename to utils/test_data/db/xc7/part.json diff --git a/utils/test_data/db/tilegrid.json b/utils/test_data/db/xc7/tilegrid.json similarity index 100% rename from utils/test_data/db/tilegrid.json rename to utils/test_data/db/xc7/tilegrid.json diff --git a/utils/verify_tile_connections.py b/utils/verify_tile_connections.py index d8da4555..1eb743a0 100755 --- a/utils/verify_tile_connections.py +++ b/utils/verify_tile_connections.py @@ -37,8 +37,8 @@ def make_connection(wires, connection): wires[wire] = wire_a_set -def make_connections(db_root): - db = prjxray.db.Database(db_root) +def make_connections(db_root, part): + db = prjxray.db.Database(db_root, part) c = db.connections() wires = {} @@ -61,6 +61,7 @@ def read_json5(fname): def main(): parser = argparse.ArgumentParser( description="Tests database against raw node list.") + util.db_root_arg(parser) util.part_arg(parser) parser.add_argument('--raw_node_root', required=True) From e84a1d63df9c0ef14643670cad59dafb72a260d5 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Wed, 15 Jan 2020 18:55:34 +0100 Subject: [PATCH 10/35] 075-pins: create destination directory Signed-off-by: Alessandro Comodi --- fuzzers/075-pins/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/fuzzers/075-pins/Makefile b/fuzzers/075-pins/Makefile index 1a076586..0c1bb466 100644 --- a/fuzzers/075-pins/Makefile +++ b/fuzzers/075-pins/Makefile @@ -5,6 +5,7 @@ SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS)) database: $(SPECIMENS_OK) pushdb: + mkdir -p ${XRAY_FAMILY_DIR}/${XRAY_PART}/ cp build/specimen_001/*_package_pins.csv ${XRAY_FAMILY_DIR}/${XRAY_PART}/package_pins.csv $(SPECIMENS_OK): From 127412b5b98ef5cffc547f4ca0c4065df81fed49 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Thu, 16 Jan 2020 12:11:22 +0100 Subject: [PATCH 11/35] fix wrong location of tilegrid and yaml Signed-off-by: Alessandro Comodi --- fuzzers/005-tilegrid/Makefile | 54 +++++++++++++++++------------------ utils/environment.sh | 2 +- 2 files changed, 28 insertions(+), 28 deletions(-) diff --git a/fuzzers/005-tilegrid/Makefile b/fuzzers/005-tilegrid/Makefile index c12d6ef5..a28aae54 100644 --- a/fuzzers/005-tilegrid/Makefile +++ b/fuzzers/005-tilegrid/Makefile @@ -45,85 +45,85 @@ pushdb: build/tilegrid.json build/tiles/tiles.txt: bash generate.sh build/tiles tiles -build/basicdb/tilegrid.json: generate.py build/tiles/tiles.txt - mkdir -p build/basicdb +build/basicdb/${XRAY_PART}/tilegrid.json: generate.py build/tiles/tiles.txt + mkdir -p build/basicdb/${XRAY_PART} cd build && python3 ${FUZDIR}/generate.py \ --tiles $(FUZDIR)/build/tiles/tiles.txt \ --pin_func $(FUZDIR)/build/tiles/pin_func.txt \ - --out ${BUILD_DIR}/basicdb/tilegrid.json + --out ${BUILD_DIR}/basicdb/${XRAY_PART}/tilegrid.json -clb/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +clb/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd clb && $(MAKE) -clb_int/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +clb_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd clb_int && $(MAKE) -cfg/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +cfg/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd cfg && $(MAKE) -iob/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +iob/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd iob && $(MAKE) -iob_int/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +iob_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd iob_int && $(MAKE) -ioi/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +ioi/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd ioi && $(MAKE) -mmcm/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +mmcm/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd mmcm && $(MAKE) -pll/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +pll/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd pll && $(MAKE) -ps7_int/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +ps7_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd ps7_int && $(MAKE) -monitor/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +monitor/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd monitor && $(MAKE) -monitor_int/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +monitor_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd monitor_int && $(MAKE) -bram/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +bram/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd bram && $(MAKE) -bram_block/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +bram_block/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd bram_block && $(MAKE) -bram_int/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +bram_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd bram_int && $(MAKE) -dsp/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +dsp/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd dsp && $(MAKE) -dsp_int/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +dsp_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd dsp_int && $(MAKE) -fifo_int/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +fifo_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd fifo_int && $(MAKE) -cfg_int/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +cfg_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd cfg_int && $(MAKE) -orphan_int_column/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +orphan_int_column/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd orphan_int_column && $(MAKE) -clk_hrow/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +clk_hrow/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd clk_hrow && $(MAKE) -clk_bufg/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +clk_bufg/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd clk_bufg && $(MAKE) -hclk_cmt/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +hclk_cmt/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd hclk_cmt && $(MAKE) -hclk_ioi/build/segbits_tilegrid.tdb: build/basicdb/tilegrid.json +hclk_ioi/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json cd hclk_ioi && $(MAKE) build/tilegrid_tdb.json: add_tdb.py $(TILEGRID_TDB_DEPENDENCIES) python3 add_tdb.py \ - --fn-in build/basicdb/tilegrid.json \ + --fn-in build/basicdb/${XRAY_PART}/tilegrid.json \ --fn-out build/tilegrid_tdb.json build/tilegrid.json: generate_full.py build/tilegrid_tdb.json diff --git a/utils/environment.sh b/utils/environment.sh index 3158ad03..ac888429 100644 --- a/utils/environment.sh +++ b/utils/environment.sh @@ -17,7 +17,7 @@ if [ -e "${XRAY_DIR}/env/bin/activate" ]; then fi # misc -export XRAY_PART_YAML="${XRAY_DATABASE_DIR}/${XRAY_DATABASE}/${XRAY_PART}.yaml" +export XRAY_PART_YAML="${XRAY_DATABASE_DIR}/${XRAY_DATABASE}/${XRAY_PART}/part.yaml" export PYTHONPATH="${XRAY_DIR}:${XRAY_DIR}/third_party/fasm:$PYTHONPATH" # tools From 5f12851934c726688ce1175c0bae2bc7a9542031 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Thu, 16 Jan 2020 13:32:25 +0100 Subject: [PATCH 12/35] fix segmaker to get the correct tilegrid Signed-off-by: Alessandro Comodi --- prjxray/segmaker.py | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/prjxray/segmaker.py b/prjxray/segmaker.py index 375714db..b287b8ea 100644 --- a/prjxray/segmaker.py +++ b/prjxray/segmaker.py @@ -72,11 +72,15 @@ def add_site_group_zero(segmk, site, prefix, vals, zero_val, val): class Segmaker: - def __init__(self, bitsfile, verbose=None, db_root=None): + def __init__(self, bitsfile, verbose=None, db_root=None, part=None): self.db_root = db_root if self.db_root is None: self.db_root = util.get_db_root() + self.part = part + if self.part is None: + self.part = util.get_part() + self.verbose = verbose if verbose is not None else os.getenv( 'VERBOSE', 'N') == 'Y' self.load_grid() @@ -113,7 +117,7 @@ class Segmaker: def load_grid(self): '''Load self.grid holding tile addresses''' - with open(os.path.join(self.db_root, "tilegrid.json"), "r") as f: + with open(os.path.join(self.db_root, self.part, "tilegrid.json"), "r") as f: self.grid = json.load(f) assert "segments" not in self.grid, "Old format tilegrid.json" From d571c0c0144b3f97002bc465bbd2be269baf2e6f Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Thu, 16 Jan 2020 14:27:42 +0100 Subject: [PATCH 13/35] run make format Signed-off-by: Alessandro Comodi --- prjxray/segmaker.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/prjxray/segmaker.py b/prjxray/segmaker.py index b287b8ea..65cb78b9 100644 --- a/prjxray/segmaker.py +++ b/prjxray/segmaker.py @@ -117,7 +117,8 @@ class Segmaker: def load_grid(self): '''Load self.grid holding tile addresses''' - with open(os.path.join(self.db_root, self.part, "tilegrid.json"), "r") as f: + with open(os.path.join(self.db_root, self.part, "tilegrid.json"), + "r") as f: self.grid = json.load(f) assert "segments" not in self.grid, "Old format tilegrid.json" From 39aecf2d0cff923da3f51c033d16f5be61f5b93c Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Thu, 16 Jan 2020 15:19:14 +0100 Subject: [PATCH 14/35] Do not assert if XRAY_PART env variable is not present Signed-off-by: Alessandro Comodi --- prjxray/segmaker.py | 1 + prjxray/util.py | 1 - 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/prjxray/segmaker.py b/prjxray/segmaker.py index 65cb78b9..78fa8f53 100644 --- a/prjxray/segmaker.py +++ b/prjxray/segmaker.py @@ -80,6 +80,7 @@ class Segmaker: self.part = part if self.part is None: self.part = util.get_part() + assert self.part, "No part specified." self.verbose = verbose if verbose is not None else os.getenv( 'VERBOSE', 'N') == 'Y' diff --git a/prjxray/util.py b/prjxray/util.py index ff2c7bf1..8fa737f6 100644 --- a/prjxray/util.py +++ b/prjxray/util.py @@ -17,7 +17,6 @@ def get_db_root(): def get_part(): ret = os.getenv("XRAY_PART", None) - assert ret return ret From 61cd47dc365aa08985990a01e570188d08b49ccf Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Thu, 16 Jan 2020 17:42:27 +0100 Subject: [PATCH 15/35] 043-clk-rebuf-pips: fixed missing argument Signed-off-by: Alessandro Comodi --- fuzzers/043-clk-rebuf-pips/generate.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/fuzzers/043-clk-rebuf-pips/generate.py b/fuzzers/043-clk-rebuf-pips/generate.py index e96b6c2d..6e643f26 100644 --- a/fuzzers/043-clk-rebuf-pips/generate.py +++ b/fuzzers/043-clk-rebuf-pips/generate.py @@ -72,8 +72,9 @@ class ClockColumn(object): def main(): db_root = get_db_root() + part = get_part() - clock_column = ClockColumn(db_root) + clock_column = ClockColumn(db_root, part) segmk = Segmaker("design.bits") From 070931ec6e2830c4b4210df7d9db7f4855f6bae6 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Fri, 17 Jan 2020 10:53:46 +0100 Subject: [PATCH 16/35] 074-dump_all: fix tilegrid location Signed-off-by: Alessandro Comodi --- fuzzers/074-dump_all/generate_grid.py | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/fuzzers/074-dump_all/generate_grid.py b/fuzzers/074-dump_all/generate_grid.py index fb55e8e6..c3b9576e 100644 --- a/fuzzers/074-dump_all/generate_grid.py +++ b/fuzzers/074-dump_all/generate_grid.py @@ -2,8 +2,6 @@ from __future__ import print_function import argparse -import prjxray.lib -import prjxray.util import pyjson5 as json5 import multiprocessing import progressbar @@ -14,6 +12,7 @@ import pickle import sys from utils import xjson +from prjxray import util, lib def get_tile_grid_info(fname): @@ -563,7 +562,7 @@ def main(): args = parser.parse_args() - tiles, nodes = prjxray.lib.read_root_csv(args.root_dir) + tiles, nodes = lib.read_root_csv(args.root_dir) processes = min(multiprocessing.cpu_count(), 10) print('{} Running {} processes'.format(datetime.datetime.now(), processes)) @@ -575,7 +574,8 @@ def main(): wire_map_file = os.path.join(args.output_dir, 'wiremap.pickle') print('{} Reading tilegrid'.format(datetime.datetime.now())) - with open(os.path.join(prjxray.util.get_db_root(), 'tilegrid.json')) as f: + with open(os.path.join(util.get_db_root(), util.get_part(), + 'tilegrid.json')) as f: grid = json.load(f) if not args.verify_only: @@ -643,7 +643,7 @@ def main(): print('{} Verifing tileconn'.format(datetime.datetime.now())) error_nodes = [] - prjxray.lib.verify_nodes( + lib.verify_nodes( [ (node['node'], tuple(wire['wire'] for wire in node['wires'])) @@ -661,7 +661,7 @@ def main(): with open(ignored_wires_file) as f: ignored_wires = set(l.strip() for l in f) - if not prjxray.lib.check_errors(error_nodes, ignored_wires): + if not lib.check_errors(error_nodes, ignored_wires): print( '{} errors detected, see {} for details.'.format( len(error_nodes), error_nodes_file)) From cb9944d39238e2aa2b0a02a8285f2af3cceed9af Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Fri, 17 Jan 2020 12:16:18 +0100 Subject: [PATCH 17/35] 005-tilegrid: use variable for dependencies Signed-off-by: Alessandro Comodi --- fuzzers/005-tilegrid/Makefile | 52 ++++++++++++++++++----------------- 1 file changed, 27 insertions(+), 25 deletions(-) diff --git a/fuzzers/005-tilegrid/Makefile b/fuzzers/005-tilegrid/Makefile index a28aae54..9e9e38a6 100644 --- a/fuzzers/005-tilegrid/Makefile +++ b/fuzzers/005-tilegrid/Makefile @@ -37,6 +37,8 @@ else TILEGRID_TDB_DEPENDENCIES += dsp_int/build/segbits_tilegrid.tdb endif +BASICDB_TILEGRID=build/basicdb/${XRAY_PART}/tilegrid.json + database: build/tilegrid.json pushdb: build/tilegrid.json @@ -45,85 +47,85 @@ pushdb: build/tilegrid.json build/tiles/tiles.txt: bash generate.sh build/tiles tiles -build/basicdb/${XRAY_PART}/tilegrid.json: generate.py build/tiles/tiles.txt +${BASICDB_TILEGRID}: generate.py build/tiles/tiles.txt mkdir -p build/basicdb/${XRAY_PART} cd build && python3 ${FUZDIR}/generate.py \ --tiles $(FUZDIR)/build/tiles/tiles.txt \ --pin_func $(FUZDIR)/build/tiles/pin_func.txt \ --out ${BUILD_DIR}/basicdb/${XRAY_PART}/tilegrid.json -clb/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +clb/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd clb && $(MAKE) -clb_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +clb_int/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd clb_int && $(MAKE) -cfg/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +cfg/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd cfg && $(MAKE) -iob/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +iob/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd iob && $(MAKE) -iob_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +iob_int/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd iob_int && $(MAKE) -ioi/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +ioi/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd ioi && $(MAKE) -mmcm/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +mmcm/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd mmcm && $(MAKE) -pll/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +pll/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd pll && $(MAKE) -ps7_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +ps7_int/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd ps7_int && $(MAKE) -monitor/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +monitor/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd monitor && $(MAKE) -monitor_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +monitor_int/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd monitor_int && $(MAKE) -bram/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +bram/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd bram && $(MAKE) -bram_block/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +bram_block/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd bram_block && $(MAKE) -bram_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +bram_int/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd bram_int && $(MAKE) -dsp/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +dsp/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd dsp && $(MAKE) -dsp_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +dsp_int/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd dsp_int && $(MAKE) -fifo_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +fifo_int/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd fifo_int && $(MAKE) -cfg_int/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +cfg_int/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd cfg_int && $(MAKE) -orphan_int_column/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +orphan_int_column/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd orphan_int_column && $(MAKE) -clk_hrow/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +clk_hrow/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd clk_hrow && $(MAKE) -clk_bufg/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +clk_bufg/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd clk_bufg && $(MAKE) -hclk_cmt/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +hclk_cmt/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd hclk_cmt && $(MAKE) -hclk_ioi/build/segbits_tilegrid.tdb: build/basicdb/${XRAY_PART}/tilegrid.json +hclk_ioi/build/segbits_tilegrid.tdb: ${BASICDB_TILEGRID} cd hclk_ioi && $(MAKE) build/tilegrid_tdb.json: add_tdb.py $(TILEGRID_TDB_DEPENDENCIES) python3 add_tdb.py \ - --fn-in build/basicdb/${XRAY_PART}/tilegrid.json \ + --fn-in ${BASICDB_TILEGRID} \ --fn-out build/tilegrid_tdb.json build/tilegrid.json: generate_full.py build/tilegrid_tdb.json From e464172e031e911b4a02681d0d6afd4bda2608c7 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Fri, 17 Jan 2020 12:17:03 +0100 Subject: [PATCH 18/35] 074-dump_all: exclude tiles and node that are in the excluded roi Signed-off-by: Alessandro Comodi --- fuzzers/074-dump_all/jobnodes.tcl | 16 +++++++++++++++- fuzzers/074-dump_all/jobtiles.tcl | 16 ++++++++++++++++ 2 files changed, 31 insertions(+), 1 deletion(-) diff --git a/fuzzers/074-dump_all/jobnodes.tcl b/fuzzers/074-dump_all/jobnodes.tcl index 7f7b4eb5..6f2902ba 100644 --- a/fuzzers/074-dump_all/jobnodes.tcl +++ b/fuzzers/074-dump_all/jobnodes.tcl @@ -13,10 +13,24 @@ set root_fp [open "root_node_${blocknb}.csv" w] set nodes [get_nodes] -for {set j $start } { $j < $stop } { incr j } { +create_pblock exclude_roi +foreach roi "$::env(XRAY_EXCLUDE_ROI_TILEGRID)" { +puts "ROI: $roi" +resize_pblock [get_pblocks exclude_roi] -add "$roi" +} +set not_allowed_sites [get_sites -of_objects [get_pblocks exclude_roi]] +set not_allowed_nodes [get_nodes -of_objects [get_tiles -of_objects $not_allowed_sites]] + +for {set j $start } { $j < $stop } { incr j } { set node [lindex $nodes $j] + # If node is not allowed, skip it + set res [lsearch $not_allowed_nodes $node] + if { $res != -1 } { + continue + } + file mkdir [file dirname "${node}"] set fname $node.json5 puts $root_fp "node,,$fname" diff --git a/fuzzers/074-dump_all/jobtiles.tcl b/fuzzers/074-dump_all/jobtiles.tcl index f6a6bc17..bd0f56ab 100644 --- a/fuzzers/074-dump_all/jobtiles.tcl +++ b/fuzzers/074-dump_all/jobtiles.tcl @@ -13,6 +13,16 @@ set root_fp [open "root_${blocknb}.csv" w] #puts $root_fp "filetype,subtype,filename" set tiles [get_tiles] + +create_pblock exclude_roi +foreach roi "$::env(XRAY_EXCLUDE_ROI_TILEGRID)" { +puts "ROI: $roi" +resize_pblock [get_pblocks exclude_roi] -add "$roi" +} + +set not_allowed_sites [get_sites -of_objects [get_pblocks exclude_roi]] +set not_allowed_tiles [get_tiles -of_objects $not_allowed_sites] + # Convert DRIVE from ??? units to 10^(-3 to -6) Ohms set MAGIC 0.6875 @@ -42,6 +52,12 @@ for {set j $start } { $j < $stop } { incr j } { set tile [lindex $tiles $j] + # If tile is not allowed, skip it + set res [lsearch $not_allowed_tiles $tile] + if { $res != -1 } { + continue + } + set fname tile_$tile.json5 set tile_type [get_property TYPE $tile] puts $root_fp "tile,$tile_type,$fname" From 9a88b77620448aea60413f21d91a5de6151e42b3 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Fri, 17 Jan 2020 12:25:50 +0100 Subject: [PATCH 19/35] run make format Signed-off-by: Alessandro Comodi --- fuzzers/074-dump_all/jobnodes.tcl | 4 ++-- fuzzers/074-dump_all/jobtiles.tcl | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/fuzzers/074-dump_all/jobnodes.tcl b/fuzzers/074-dump_all/jobnodes.tcl index 6f2902ba..824c7e8d 100644 --- a/fuzzers/074-dump_all/jobnodes.tcl +++ b/fuzzers/074-dump_all/jobnodes.tcl @@ -15,8 +15,8 @@ set nodes [get_nodes] create_pblock exclude_roi foreach roi "$::env(XRAY_EXCLUDE_ROI_TILEGRID)" { -puts "ROI: $roi" -resize_pblock [get_pblocks exclude_roi] -add "$roi" + puts "ROI: $roi" + resize_pblock [get_pblocks exclude_roi] -add "$roi" } set not_allowed_sites [get_sites -of_objects [get_pblocks exclude_roi]] diff --git a/fuzzers/074-dump_all/jobtiles.tcl b/fuzzers/074-dump_all/jobtiles.tcl index bd0f56ab..37b37e58 100644 --- a/fuzzers/074-dump_all/jobtiles.tcl +++ b/fuzzers/074-dump_all/jobtiles.tcl @@ -16,8 +16,8 @@ set tiles [get_tiles] create_pblock exclude_roi foreach roi "$::env(XRAY_EXCLUDE_ROI_TILEGRID)" { -puts "ROI: $roi" -resize_pblock [get_pblocks exclude_roi] -add "$roi" + puts "ROI: $roi" + resize_pblock [get_pblocks exclude_roi] -add "$roi" } set not_allowed_sites [get_sites -of_objects [get_pblocks exclude_roi]] From d4f3c5ce8029d27f8d055cbfcb10bd3acace2d19 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Fri, 17 Jan 2020 15:58:24 +0100 Subject: [PATCH 20/35] fix checkdb.py Signed-off-by: Alessandro Comodi --- utils/checkdb.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/utils/checkdb.py b/utils/checkdb.py index 988ae7bd..b1ec607f 100755 --- a/utils/checkdb.py +++ b/utils/checkdb.py @@ -170,10 +170,11 @@ def main(): description="Parse a db repository, checking for consistency") util.db_root_arg(parser) + util.part_arg(parser) parser.add_argument('--verbose', action='store_true', help='') args = parser.parse_args() - run(args.db_root, verbose=args.verbose) + run(args.db_root, args.part, verbose=args.verbose) if __name__ == '__main__': From 7226354bdf1d0d0ef4ce57c8436b3f2822c7ff2f Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Fri, 17 Jan 2020 16:10:42 +0100 Subject: [PATCH 21/35] fix env variable usage in roi_harness minitest Signed-off-by: Alessandro Comodi --- minitests/roi_harness/runme.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/minitests/roi_harness/runme.sh b/minitests/roi_harness/runme.sh index 73a31fa8..8d160839 100755 --- a/minitests/roi_harness/runme.sh +++ b/minitests/roi_harness/runme.sh @@ -21,7 +21,7 @@ make pushdb popd popd EOF -stat ${XRAY_DIR}/database/${XRAY_DATABASE}/${XRAY_PART}.yaml >/dev/null +stat ${XRAY_PART_YAML} >/dev/null # 6x by 18y CLBs (108) if [ "$SMALL" = Y ] ; then From 88f78304561075820842cadcef03128b5d7a097b Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Mon, 20 Jan 2020 10:52:41 +0100 Subject: [PATCH 22/35] addressed review comments Signed-off-by: Alessandro Comodi --- fuzzers/Makefile | 8 ++++---- minitests/timing/Makefile | 2 ++ 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/fuzzers/Makefile b/fuzzers/Makefile index 140ffed0..165dafb6 100644 --- a/fuzzers/Makefile +++ b/fuzzers/Makefile @@ -136,19 +136,19 @@ roi_only: # Part only targets # ----------------- -part_only_yaml: +part_only_yaml: ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.yaml ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.json +$(MAKE) -C 001-part-yaml run -part_only_tilegrid: +part_only_tilegrid: ${XRAY_FAMILY_DIR}/${XRAY_PART}/tilegrid.json +$(MAKE) -C 005-tilegrid run cp ${XRAY_FAMILY_DIR}/tilegrid.json ${XRAY_FAMILY_DIR}/${XRAY_PART}/tilegrid.json -part_only_tileconn: +part_only_tileconn: ${XRAY_FAMILY_DIR}/${XRAY_PART}/tileconn.json +$(MAKE) -C 072-ordered_wires run +$(MAKE) -C 073-get_counts run +$(MAKE) -C 074-dump_all run -part_only_pins: +part_only_pins: ${XRAY_FAMILY_DIR}/${XRAY_PART}/package_pins.csv +$(MAKE) -C 075-pins run part_only: diff --git a/minitests/timing/Makefile b/minitests/timing/Makefile index 6595ab39..b5bd2a46 100644 --- a/minitests/timing/Makefile +++ b/minitests/timing/Makefile @@ -27,6 +27,8 @@ build/$(2)_$(1)/timing_$(2)_$(1).json5: build/.touch runme.tcl $(3) build/timing_$(2)_$(1).xlsx: build/$(2)_$(1)/timing_$(2)_$(1).json create_timing_worksheet_db.py python3 create_timing_worksheet_db.py \ --timing_json build/$(2)_$(1)/timing_$(2)_$(1).json \ + --db_root ${XRAY_FAMILY_DIR} \ + --part ${XRAY_PART} \ --output_xlsx build/timing_$(2)_$(1).xlsx build/$(2)_$(1)/design_$(2)_$(1).fasm: build/$(2)_$(1)/timing_$(2)_$(1).json From 90d88bc7a290b6f9aa5c7246c9805f145728492a Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Mon, 20 Jan 2020 11:08:06 +0100 Subject: [PATCH 23/35] fix roi_only parts Signed-off-by: Alessandro Comodi --- Makefile | 2 +- fuzzers/Makefile | 19 ++++++++++++------- 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/Makefile b/Makefile index d8d49cb6..f86c8378 100644 --- a/Makefile +++ b/Makefile @@ -187,7 +187,7 @@ db-extras-kintex7: @true db-extras-zynq7: - +source minitests/roi_harness/zybo-swbut.sh && $(MAKE) -C fuzzers part_only + +source minitests/roi_harness/zybo-swbut.sh && $(MAKE) -C fuzzers roi_only +source minitests/roi_harness/zybo-swbut.sh && \ $(MAKE) -C minitests/roi_harness \ HARNESS_DIR=$(XRAY_DATABASE_DIR)/zynq7/harness/zybo/swbut run diff --git a/fuzzers/Makefile b/fuzzers/Makefile index 165dafb6..f4bc20d5 100644 --- a/fuzzers/Makefile +++ b/fuzzers/Makefile @@ -127,12 +127,6 @@ $(eval $(call fuzzer,100-dsp-mskpat,005-tilegrid)) quick: $(MAKE) QUICK=Y -# roi_only runs the fuzzers required for supporting additional parts when building -# an roi harness. -roi_only: - +$(MAKE) -C 001-part-yaml run - +$(MAKE) -C 075-pins run - # Part only targets # ----------------- @@ -141,7 +135,6 @@ part_only_yaml: ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.yaml ${XRAY_FAMILY_DIR}/${X part_only_tilegrid: ${XRAY_FAMILY_DIR}/${XRAY_PART}/tilegrid.json +$(MAKE) -C 005-tilegrid run - cp ${XRAY_FAMILY_DIR}/tilegrid.json ${XRAY_FAMILY_DIR}/${XRAY_PART}/tilegrid.json part_only_tileconn: ${XRAY_FAMILY_DIR}/${XRAY_PART}/tileconn.json +$(MAKE) -C 072-ordered_wires run @@ -151,6 +144,7 @@ part_only_tileconn: ${XRAY_FAMILY_DIR}/${XRAY_PART}/tileconn.json part_only_pins: ${XRAY_FAMILY_DIR}/${XRAY_PART}/package_pins.csv +$(MAKE) -C 075-pins run +# part_only runs the fuzzers required to support additional parts part_only: # Create PART-specific directory mkdir -p ${XRAY_FAMILY_DIR}/${XRAY_PART} @@ -163,5 +157,16 @@ part_only: # Generate package pins +$(MAKE) part_only_pins +# roi_only runs the fuzzers required for supporting additional parts when building +# a roi harness. +roi_only: + # Create PART-specific directory + mkdir -p ${XRAY_FAMILY_DIR}/${XRAY_PART} + # Generate YAML + +$(MAKE) part_only_yaml + # Generate Tile grid + +$(MAKE) part_only_tilegrid + # Generate package pins + +$(MAKE) part_only_pins .PHONY: all clean clean_fuzzers clean_logs quick part_only roi_only From 15d914f2c528d2b24c92acb15aaee32ba4b85953 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Mon, 20 Jan 2020 11:09:04 +0100 Subject: [PATCH 24/35] 074-dump_all: changed ignored_wires location Signed-off-by: Alessandro Comodi --- fuzzers/074-dump_all/generate_after_dump.sh | 2 +- .../xc7a200tffg1156-1_ignored_wires.txt | 1580 +++++++++++++++++ .../artix7/xc7a50tfgg484-1_ignored_wires.txt} | 0 .../xc7k70tfbg676-2_ignored_wires.txt} | 0 .../zynq7/xc7z010clg400-1_ignored_wires.txt} | 0 5 files changed, 1581 insertions(+), 1 deletion(-) create mode 100644 fuzzers/074-dump_all/ignored_wires/artix7/xc7a200tffg1156-1_ignored_wires.txt rename fuzzers/074-dump_all/{artix7_ignored_wires.txt => ignored_wires/artix7/xc7a50tfgg484-1_ignored_wires.txt} (100%) rename fuzzers/074-dump_all/{kintex7_ignored_wires.txt => ignored_wires/kintex7/xc7k70tfbg676-2_ignored_wires.txt} (100%) rename fuzzers/074-dump_all/{zynq7_ignored_wires.txt => ignored_wires/zynq7/xc7z010clg400-1_ignored_wires.txt} (100%) diff --git a/fuzzers/074-dump_all/generate_after_dump.sh b/fuzzers/074-dump_all/generate_after_dump.sh index c67a8fb8..c1320779 100755 --- a/fuzzers/074-dump_all/generate_after_dump.sh +++ b/fuzzers/074-dump_all/generate_after_dump.sh @@ -11,4 +11,4 @@ python3 create_node_tree.py \ --output_dir build/output python3 reduce_site_types.py --output_dir build/output python3 generate_grid.py --root_dir build/specimen_001/ --output_dir build/output \ - --ignored_wires ${XRAY_DATABASE}_ignored_wires.txt + --ignored_wires ignored_wires/${XRAY_DATABASE}/${XRAY_PART}_ignored_wires.txt diff --git a/fuzzers/074-dump_all/ignored_wires/artix7/xc7a200tffg1156-1_ignored_wires.txt b/fuzzers/074-dump_all/ignored_wires/artix7/xc7a200tffg1156-1_ignored_wires.txt new file mode 100644 index 00000000..90cdac9c --- /dev/null +++ b/fuzzers/074-dump_all/ignored_wires/artix7/xc7a200tffg1156-1_ignored_wires.txt @@ -0,0 +1,1580 @@ +CMT_FIFO_L_X257Y112/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y112/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y112/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y112/FIFO_DQS_IOTOPHASER_5 +CMT_FIFO_L_X257Y124/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y124/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y124/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y124/FIFO_DQS_IOTOPHASER_44 +CMT_FIFO_L_X257Y137/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y137/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y137/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y137/FIFO_DQS_IOTOPHASER_5 +CMT_FIFO_L_X257Y149/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y149/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y149/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y149/FIFO_DQS_IOTOPHASER_44 +CMT_FIFO_L_X257Y164/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y164/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y164/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y164/FIFO_DQS_IOTOPHASER_5 +CMT_FIFO_L_X257Y176/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y176/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y176/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y176/FIFO_DQS_IOTOPHASER_44 +CMT_FIFO_L_X257Y189/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y189/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y189/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y189/FIFO_DQS_IOTOPHASER_5 +CMT_FIFO_L_X257Y20/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y20/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y20/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y20/FIFO_DQS_IOTOPHASER_44 +CMT_FIFO_L_X257Y201/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y201/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y201/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y201/FIFO_DQS_IOTOPHASER_44 +CMT_FIFO_L_X257Y216/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y216/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y216/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y216/FIFO_DQS_IOTOPHASER_5 +CMT_FIFO_L_X257Y228/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y228/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y228/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y228/FIFO_DQS_IOTOPHASER_44 +CMT_FIFO_L_X257Y241/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y241/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y241/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y241/FIFO_DQS_IOTOPHASER_5 +CMT_FIFO_L_X257Y253/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y253/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y253/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y253/FIFO_DQS_IOTOPHASER_44 +CMT_FIFO_L_X257Y33/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y33/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y33/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y33/FIFO_DQS_IOTOPHASER_5 +CMT_FIFO_L_X257Y45/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y45/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y45/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_L_X257Y45/FIFO_DQS_IOTOPHASER_44 +CMT_FIFO_L_X257Y60/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_L_X257Y60/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_L_X257Y60/FIFO_DQS_IOTOPHASER_3 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+CMT_FIFO_R_X7Y33/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_R_X7Y33/FIFO_DQS_IOTOPHASER_5 +CMT_FIFO_R_X7Y45/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_R_X7Y45/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_R_X7Y45/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_R_X7Y45/FIFO_DQS_IOTOPHASER_44 +CMT_FIFO_R_X7Y60/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_R_X7Y60/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_R_X7Y60/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_R_X7Y60/FIFO_DQS_IOTOPHASER_5 +CMT_FIFO_R_X7Y72/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_R_X7Y72/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_R_X7Y72/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_R_X7Y72/FIFO_DQS_IOTOPHASER_44 +CMT_FIFO_R_X7Y8/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_R_X7Y8/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_R_X7Y8/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_R_X7Y8/FIFO_DQS_IOTOPHASER_5 +CMT_FIFO_R_X7Y85/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_R_X7Y85/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_R_X7Y85/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_R_X7Y85/FIFO_DQS_IOTOPHASER_5 +CMT_FIFO_R_X7Y97/FIFO_DQS_IOTOPHASER_1 +CMT_FIFO_R_X7Y97/FIFO_DQS_IOTOPHASER_22 +CMT_FIFO_R_X7Y97/FIFO_DQS_IOTOPHASER_3 +CMT_FIFO_R_X7Y97/FIFO_DQS_IOTOPHASER_44 +CMT_TOP_L_LOWER_B_X256Y113/CMT_MMCM_DQS_TO_PHASERA +CMT_TOP_L_LOWER_B_X256Y165/CMT_MMCM_DQS_TO_PHASERA +CMT_TOP_L_LOWER_B_X256Y217/CMT_MMCM_DQS_TO_PHASERA +CMT_TOP_L_LOWER_B_X256Y61/CMT_MMCM_DQS_TO_PHASERA +CMT_TOP_L_LOWER_B_X256Y9/CMT_MMCM_DQS_TO_PHASERA +CMT_TOP_L_LOWER_T_X256Y122/CMT_PHASER_DOWN_DQS_TO_PHASER_A +CMT_TOP_L_LOWER_T_X256Y122/CMT_PHASER_DOWN_DQS_TO_PHASER_B +CMT_TOP_L_LOWER_T_X256Y174/CMT_PHASER_DOWN_DQS_TO_PHASER_A +CMT_TOP_L_LOWER_T_X256Y174/CMT_PHASER_DOWN_DQS_TO_PHASER_B +CMT_TOP_L_LOWER_T_X256Y18/CMT_PHASER_DOWN_DQS_TO_PHASER_A +CMT_TOP_L_LOWER_T_X256Y18/CMT_PHASER_DOWN_DQS_TO_PHASER_B +CMT_TOP_L_LOWER_T_X256Y226/CMT_PHASER_DOWN_DQS_TO_PHASER_A +CMT_TOP_L_LOWER_T_X256Y226/CMT_PHASER_DOWN_DQS_TO_PHASER_B +CMT_TOP_L_LOWER_T_X256Y70/CMT_PHASER_DOWN_DQS_TO_PHASER_A +CMT_TOP_L_LOWER_T_X256Y70/CMT_PHASER_DOWN_DQS_TO_PHASER_B +CMT_TOP_L_UPPER_B_X256Y135/CMT_PHASER_UP_DQS_TO_PHASER_C +CMT_TOP_L_UPPER_B_X256Y135/CMT_PHASER_UP_DQS_TO_PHASER_D +CMT_TOP_L_UPPER_B_X256Y187/CMT_PHASER_UP_DQS_TO_PHASER_C +CMT_TOP_L_UPPER_B_X256Y187/CMT_PHASER_UP_DQS_TO_PHASER_D +CMT_TOP_L_UPPER_B_X256Y239/CMT_PHASER_UP_DQS_TO_PHASER_C +CMT_TOP_L_UPPER_B_X256Y239/CMT_PHASER_UP_DQS_TO_PHASER_D +CMT_TOP_L_UPPER_B_X256Y31/CMT_PHASER_UP_DQS_TO_PHASER_C +CMT_TOP_L_UPPER_B_X256Y31/CMT_PHASER_UP_DQS_TO_PHASER_D +CMT_TOP_L_UPPER_B_X256Y83/CMT_PHASER_UP_DQS_TO_PHASER_C +CMT_TOP_L_UPPER_B_X256Y83/CMT_PHASER_UP_DQS_TO_PHASER_D +CMT_TOP_L_UPPER_T_X256Y148/CMT_PLL_DQS_TO_PHASER_D +CMT_TOP_L_UPPER_T_X256Y200/CMT_PLL_DQS_TO_PHASER_D +CMT_TOP_L_UPPER_T_X256Y252/CMT_PLL_DQS_TO_PHASER_D +CMT_TOP_L_UPPER_T_X256Y44/CMT_PLL_DQS_TO_PHASER_D +CMT_TOP_L_UPPER_T_X256Y96/CMT_PLL_DQS_TO_PHASER_D +CMT_TOP_R_LOWER_B_X8Y113/CMT_MMCM_DQS_TO_PHASERA +CMT_TOP_R_LOWER_B_X8Y165/CMT_MMCM_DQS_TO_PHASERA +CMT_TOP_R_LOWER_B_X8Y217/CMT_MMCM_DQS_TO_PHASERA +CMT_TOP_R_LOWER_B_X8Y61/CMT_MMCM_DQS_TO_PHASERA +CMT_TOP_R_LOWER_B_X8Y9/CMT_MMCM_DQS_TO_PHASERA +CMT_TOP_R_LOWER_T_X8Y122/CMT_PHASER_DOWN_DQS_TO_PHASER_A +CMT_TOP_R_LOWER_T_X8Y122/CMT_PHASER_DOWN_DQS_TO_PHASER_B +CMT_TOP_R_LOWER_T_X8Y174/CMT_PHASER_DOWN_DQS_TO_PHASER_A +CMT_TOP_R_LOWER_T_X8Y174/CMT_PHASER_DOWN_DQS_TO_PHASER_B +CMT_TOP_R_LOWER_T_X8Y18/CMT_PHASER_DOWN_DQS_TO_PHASER_A +CMT_TOP_R_LOWER_T_X8Y18/CMT_PHASER_DOWN_DQS_TO_PHASER_B +CMT_TOP_R_LOWER_T_X8Y226/CMT_PHASER_DOWN_DQS_TO_PHASER_A +CMT_TOP_R_LOWER_T_X8Y226/CMT_PHASER_DOWN_DQS_TO_PHASER_B +CMT_TOP_R_LOWER_T_X8Y70/CMT_PHASER_DOWN_DQS_TO_PHASER_A +CMT_TOP_R_LOWER_T_X8Y70/CMT_PHASER_DOWN_DQS_TO_PHASER_B +CMT_TOP_R_UPPER_B_X8Y135/CMT_PHASER_UP_DQS_TO_PHASER_C +CMT_TOP_R_UPPER_B_X8Y135/CMT_PHASER_UP_DQS_TO_PHASER_D +CMT_TOP_R_UPPER_B_X8Y187/CMT_PHASER_UP_DQS_TO_PHASER_C +CMT_TOP_R_UPPER_B_X8Y187/CMT_PHASER_UP_DQS_TO_PHASER_D +CMT_TOP_R_UPPER_B_X8Y239/CMT_PHASER_UP_DQS_TO_PHASER_C +CMT_TOP_R_UPPER_B_X8Y239/CMT_PHASER_UP_DQS_TO_PHASER_D +CMT_TOP_R_UPPER_B_X8Y31/CMT_PHASER_UP_DQS_TO_PHASER_C +CMT_TOP_R_UPPER_B_X8Y31/CMT_PHASER_UP_DQS_TO_PHASER_D +CMT_TOP_R_UPPER_B_X8Y83/CMT_PHASER_UP_DQS_TO_PHASER_C +CMT_TOP_R_UPPER_B_X8Y83/CMT_PHASER_UP_DQS_TO_PHASER_D +CMT_TOP_R_UPPER_T_X8Y148/CMT_PLL_DQS_TO_PHASER_D +CMT_TOP_R_UPPER_T_X8Y200/CMT_PLL_DQS_TO_PHASER_D +CMT_TOP_R_UPPER_T_X8Y252/CMT_PLL_DQS_TO_PHASER_D +CMT_TOP_R_UPPER_T_X8Y44/CMT_PLL_DQS_TO_PHASER_D +CMT_TOP_R_UPPER_T_X8Y96/CMT_PLL_DQS_TO_PHASER_D +HCLK_CMT_L_X256Y130/HCLK_CMT_CCIO2 +HCLK_CMT_L_X256Y182/HCLK_CMT_CCIO2 +HCLK_CMT_L_X256Y234/HCLK_CMT_CCIO2 +HCLK_CMT_L_X256Y26/HCLK_CMT_CCIO2 +HCLK_CMT_L_X256Y78/HCLK_CMT_CCIO2 +HCLK_CMT_X8Y130/HCLK_CMT_CCIO2 +HCLK_CMT_X8Y182/HCLK_CMT_CCIO2 +HCLK_CMT_X8Y234/HCLK_CMT_CCIO2 +HCLK_CMT_X8Y26/HCLK_CMT_CCIO2 +HCLK_CMT_X8Y78/HCLK_CMT_CCIO2 +HCLK_FIFO_L_X257Y130/HCLK_FIFO_CCIO2 +HCLK_FIFO_L_X257Y182/HCLK_FIFO_CCIO2 +HCLK_FIFO_L_X257Y234/HCLK_FIFO_CCIO2 +HCLK_FIFO_L_X257Y26/HCLK_FIFO_CCIO2 +HCLK_FIFO_L_X257Y78/HCLK_FIFO_CCIO2 +HCLK_FIFO_L_X7Y130/HCLK_FIFO_CCIO2 +HCLK_FIFO_L_X7Y182/HCLK_FIFO_CCIO2 +HCLK_FIFO_L_X7Y234/HCLK_FIFO_CCIO2 +HCLK_FIFO_L_X7Y26/HCLK_FIFO_CCIO2 +HCLK_FIFO_L_X7Y78/HCLK_FIFO_CCIO2 +HCLK_INT_INTERFACE_X258Y130/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X258Y182/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X258Y234/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X258Y26/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X258Y78/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X261Y130/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X261Y182/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X261Y234/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X261Y26/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X261Y78/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X3Y130/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X3Y182/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X3Y234/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X3Y26/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X3Y78/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X6Y130/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X6Y182/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X6Y234/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X6Y26/HCLK_INT_INTERFACE_CCIO2 +HCLK_INT_INTERFACE_X6Y78/HCLK_INT_INTERFACE_CCIO2 +HCLK_IOI3_X1Y130/HCLK_IOI_I2IOCLK_BOT0 +HCLK_IOI3_X1Y182/HCLK_IOI_I2IOCLK_BOT0 +HCLK_IOI3_X1Y234/HCLK_IOI_I2IOCLK_BOT0 +HCLK_IOI3_X1Y26/HCLK_IOI_I2IOCLK_BOT0 +HCLK_IOI3_X1Y78/HCLK_IOI_I2IOCLK_BOT0 +HCLK_IOI3_X263Y130/HCLK_IOI_I2IOCLK_BOT0 +HCLK_IOI3_X263Y182/HCLK_IOI_I2IOCLK_BOT0 +HCLK_IOI3_X263Y234/HCLK_IOI_I2IOCLK_BOT0 +HCLK_IOI3_X263Y26/HCLK_IOI_I2IOCLK_BOT0 +HCLK_IOI3_X263Y78/HCLK_IOI_I2IOCLK_BOT0 +HCLK_L_X259Y130/HCLK_CCIO2 +HCLK_L_X259Y182/HCLK_CCIO2 +HCLK_L_X259Y234/HCLK_CCIO2 +HCLK_L_X259Y26/HCLK_CCIO2 +HCLK_L_X259Y78/HCLK_CCIO2 +HCLK_L_X4Y130/HCLK_CCIO2 +HCLK_L_X4Y182/HCLK_CCIO2 +HCLK_L_X4Y234/HCLK_CCIO2 +HCLK_L_X4Y26/HCLK_CCIO2 +HCLK_L_X4Y78/HCLK_CCIO2 +HCLK_R_X260Y130/HCLK_CCIO2 +HCLK_R_X260Y182/HCLK_CCIO2 +HCLK_R_X260Y234/HCLK_CCIO2 +HCLK_R_X260Y26/HCLK_CCIO2 +HCLK_R_X260Y78/HCLK_CCIO2 +HCLK_R_X5Y130/HCLK_CCIO2 +HCLK_R_X5Y182/HCLK_CCIO2 +HCLK_R_X5Y234/HCLK_CCIO2 +HCLK_R_X5Y26/HCLK_CCIO2 +HCLK_R_X5Y78/HCLK_CCIO2 +HCLK_TERM_X262Y130/HCLK_TERM_CCIO2 +HCLK_TERM_X262Y182/HCLK_TERM_CCIO2 +HCLK_TERM_X262Y234/HCLK_TERM_CCIO2 +HCLK_TERM_X262Y26/HCLK_TERM_CCIO2 +HCLK_TERM_X262Y78/HCLK_TERM_CCIO2 +HCLK_TERM_X2Y130/HCLK_TERM_CCIO2 +HCLK_TERM_X2Y182/HCLK_TERM_CCIO2 +HCLK_TERM_X2Y234/HCLK_TERM_CCIO2 +HCLK_TERM_X2Y26/HCLK_TERM_CCIO2 +HCLK_TERM_X2Y78/HCLK_TERM_CCIO2 +INT_INTERFACE_L_X104Y105/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y107/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y109/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y11/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y111/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y115/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y117/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y119/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y121/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y129/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y131/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y133/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y135/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y139/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y141/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y143/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y145/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y15/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y155/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y157/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y159/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y161/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y165/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y167/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y169/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y17/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y171/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y179/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y181/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y183/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y185/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y189/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y19/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y191/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y193/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y195/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y205/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y207/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y209/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y21/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y211/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y215/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y217/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y219/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y221/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y229/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y231/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y233/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y235/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y239/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y241/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y243/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y245/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y29/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y31/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y33/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y35/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y39/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y41/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y43/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y45/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y5/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y55/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y57/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y59/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y61/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y65/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y67/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y69/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y7/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y71/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y79/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y81/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y83/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y85/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y89/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y9/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y91/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y93/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_L_X104Y95/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y105/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y107/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y109/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y11/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y111/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y115/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y117/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y119/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y121/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y129/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y131/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y133/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y135/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y139/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y141/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y143/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y145/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y15/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y155/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y157/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y159/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y161/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y165/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y167/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y169/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y17/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y171/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y179/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y181/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y183/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y185/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y189/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y19/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y191/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y193/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y195/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y205/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y207/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y209/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y21/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y211/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y215/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y217/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y219/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y221/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y229/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y231/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y233/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y235/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y239/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y241/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y243/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y245/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y29/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y31/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y33/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y35/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y39/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y41/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y43/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y45/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y5/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y55/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y57/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y59/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y61/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y65/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y67/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y69/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y7/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y71/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y79/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y81/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y83/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y85/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y89/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y9/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y91/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y93/L_INT_INTER_DQS_IOTOPHASER +INT_INTERFACE_R_X1Y95/L_INT_INTER_DQS_IOTOPHASER +INT_L_X0Y105/INT_DQS_IOTOPHASER +INT_L_X0Y107/INT_DQS_IOTOPHASER +INT_L_X0Y109/INT_DQS_IOTOPHASER +INT_L_X0Y11/INT_DQS_IOTOPHASER +INT_L_X0Y111/INT_DQS_IOTOPHASER +INT_L_X0Y115/INT_DQS_IOTOPHASER +INT_L_X0Y117/INT_DQS_IOTOPHASER +INT_L_X0Y119/INT_DQS_IOTOPHASER +INT_L_X0Y121/INT_DQS_IOTOPHASER +INT_L_X0Y129/INT_DQS_IOTOPHASER +INT_L_X0Y131/INT_DQS_IOTOPHASER +INT_L_X0Y133/INT_DQS_IOTOPHASER +INT_L_X0Y135/INT_DQS_IOTOPHASER +INT_L_X0Y139/INT_DQS_IOTOPHASER +INT_L_X0Y141/INT_DQS_IOTOPHASER +INT_L_X0Y143/INT_DQS_IOTOPHASER +INT_L_X0Y145/INT_DQS_IOTOPHASER +INT_L_X0Y15/INT_DQS_IOTOPHASER +INT_L_X0Y155/INT_DQS_IOTOPHASER +INT_L_X0Y157/INT_DQS_IOTOPHASER +INT_L_X0Y159/INT_DQS_IOTOPHASER +INT_L_X0Y161/INT_DQS_IOTOPHASER +INT_L_X0Y165/INT_DQS_IOTOPHASER +INT_L_X0Y167/INT_DQS_IOTOPHASER +INT_L_X0Y169/INT_DQS_IOTOPHASER +INT_L_X0Y17/INT_DQS_IOTOPHASER +INT_L_X0Y171/INT_DQS_IOTOPHASER +INT_L_X0Y179/INT_DQS_IOTOPHASER +INT_L_X0Y181/INT_DQS_IOTOPHASER +INT_L_X0Y183/INT_DQS_IOTOPHASER +INT_L_X0Y185/INT_DQS_IOTOPHASER +INT_L_X0Y189/INT_DQS_IOTOPHASER +INT_L_X0Y19/INT_DQS_IOTOPHASER +INT_L_X0Y191/INT_DQS_IOTOPHASER +INT_L_X0Y193/INT_DQS_IOTOPHASER +INT_L_X0Y195/INT_DQS_IOTOPHASER +INT_L_X0Y205/INT_DQS_IOTOPHASER +INT_L_X0Y207/INT_DQS_IOTOPHASER +INT_L_X0Y209/INT_DQS_IOTOPHASER +INT_L_X0Y21/INT_DQS_IOTOPHASER +INT_L_X0Y211/INT_DQS_IOTOPHASER +INT_L_X0Y215/INT_DQS_IOTOPHASER +INT_L_X0Y217/INT_DQS_IOTOPHASER +INT_L_X0Y219/INT_DQS_IOTOPHASER +INT_L_X0Y221/INT_DQS_IOTOPHASER +INT_L_X0Y229/INT_DQS_IOTOPHASER +INT_L_X0Y231/INT_DQS_IOTOPHASER +INT_L_X0Y233/INT_DQS_IOTOPHASER +INT_L_X0Y235/INT_DQS_IOTOPHASER +INT_L_X0Y239/INT_DQS_IOTOPHASER +INT_L_X0Y241/INT_DQS_IOTOPHASER +INT_L_X0Y243/INT_DQS_IOTOPHASER +INT_L_X0Y245/INT_DQS_IOTOPHASER +INT_L_X0Y29/INT_DQS_IOTOPHASER +INT_L_X0Y31/INT_DQS_IOTOPHASER +INT_L_X0Y33/INT_DQS_IOTOPHASER +INT_L_X0Y35/INT_DQS_IOTOPHASER +INT_L_X0Y39/INT_DQS_IOTOPHASER +INT_L_X0Y41/INT_DQS_IOTOPHASER +INT_L_X0Y43/INT_DQS_IOTOPHASER +INT_L_X0Y45/INT_DQS_IOTOPHASER +INT_L_X0Y5/INT_DQS_IOTOPHASER +INT_L_X0Y55/INT_DQS_IOTOPHASER +INT_L_X0Y57/INT_DQS_IOTOPHASER +INT_L_X0Y59/INT_DQS_IOTOPHASER +INT_L_X0Y61/INT_DQS_IOTOPHASER +INT_L_X0Y65/INT_DQS_IOTOPHASER +INT_L_X0Y67/INT_DQS_IOTOPHASER +INT_L_X0Y69/INT_DQS_IOTOPHASER +INT_L_X0Y7/INT_DQS_IOTOPHASER +INT_L_X0Y71/INT_DQS_IOTOPHASER +INT_L_X0Y79/INT_DQS_IOTOPHASER +INT_L_X0Y81/INT_DQS_IOTOPHASER +INT_L_X0Y83/INT_DQS_IOTOPHASER +INT_L_X0Y85/INT_DQS_IOTOPHASER +INT_L_X0Y89/INT_DQS_IOTOPHASER +INT_L_X0Y9/INT_DQS_IOTOPHASER +INT_L_X0Y91/INT_DQS_IOTOPHASER +INT_L_X0Y93/INT_DQS_IOTOPHASER +INT_L_X0Y95/INT_DQS_IOTOPHASER +INT_L_X104Y105/INT_DQS_IOTOPHASER +INT_L_X104Y107/INT_DQS_IOTOPHASER +INT_L_X104Y109/INT_DQS_IOTOPHASER +INT_L_X104Y11/INT_DQS_IOTOPHASER +INT_L_X104Y111/INT_DQS_IOTOPHASER +INT_L_X104Y115/INT_DQS_IOTOPHASER +INT_L_X104Y117/INT_DQS_IOTOPHASER +INT_L_X104Y119/INT_DQS_IOTOPHASER +INT_L_X104Y121/INT_DQS_IOTOPHASER +INT_L_X104Y129/INT_DQS_IOTOPHASER +INT_L_X104Y131/INT_DQS_IOTOPHASER +INT_L_X104Y133/INT_DQS_IOTOPHASER +INT_L_X104Y135/INT_DQS_IOTOPHASER +INT_L_X104Y139/INT_DQS_IOTOPHASER +INT_L_X104Y141/INT_DQS_IOTOPHASER +INT_L_X104Y143/INT_DQS_IOTOPHASER +INT_L_X104Y145/INT_DQS_IOTOPHASER +INT_L_X104Y15/INT_DQS_IOTOPHASER +INT_L_X104Y155/INT_DQS_IOTOPHASER +INT_L_X104Y157/INT_DQS_IOTOPHASER +INT_L_X104Y159/INT_DQS_IOTOPHASER +INT_L_X104Y161/INT_DQS_IOTOPHASER +INT_L_X104Y165/INT_DQS_IOTOPHASER +INT_L_X104Y167/INT_DQS_IOTOPHASER +INT_L_X104Y169/INT_DQS_IOTOPHASER +INT_L_X104Y17/INT_DQS_IOTOPHASER +INT_L_X104Y171/INT_DQS_IOTOPHASER +INT_L_X104Y179/INT_DQS_IOTOPHASER +INT_L_X104Y181/INT_DQS_IOTOPHASER +INT_L_X104Y183/INT_DQS_IOTOPHASER +INT_L_X104Y185/INT_DQS_IOTOPHASER +INT_L_X104Y189/INT_DQS_IOTOPHASER +INT_L_X104Y19/INT_DQS_IOTOPHASER +INT_L_X104Y191/INT_DQS_IOTOPHASER +INT_L_X104Y193/INT_DQS_IOTOPHASER +INT_L_X104Y195/INT_DQS_IOTOPHASER +INT_L_X104Y205/INT_DQS_IOTOPHASER +INT_L_X104Y207/INT_DQS_IOTOPHASER +INT_L_X104Y209/INT_DQS_IOTOPHASER +INT_L_X104Y21/INT_DQS_IOTOPHASER +INT_L_X104Y211/INT_DQS_IOTOPHASER +INT_L_X104Y215/INT_DQS_IOTOPHASER +INT_L_X104Y217/INT_DQS_IOTOPHASER +INT_L_X104Y219/INT_DQS_IOTOPHASER +INT_L_X104Y221/INT_DQS_IOTOPHASER +INT_L_X104Y229/INT_DQS_IOTOPHASER +INT_L_X104Y231/INT_DQS_IOTOPHASER +INT_L_X104Y233/INT_DQS_IOTOPHASER +INT_L_X104Y235/INT_DQS_IOTOPHASER +INT_L_X104Y239/INT_DQS_IOTOPHASER +INT_L_X104Y241/INT_DQS_IOTOPHASER +INT_L_X104Y243/INT_DQS_IOTOPHASER +INT_L_X104Y245/INT_DQS_IOTOPHASER +INT_L_X104Y29/INT_DQS_IOTOPHASER +INT_L_X104Y31/INT_DQS_IOTOPHASER +INT_L_X104Y33/INT_DQS_IOTOPHASER +INT_L_X104Y35/INT_DQS_IOTOPHASER +INT_L_X104Y39/INT_DQS_IOTOPHASER +INT_L_X104Y41/INT_DQS_IOTOPHASER +INT_L_X104Y43/INT_DQS_IOTOPHASER +INT_L_X104Y45/INT_DQS_IOTOPHASER +INT_L_X104Y5/INT_DQS_IOTOPHASER +INT_L_X104Y55/INT_DQS_IOTOPHASER +INT_L_X104Y57/INT_DQS_IOTOPHASER +INT_L_X104Y59/INT_DQS_IOTOPHASER +INT_L_X104Y61/INT_DQS_IOTOPHASER +INT_L_X104Y65/INT_DQS_IOTOPHASER +INT_L_X104Y67/INT_DQS_IOTOPHASER +INT_L_X104Y69/INT_DQS_IOTOPHASER +INT_L_X104Y7/INT_DQS_IOTOPHASER +INT_L_X104Y71/INT_DQS_IOTOPHASER +INT_L_X104Y79/INT_DQS_IOTOPHASER +INT_L_X104Y81/INT_DQS_IOTOPHASER +INT_L_X104Y83/INT_DQS_IOTOPHASER +INT_L_X104Y85/INT_DQS_IOTOPHASER +INT_L_X104Y89/INT_DQS_IOTOPHASER +INT_L_X104Y9/INT_DQS_IOTOPHASER +INT_L_X104Y91/INT_DQS_IOTOPHASER +INT_L_X104Y93/INT_DQS_IOTOPHASER +INT_L_X104Y95/INT_DQS_IOTOPHASER +INT_R_X105Y105/INT_DQS_IOTOPHASER +INT_R_X105Y107/INT_DQS_IOTOPHASER +INT_R_X105Y109/INT_DQS_IOTOPHASER +INT_R_X105Y11/INT_DQS_IOTOPHASER +INT_R_X105Y111/INT_DQS_IOTOPHASER +INT_R_X105Y115/INT_DQS_IOTOPHASER +INT_R_X105Y117/INT_DQS_IOTOPHASER +INT_R_X105Y119/INT_DQS_IOTOPHASER +INT_R_X105Y121/INT_DQS_IOTOPHASER +INT_R_X105Y129/INT_DQS_IOTOPHASER +INT_R_X105Y131/INT_DQS_IOTOPHASER +INT_R_X105Y133/INT_DQS_IOTOPHASER +INT_R_X105Y135/INT_DQS_IOTOPHASER +INT_R_X105Y139/INT_DQS_IOTOPHASER +INT_R_X105Y141/INT_DQS_IOTOPHASER +INT_R_X105Y143/INT_DQS_IOTOPHASER +INT_R_X105Y145/INT_DQS_IOTOPHASER +INT_R_X105Y15/INT_DQS_IOTOPHASER +INT_R_X105Y155/INT_DQS_IOTOPHASER +INT_R_X105Y157/INT_DQS_IOTOPHASER +INT_R_X105Y159/INT_DQS_IOTOPHASER +INT_R_X105Y161/INT_DQS_IOTOPHASER +INT_R_X105Y165/INT_DQS_IOTOPHASER +INT_R_X105Y167/INT_DQS_IOTOPHASER +INT_R_X105Y169/INT_DQS_IOTOPHASER +INT_R_X105Y17/INT_DQS_IOTOPHASER +INT_R_X105Y171/INT_DQS_IOTOPHASER +INT_R_X105Y179/INT_DQS_IOTOPHASER +INT_R_X105Y181/INT_DQS_IOTOPHASER +INT_R_X105Y183/INT_DQS_IOTOPHASER +INT_R_X105Y185/INT_DQS_IOTOPHASER +INT_R_X105Y189/INT_DQS_IOTOPHASER +INT_R_X105Y19/INT_DQS_IOTOPHASER +INT_R_X105Y191/INT_DQS_IOTOPHASER +INT_R_X105Y193/INT_DQS_IOTOPHASER +INT_R_X105Y195/INT_DQS_IOTOPHASER +INT_R_X105Y205/INT_DQS_IOTOPHASER +INT_R_X105Y207/INT_DQS_IOTOPHASER +INT_R_X105Y209/INT_DQS_IOTOPHASER +INT_R_X105Y21/INT_DQS_IOTOPHASER +INT_R_X105Y211/INT_DQS_IOTOPHASER +INT_R_X105Y215/INT_DQS_IOTOPHASER +INT_R_X105Y217/INT_DQS_IOTOPHASER +INT_R_X105Y219/INT_DQS_IOTOPHASER +INT_R_X105Y221/INT_DQS_IOTOPHASER +INT_R_X105Y229/INT_DQS_IOTOPHASER +INT_R_X105Y231/INT_DQS_IOTOPHASER +INT_R_X105Y233/INT_DQS_IOTOPHASER +INT_R_X105Y235/INT_DQS_IOTOPHASER +INT_R_X105Y239/INT_DQS_IOTOPHASER +INT_R_X105Y241/INT_DQS_IOTOPHASER +INT_R_X105Y243/INT_DQS_IOTOPHASER +INT_R_X105Y245/INT_DQS_IOTOPHASER +INT_R_X105Y29/INT_DQS_IOTOPHASER +INT_R_X105Y31/INT_DQS_IOTOPHASER +INT_R_X105Y33/INT_DQS_IOTOPHASER +INT_R_X105Y35/INT_DQS_IOTOPHASER +INT_R_X105Y39/INT_DQS_IOTOPHASER +INT_R_X105Y41/INT_DQS_IOTOPHASER +INT_R_X105Y43/INT_DQS_IOTOPHASER +INT_R_X105Y45/INT_DQS_IOTOPHASER +INT_R_X105Y5/INT_DQS_IOTOPHASER +INT_R_X105Y55/INT_DQS_IOTOPHASER +INT_R_X105Y57/INT_DQS_IOTOPHASER +INT_R_X105Y59/INT_DQS_IOTOPHASER +INT_R_X105Y61/INT_DQS_IOTOPHASER +INT_R_X105Y65/INT_DQS_IOTOPHASER +INT_R_X105Y67/INT_DQS_IOTOPHASER +INT_R_X105Y69/INT_DQS_IOTOPHASER +INT_R_X105Y7/INT_DQS_IOTOPHASER +INT_R_X105Y71/INT_DQS_IOTOPHASER +INT_R_X105Y79/INT_DQS_IOTOPHASER +INT_R_X105Y81/INT_DQS_IOTOPHASER +INT_R_X105Y83/INT_DQS_IOTOPHASER +INT_R_X105Y85/INT_DQS_IOTOPHASER +INT_R_X105Y89/INT_DQS_IOTOPHASER +INT_R_X105Y9/INT_DQS_IOTOPHASER +INT_R_X105Y91/INT_DQS_IOTOPHASER +INT_R_X105Y93/INT_DQS_IOTOPHASER +INT_R_X105Y95/INT_DQS_IOTOPHASER +INT_R_X1Y105/INT_DQS_IOTOPHASER +INT_R_X1Y107/INT_DQS_IOTOPHASER +INT_R_X1Y109/INT_DQS_IOTOPHASER +INT_R_X1Y11/INT_DQS_IOTOPHASER +INT_R_X1Y111/INT_DQS_IOTOPHASER +INT_R_X1Y115/INT_DQS_IOTOPHASER +INT_R_X1Y117/INT_DQS_IOTOPHASER +INT_R_X1Y119/INT_DQS_IOTOPHASER +INT_R_X1Y121/INT_DQS_IOTOPHASER +INT_R_X1Y129/INT_DQS_IOTOPHASER +INT_R_X1Y131/INT_DQS_IOTOPHASER +INT_R_X1Y133/INT_DQS_IOTOPHASER +INT_R_X1Y135/INT_DQS_IOTOPHASER +INT_R_X1Y139/INT_DQS_IOTOPHASER +INT_R_X1Y141/INT_DQS_IOTOPHASER +INT_R_X1Y143/INT_DQS_IOTOPHASER +INT_R_X1Y145/INT_DQS_IOTOPHASER +INT_R_X1Y15/INT_DQS_IOTOPHASER +INT_R_X1Y155/INT_DQS_IOTOPHASER +INT_R_X1Y157/INT_DQS_IOTOPHASER +INT_R_X1Y159/INT_DQS_IOTOPHASER +INT_R_X1Y161/INT_DQS_IOTOPHASER +INT_R_X1Y165/INT_DQS_IOTOPHASER +INT_R_X1Y167/INT_DQS_IOTOPHASER +INT_R_X1Y169/INT_DQS_IOTOPHASER +INT_R_X1Y17/INT_DQS_IOTOPHASER +INT_R_X1Y171/INT_DQS_IOTOPHASER +INT_R_X1Y179/INT_DQS_IOTOPHASER +INT_R_X1Y181/INT_DQS_IOTOPHASER +INT_R_X1Y183/INT_DQS_IOTOPHASER +INT_R_X1Y185/INT_DQS_IOTOPHASER +INT_R_X1Y189/INT_DQS_IOTOPHASER +INT_R_X1Y19/INT_DQS_IOTOPHASER +INT_R_X1Y191/INT_DQS_IOTOPHASER +INT_R_X1Y193/INT_DQS_IOTOPHASER +INT_R_X1Y195/INT_DQS_IOTOPHASER +INT_R_X1Y205/INT_DQS_IOTOPHASER +INT_R_X1Y207/INT_DQS_IOTOPHASER +INT_R_X1Y209/INT_DQS_IOTOPHASER +INT_R_X1Y21/INT_DQS_IOTOPHASER +INT_R_X1Y211/INT_DQS_IOTOPHASER +INT_R_X1Y215/INT_DQS_IOTOPHASER +INT_R_X1Y217/INT_DQS_IOTOPHASER +INT_R_X1Y219/INT_DQS_IOTOPHASER +INT_R_X1Y221/INT_DQS_IOTOPHASER +INT_R_X1Y229/INT_DQS_IOTOPHASER +INT_R_X1Y231/INT_DQS_IOTOPHASER +INT_R_X1Y233/INT_DQS_IOTOPHASER +INT_R_X1Y235/INT_DQS_IOTOPHASER +INT_R_X1Y239/INT_DQS_IOTOPHASER +INT_R_X1Y241/INT_DQS_IOTOPHASER +INT_R_X1Y243/INT_DQS_IOTOPHASER +INT_R_X1Y245/INT_DQS_IOTOPHASER +INT_R_X1Y29/INT_DQS_IOTOPHASER +INT_R_X1Y31/INT_DQS_IOTOPHASER +INT_R_X1Y33/INT_DQS_IOTOPHASER +INT_R_X1Y35/INT_DQS_IOTOPHASER +INT_R_X1Y39/INT_DQS_IOTOPHASER +INT_R_X1Y41/INT_DQS_IOTOPHASER +INT_R_X1Y43/INT_DQS_IOTOPHASER +INT_R_X1Y45/INT_DQS_IOTOPHASER +INT_R_X1Y5/INT_DQS_IOTOPHASER +INT_R_X1Y55/INT_DQS_IOTOPHASER +INT_R_X1Y57/INT_DQS_IOTOPHASER +INT_R_X1Y59/INT_DQS_IOTOPHASER +INT_R_X1Y61/INT_DQS_IOTOPHASER +INT_R_X1Y65/INT_DQS_IOTOPHASER +INT_R_X1Y67/INT_DQS_IOTOPHASER +INT_R_X1Y69/INT_DQS_IOTOPHASER +INT_R_X1Y7/INT_DQS_IOTOPHASER +INT_R_X1Y71/INT_DQS_IOTOPHASER +INT_R_X1Y79/INT_DQS_IOTOPHASER +INT_R_X1Y81/INT_DQS_IOTOPHASER +INT_R_X1Y83/INT_DQS_IOTOPHASER +INT_R_X1Y85/INT_DQS_IOTOPHASER +INT_R_X1Y89/INT_DQS_IOTOPHASER +INT_R_X1Y9/INT_DQS_IOTOPHASER +INT_R_X1Y91/INT_DQS_IOTOPHASER +INT_R_X1Y93/INT_DQS_IOTOPHASER +INT_R_X1Y95/INT_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y105/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y107/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y109/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y11/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y111/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y115/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y117/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y119/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y121/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y129/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y131/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y133/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y135/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y139/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y141/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y143/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y145/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y15/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y155/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y157/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y159/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y161/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y165/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y167/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y169/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y17/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y171/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y179/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y181/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y183/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y185/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y189/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y19/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y191/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y193/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y195/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y205/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y207/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y209/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y21/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y211/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y215/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y217/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y219/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y221/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y229/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y231/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y233/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y235/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y239/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y241/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y243/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y245/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y29/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y31/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y33/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y35/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y39/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y41/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y43/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y45/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y5/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y55/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y57/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y59/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y61/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y65/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y67/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y69/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y7/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y71/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y79/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y81/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y83/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y85/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y89/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y9/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y91/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y93/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_L_X0Y95/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y105/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y107/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y109/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y11/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y111/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y115/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y117/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y119/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y121/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y129/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y131/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y133/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y135/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y139/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y141/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y143/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y145/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y15/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y155/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y157/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y159/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y161/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y165/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y167/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y169/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y17/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y171/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y179/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y181/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y183/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y185/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y189/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y19/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y191/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y193/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y195/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y205/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y207/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y209/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y21/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y211/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y215/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y217/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y219/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y221/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y229/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y231/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y233/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y235/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y239/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y241/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y243/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y245/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y29/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y31/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y33/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y35/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y39/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y41/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y43/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y45/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y5/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y55/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y57/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y59/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y61/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y65/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y67/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y69/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y7/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y71/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y79/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y81/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y83/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y85/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y89/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y9/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y91/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y93/L_INT_INTER_DQS_IOTOPHASER +IO_INT_INTERFACE_R_X105Y95/L_INT_INTER_DQS_IOTOPHASER +LIOI3_TBYTESRC_X0Y107/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y107/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y107/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y119/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y119/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y119/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y131/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y131/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y131/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y143/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y143/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y143/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y157/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y157/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y157/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y169/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y169/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y169/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y181/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y181/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y181/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y19/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y19/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y19/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y193/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y193/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y193/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y207/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y207/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y207/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y219/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y219/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y219/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y231/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y231/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y231/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y243/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y243/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y243/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y31/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y31/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y31/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y43/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y43/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y43/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y57/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y57/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y57/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y69/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y69/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y69/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y7/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y7/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y7/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y81/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y81/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y81/LIOI_I2GCLK_TOP1 +LIOI3_TBYTESRC_X0Y93/LIOI_I2GCLK_BOT1 +LIOI3_TBYTESRC_X0Y93/LIOI_I2GCLK_TOP0 +LIOI3_TBYTESRC_X0Y93/LIOI_I2GCLK_TOP1 +LIOI3_TBYTETERM_X0Y113/LIOI_I2GCLK_BOT1 +LIOI3_TBYTETERM_X0Y113/LIOI_I2GCLK_TOP1 +LIOI3_TBYTETERM_X0Y13/LIOI_I2GCLK_BOT1 +LIOI3_TBYTETERM_X0Y13/LIOI_I2GCLK_TOP1 +LIOI3_TBYTETERM_X0Y137/LIOI_I2GCLK_BOT1 +LIOI3_TBYTETERM_X0Y137/LIOI_I2GCLK_TOP1 +LIOI3_TBYTETERM_X0Y163/LIOI_I2GCLK_BOT1 +LIOI3_TBYTETERM_X0Y163/LIOI_I2GCLK_TOP1 +LIOI3_TBYTETERM_X0Y187/LIOI_I2GCLK_BOT1 +LIOI3_TBYTETERM_X0Y187/LIOI_I2GCLK_TOP1 +LIOI3_TBYTETERM_X0Y213/LIOI_I2GCLK_BOT1 +LIOI3_TBYTETERM_X0Y213/LIOI_I2GCLK_TOP1 +LIOI3_TBYTETERM_X0Y237/LIOI_I2GCLK_BOT1 +LIOI3_TBYTETERM_X0Y237/LIOI_I2GCLK_TOP1 +LIOI3_TBYTETERM_X0Y37/LIOI_I2GCLK_BOT1 +LIOI3_TBYTETERM_X0Y37/LIOI_I2GCLK_TOP1 +LIOI3_TBYTETERM_X0Y63/LIOI_I2GCLK_BOT1 +LIOI3_TBYTETERM_X0Y63/LIOI_I2GCLK_TOP1 +LIOI3_TBYTETERM_X0Y87/LIOI_I2GCLK_BOT1 +LIOI3_TBYTETERM_X0Y87/LIOI_I2GCLK_TOP1 +LIOI3_X0Y103/LIOI_I2GCLK_TOP1 +LIOI3_X0Y105/LIOI_I2GCLK_TOP0 +LIOI3_X0Y105/LIOI_I2GCLK_TOP1 +LIOI3_X0Y109/LIOI_I2GCLK_BOT1 +LIOI3_X0Y109/LIOI_I2GCLK_TOP0 +LIOI3_X0Y109/LIOI_I2GCLK_TOP1 +LIOI3_X0Y11/LIOI_I2GCLK_BOT1 +LIOI3_X0Y11/LIOI_I2GCLK_TOP0 +LIOI3_X0Y111/LIOI_I2GCLK_BOT1 +LIOI3_X0Y111/LIOI_I2GCLK_TOP0 +LIOI3_X0Y115/LIOI_I2GCLK_TOP0 +LIOI3_X0Y115/LIOI_I2GCLK_TOP1 +LIOI3_X0Y117/LIOI_I2GCLK_BOT1 +LIOI3_X0Y117/LIOI_I2GCLK_TOP0 +LIOI3_X0Y117/LIOI_I2GCLK_TOP1 +LIOI3_X0Y121/LIOI_I2GCLK_BOT1 +LIOI3_X0Y121/LIOI_I2GCLK_TOP0 +LIOI3_X0Y123/LIOI_I2GCLK_BOT1 +LIOI3_X0Y127/LIOI_I2GCLK_TOP1 +LIOI3_X0Y129/LIOI_I2GCLK_TOP0 +LIOI3_X0Y129/LIOI_I2GCLK_TOP1 +LIOI3_X0Y133/LIOI_I2GCLK_BOT1 +LIOI3_X0Y133/LIOI_I2GCLK_TOP0 +LIOI3_X0Y133/LIOI_I2GCLK_TOP1 +LIOI3_X0Y135/LIOI_I2GCLK_BOT1 +LIOI3_X0Y135/LIOI_I2GCLK_TOP0 +LIOI3_X0Y139/LIOI_I2GCLK_TOP0 +LIOI3_X0Y139/LIOI_I2GCLK_TOP1 +LIOI3_X0Y141/LIOI_I2GCLK_BOT1 +LIOI3_X0Y141/LIOI_I2GCLK_TOP0 +LIOI3_X0Y141/LIOI_I2GCLK_TOP1 +LIOI3_X0Y145/LIOI_I2GCLK_BOT1 +LIOI3_X0Y145/LIOI_I2GCLK_TOP0 +LIOI3_X0Y147/LIOI_I2GCLK_BOT1 +LIOI3_X0Y15/LIOI_I2GCLK_TOP0 +LIOI3_X0Y15/LIOI_I2GCLK_TOP1 +LIOI3_X0Y153/LIOI_I2GCLK_TOP1 +LIOI3_X0Y155/LIOI_I2GCLK_TOP0 +LIOI3_X0Y155/LIOI_I2GCLK_TOP1 +LIOI3_X0Y159/LIOI_I2GCLK_BOT1 +LIOI3_X0Y159/LIOI_I2GCLK_TOP0 +LIOI3_X0Y159/LIOI_I2GCLK_TOP1 +LIOI3_X0Y161/LIOI_I2GCLK_BOT1 +LIOI3_X0Y161/LIOI_I2GCLK_TOP0 +LIOI3_X0Y165/LIOI_I2GCLK_TOP0 +LIOI3_X0Y165/LIOI_I2GCLK_TOP1 +LIOI3_X0Y167/LIOI_I2GCLK_BOT1 +LIOI3_X0Y167/LIOI_I2GCLK_TOP0 +LIOI3_X0Y167/LIOI_I2GCLK_TOP1 +LIOI3_X0Y17/LIOI_I2GCLK_BOT1 +LIOI3_X0Y17/LIOI_I2GCLK_TOP0 +LIOI3_X0Y17/LIOI_I2GCLK_TOP1 +LIOI3_X0Y171/LIOI_I2GCLK_BOT1 +LIOI3_X0Y171/LIOI_I2GCLK_TOP0 +LIOI3_X0Y173/LIOI_I2GCLK_BOT1 +LIOI3_X0Y177/LIOI_I2GCLK_TOP1 +LIOI3_X0Y179/LIOI_I2GCLK_TOP0 +LIOI3_X0Y179/LIOI_I2GCLK_TOP1 +LIOI3_X0Y183/LIOI_I2GCLK_BOT1 +LIOI3_X0Y183/LIOI_I2GCLK_TOP0 +LIOI3_X0Y183/LIOI_I2GCLK_TOP1 +LIOI3_X0Y185/LIOI_I2GCLK_BOT1 +LIOI3_X0Y185/LIOI_I2GCLK_TOP0 +LIOI3_X0Y189/LIOI_I2GCLK_TOP0 +LIOI3_X0Y189/LIOI_I2GCLK_TOP1 +LIOI3_X0Y191/LIOI_I2GCLK_BOT1 +LIOI3_X0Y191/LIOI_I2GCLK_TOP0 +LIOI3_X0Y191/LIOI_I2GCLK_TOP1 +LIOI3_X0Y195/LIOI_I2GCLK_BOT1 +LIOI3_X0Y195/LIOI_I2GCLK_TOP0 +LIOI3_X0Y197/LIOI_I2GCLK_BOT1 +LIOI3_X0Y203/LIOI_I2GCLK_TOP1 +LIOI3_X0Y205/LIOI_I2GCLK_TOP0 +LIOI3_X0Y205/LIOI_I2GCLK_TOP1 +LIOI3_X0Y209/LIOI_I2GCLK_BOT1 +LIOI3_X0Y209/LIOI_I2GCLK_TOP0 +LIOI3_X0Y209/LIOI_I2GCLK_TOP1 +LIOI3_X0Y21/LIOI_I2GCLK_BOT1 +LIOI3_X0Y21/LIOI_I2GCLK_TOP0 +LIOI3_X0Y211/LIOI_I2GCLK_BOT1 +LIOI3_X0Y211/LIOI_I2GCLK_TOP0 +LIOI3_X0Y215/LIOI_I2GCLK_TOP0 +LIOI3_X0Y215/LIOI_I2GCLK_TOP1 +LIOI3_X0Y217/LIOI_I2GCLK_BOT1 +LIOI3_X0Y217/LIOI_I2GCLK_TOP0 +LIOI3_X0Y217/LIOI_I2GCLK_TOP1 +LIOI3_X0Y221/LIOI_I2GCLK_BOT1 +LIOI3_X0Y221/LIOI_I2GCLK_TOP0 +LIOI3_X0Y223/LIOI_I2GCLK_BOT1 +LIOI3_X0Y227/LIOI_I2GCLK_TOP1 +LIOI3_X0Y229/LIOI_I2GCLK_TOP0 +LIOI3_X0Y229/LIOI_I2GCLK_TOP1 +LIOI3_X0Y23/LIOI_I2GCLK_BOT1 +LIOI3_X0Y233/LIOI_I2GCLK_BOT1 +LIOI3_X0Y233/LIOI_I2GCLK_TOP0 +LIOI3_X0Y233/LIOI_I2GCLK_TOP1 +LIOI3_X0Y235/LIOI_I2GCLK_BOT1 +LIOI3_X0Y235/LIOI_I2GCLK_TOP0 +LIOI3_X0Y239/LIOI_I2GCLK_TOP0 +LIOI3_X0Y239/LIOI_I2GCLK_TOP1 +LIOI3_X0Y241/LIOI_I2GCLK_BOT1 +LIOI3_X0Y241/LIOI_I2GCLK_TOP0 +LIOI3_X0Y241/LIOI_I2GCLK_TOP1 +LIOI3_X0Y245/LIOI_I2GCLK_BOT1 +LIOI3_X0Y245/LIOI_I2GCLK_TOP0 +LIOI3_X0Y247/LIOI_I2GCLK_BOT1 +LIOI3_X0Y27/LIOI_I2GCLK_TOP1 +LIOI3_X0Y29/LIOI_I2GCLK_TOP0 +LIOI3_X0Y29/LIOI_I2GCLK_TOP1 +LIOI3_X0Y3/LIOI_I2GCLK_TOP1 +LIOI3_X0Y33/LIOI_I2GCLK_BOT1 +LIOI3_X0Y33/LIOI_I2GCLK_TOP0 +LIOI3_X0Y33/LIOI_I2GCLK_TOP1 +LIOI3_X0Y35/LIOI_I2GCLK_BOT1 +LIOI3_X0Y35/LIOI_I2GCLK_TOP0 +LIOI3_X0Y39/LIOI_I2GCLK_TOP0 +LIOI3_X0Y39/LIOI_I2GCLK_TOP1 +LIOI3_X0Y41/LIOI_I2GCLK_BOT1 +LIOI3_X0Y41/LIOI_I2GCLK_TOP0 +LIOI3_X0Y41/LIOI_I2GCLK_TOP1 +LIOI3_X0Y45/LIOI_I2GCLK_BOT1 +LIOI3_X0Y45/LIOI_I2GCLK_TOP0 +LIOI3_X0Y47/LIOI_I2GCLK_BOT1 +LIOI3_X0Y5/LIOI_I2GCLK_TOP0 +LIOI3_X0Y5/LIOI_I2GCLK_TOP1 +LIOI3_X0Y53/LIOI_I2GCLK_TOP1 +LIOI3_X0Y55/LIOI_I2GCLK_TOP0 +LIOI3_X0Y55/LIOI_I2GCLK_TOP1 +LIOI3_X0Y59/LIOI_I2GCLK_BOT1 +LIOI3_X0Y59/LIOI_I2GCLK_TOP0 +LIOI3_X0Y59/LIOI_I2GCLK_TOP1 +LIOI3_X0Y61/LIOI_I2GCLK_BOT1 +LIOI3_X0Y61/LIOI_I2GCLK_TOP0 +LIOI3_X0Y65/LIOI_I2GCLK_TOP0 +LIOI3_X0Y65/LIOI_I2GCLK_TOP1 +LIOI3_X0Y67/LIOI_I2GCLK_BOT1 +LIOI3_X0Y67/LIOI_I2GCLK_TOP0 +LIOI3_X0Y67/LIOI_I2GCLK_TOP1 +LIOI3_X0Y71/LIOI_I2GCLK_BOT1 +LIOI3_X0Y71/LIOI_I2GCLK_TOP0 +LIOI3_X0Y73/LIOI_I2GCLK_BOT1 +LIOI3_X0Y77/LIOI_I2GCLK_TOP1 +LIOI3_X0Y79/LIOI_I2GCLK_TOP0 +LIOI3_X0Y79/LIOI_I2GCLK_TOP1 +LIOI3_X0Y83/LIOI_I2GCLK_BOT1 +LIOI3_X0Y83/LIOI_I2GCLK_TOP0 +LIOI3_X0Y83/LIOI_I2GCLK_TOP1 +LIOI3_X0Y85/LIOI_I2GCLK_BOT1 +LIOI3_X0Y85/LIOI_I2GCLK_TOP0 +LIOI3_X0Y89/LIOI_I2GCLK_TOP0 +LIOI3_X0Y89/LIOI_I2GCLK_TOP1 +LIOI3_X0Y9/LIOI_I2GCLK_BOT1 +LIOI3_X0Y9/LIOI_I2GCLK_TOP0 +LIOI3_X0Y9/LIOI_I2GCLK_TOP1 +LIOI3_X0Y91/LIOI_I2GCLK_BOT1 +LIOI3_X0Y91/LIOI_I2GCLK_TOP0 +LIOI3_X0Y91/LIOI_I2GCLK_TOP1 +LIOI3_X0Y95/LIOI_I2GCLK_BOT1 +LIOI3_X0Y95/LIOI_I2GCLK_TOP0 +LIOI3_X0Y97/LIOI_I2GCLK_BOT1 +L_TERM_INT_X2Y10/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y110/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y112/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y114/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y116/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y12/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y120/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y122/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y124/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y126/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y135/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y137/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y139/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y141/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y145/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y147/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y149/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y151/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y16/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y162/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y164/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y166/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y168/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y172/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y174/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y176/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y178/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y18/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y187/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y189/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y191/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y193/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y197/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y199/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y20/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y201/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y203/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y214/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y216/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y218/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y22/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y220/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y224/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y226/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y228/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y230/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y239/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y241/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y243/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y245/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y249/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y251/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y253/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y255/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y31/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y33/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y35/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y37/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y41/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y43/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y45/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y47/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y58/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y6/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y60/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y62/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y64/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y68/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y70/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y72/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y74/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y8/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y83/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y85/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y87/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y89/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y93/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y95/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y97/L_TERM_INT_DQS_IOTOPHASER +L_TERM_INT_X2Y99/L_TERM_INT_DQS_IOTOPHASER +RIOI3_TBYTESRC_X105Y107/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y107/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y107/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y119/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y119/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y119/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y131/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y131/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y131/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y143/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y143/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y143/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y157/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y157/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y157/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y169/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y169/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y169/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y181/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y181/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y181/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y19/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y19/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y19/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y193/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y193/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y193/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y207/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y207/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y207/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y219/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y219/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y219/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y231/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y231/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y231/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y243/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y243/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y243/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y31/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y31/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y31/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y43/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y43/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y43/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y57/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y57/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y57/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y69/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y69/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y69/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y7/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y7/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y7/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y81/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y81/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y81/RIOI_I2GCLK_TOP1 +RIOI3_TBYTESRC_X105Y93/RIOI_I2GCLK_BOT1 +RIOI3_TBYTESRC_X105Y93/RIOI_I2GCLK_TOP0 +RIOI3_TBYTESRC_X105Y93/RIOI_I2GCLK_TOP1 +RIOI3_TBYTETERM_X105Y113/RIOI_I2GCLK_BOT1 +RIOI3_TBYTETERM_X105Y113/RIOI_I2GCLK_TOP1 +RIOI3_TBYTETERM_X105Y13/RIOI_I2GCLK_BOT1 +RIOI3_TBYTETERM_X105Y13/RIOI_I2GCLK_TOP1 +RIOI3_TBYTETERM_X105Y137/RIOI_I2GCLK_BOT1 +RIOI3_TBYTETERM_X105Y137/RIOI_I2GCLK_TOP1 +RIOI3_TBYTETERM_X105Y163/RIOI_I2GCLK_BOT1 +RIOI3_TBYTETERM_X105Y163/RIOI_I2GCLK_TOP1 +RIOI3_TBYTETERM_X105Y187/RIOI_I2GCLK_BOT1 +RIOI3_TBYTETERM_X105Y187/RIOI_I2GCLK_TOP1 +RIOI3_TBYTETERM_X105Y213/RIOI_I2GCLK_BOT1 +RIOI3_TBYTETERM_X105Y213/RIOI_I2GCLK_TOP1 +RIOI3_TBYTETERM_X105Y237/RIOI_I2GCLK_BOT1 +RIOI3_TBYTETERM_X105Y237/RIOI_I2GCLK_TOP1 +RIOI3_TBYTETERM_X105Y37/RIOI_I2GCLK_BOT1 +RIOI3_TBYTETERM_X105Y37/RIOI_I2GCLK_TOP1 +RIOI3_TBYTETERM_X105Y63/RIOI_I2GCLK_BOT1 +RIOI3_TBYTETERM_X105Y63/RIOI_I2GCLK_TOP1 +RIOI3_TBYTETERM_X105Y87/RIOI_I2GCLK_BOT1 +RIOI3_TBYTETERM_X105Y87/RIOI_I2GCLK_TOP1 +RIOI3_X105Y103/RIOI_I2GCLK_TOP1 +RIOI3_X105Y105/RIOI_I2GCLK_TOP0 +RIOI3_X105Y105/RIOI_I2GCLK_TOP1 +RIOI3_X105Y109/RIOI_I2GCLK_BOT1 +RIOI3_X105Y109/RIOI_I2GCLK_TOP0 +RIOI3_X105Y109/RIOI_I2GCLK_TOP1 +RIOI3_X105Y11/RIOI_I2GCLK_BOT1 +RIOI3_X105Y11/RIOI_I2GCLK_TOP0 +RIOI3_X105Y111/RIOI_I2GCLK_BOT1 +RIOI3_X105Y111/RIOI_I2GCLK_TOP0 +RIOI3_X105Y115/RIOI_I2GCLK_TOP0 +RIOI3_X105Y115/RIOI_I2GCLK_TOP1 +RIOI3_X105Y117/RIOI_I2GCLK_BOT1 +RIOI3_X105Y117/RIOI_I2GCLK_TOP0 +RIOI3_X105Y117/RIOI_I2GCLK_TOP1 +RIOI3_X105Y121/RIOI_I2GCLK_BOT1 +RIOI3_X105Y121/RIOI_I2GCLK_TOP0 +RIOI3_X105Y123/RIOI_I2GCLK_BOT1 +RIOI3_X105Y127/RIOI_I2GCLK_TOP1 +RIOI3_X105Y129/RIOI_I2GCLK_TOP0 +RIOI3_X105Y129/RIOI_I2GCLK_TOP1 +RIOI3_X105Y133/RIOI_I2GCLK_BOT1 +RIOI3_X105Y133/RIOI_I2GCLK_TOP0 +RIOI3_X105Y133/RIOI_I2GCLK_TOP1 +RIOI3_X105Y135/RIOI_I2GCLK_BOT1 +RIOI3_X105Y135/RIOI_I2GCLK_TOP0 +RIOI3_X105Y139/RIOI_I2GCLK_TOP0 +RIOI3_X105Y139/RIOI_I2GCLK_TOP1 +RIOI3_X105Y141/RIOI_I2GCLK_BOT1 +RIOI3_X105Y141/RIOI_I2GCLK_TOP0 +RIOI3_X105Y141/RIOI_I2GCLK_TOP1 +RIOI3_X105Y145/RIOI_I2GCLK_BOT1 +RIOI3_X105Y145/RIOI_I2GCLK_TOP0 +RIOI3_X105Y147/RIOI_I2GCLK_BOT1 +RIOI3_X105Y15/RIOI_I2GCLK_TOP0 +RIOI3_X105Y15/RIOI_I2GCLK_TOP1 +RIOI3_X105Y153/RIOI_I2GCLK_TOP1 +RIOI3_X105Y155/RIOI_I2GCLK_TOP0 +RIOI3_X105Y155/RIOI_I2GCLK_TOP1 +RIOI3_X105Y159/RIOI_I2GCLK_BOT1 +RIOI3_X105Y159/RIOI_I2GCLK_TOP0 +RIOI3_X105Y159/RIOI_I2GCLK_TOP1 +RIOI3_X105Y161/RIOI_I2GCLK_BOT1 +RIOI3_X105Y161/RIOI_I2GCLK_TOP0 +RIOI3_X105Y165/RIOI_I2GCLK_TOP0 +RIOI3_X105Y165/RIOI_I2GCLK_TOP1 +RIOI3_X105Y167/RIOI_I2GCLK_BOT1 +RIOI3_X105Y167/RIOI_I2GCLK_TOP0 +RIOI3_X105Y167/RIOI_I2GCLK_TOP1 +RIOI3_X105Y17/RIOI_I2GCLK_BOT1 +RIOI3_X105Y17/RIOI_I2GCLK_TOP0 +RIOI3_X105Y17/RIOI_I2GCLK_TOP1 +RIOI3_X105Y171/RIOI_I2GCLK_BOT1 +RIOI3_X105Y171/RIOI_I2GCLK_TOP0 +RIOI3_X105Y173/RIOI_I2GCLK_BOT1 +RIOI3_X105Y177/RIOI_I2GCLK_TOP1 +RIOI3_X105Y179/RIOI_I2GCLK_TOP0 +RIOI3_X105Y179/RIOI_I2GCLK_TOP1 +RIOI3_X105Y183/RIOI_I2GCLK_BOT1 +RIOI3_X105Y183/RIOI_I2GCLK_TOP0 +RIOI3_X105Y183/RIOI_I2GCLK_TOP1 +RIOI3_X105Y185/RIOI_I2GCLK_BOT1 +RIOI3_X105Y185/RIOI_I2GCLK_TOP0 +RIOI3_X105Y189/RIOI_I2GCLK_TOP0 +RIOI3_X105Y189/RIOI_I2GCLK_TOP1 +RIOI3_X105Y191/RIOI_I2GCLK_BOT1 +RIOI3_X105Y191/RIOI_I2GCLK_TOP0 +RIOI3_X105Y191/RIOI_I2GCLK_TOP1 +RIOI3_X105Y195/RIOI_I2GCLK_BOT1 +RIOI3_X105Y195/RIOI_I2GCLK_TOP0 +RIOI3_X105Y197/RIOI_I2GCLK_BOT1 +RIOI3_X105Y203/RIOI_I2GCLK_TOP1 +RIOI3_X105Y205/RIOI_I2GCLK_TOP0 +RIOI3_X105Y205/RIOI_I2GCLK_TOP1 +RIOI3_X105Y209/RIOI_I2GCLK_BOT1 +RIOI3_X105Y209/RIOI_I2GCLK_TOP0 +RIOI3_X105Y209/RIOI_I2GCLK_TOP1 +RIOI3_X105Y21/RIOI_I2GCLK_BOT1 +RIOI3_X105Y21/RIOI_I2GCLK_TOP0 +RIOI3_X105Y211/RIOI_I2GCLK_BOT1 +RIOI3_X105Y211/RIOI_I2GCLK_TOP0 +RIOI3_X105Y215/RIOI_I2GCLK_TOP0 +RIOI3_X105Y215/RIOI_I2GCLK_TOP1 +RIOI3_X105Y217/RIOI_I2GCLK_BOT1 +RIOI3_X105Y217/RIOI_I2GCLK_TOP0 +RIOI3_X105Y217/RIOI_I2GCLK_TOP1 +RIOI3_X105Y221/RIOI_I2GCLK_BOT1 +RIOI3_X105Y221/RIOI_I2GCLK_TOP0 +RIOI3_X105Y223/RIOI_I2GCLK_BOT1 +RIOI3_X105Y227/RIOI_I2GCLK_TOP1 +RIOI3_X105Y229/RIOI_I2GCLK_TOP0 +RIOI3_X105Y229/RIOI_I2GCLK_TOP1 +RIOI3_X105Y23/RIOI_I2GCLK_BOT1 +RIOI3_X105Y233/RIOI_I2GCLK_BOT1 +RIOI3_X105Y233/RIOI_I2GCLK_TOP0 +RIOI3_X105Y233/RIOI_I2GCLK_TOP1 +RIOI3_X105Y235/RIOI_I2GCLK_BOT1 +RIOI3_X105Y235/RIOI_I2GCLK_TOP0 +RIOI3_X105Y239/RIOI_I2GCLK_TOP0 +RIOI3_X105Y239/RIOI_I2GCLK_TOP1 +RIOI3_X105Y241/RIOI_I2GCLK_BOT1 +RIOI3_X105Y241/RIOI_I2GCLK_TOP0 +RIOI3_X105Y241/RIOI_I2GCLK_TOP1 +RIOI3_X105Y245/RIOI_I2GCLK_BOT1 +RIOI3_X105Y245/RIOI_I2GCLK_TOP0 +RIOI3_X105Y247/RIOI_I2GCLK_BOT1 +RIOI3_X105Y27/RIOI_I2GCLK_TOP1 +RIOI3_X105Y29/RIOI_I2GCLK_TOP0 +RIOI3_X105Y29/RIOI_I2GCLK_TOP1 +RIOI3_X105Y3/RIOI_I2GCLK_TOP1 +RIOI3_X105Y33/RIOI_I2GCLK_BOT1 +RIOI3_X105Y33/RIOI_I2GCLK_TOP0 +RIOI3_X105Y33/RIOI_I2GCLK_TOP1 +RIOI3_X105Y35/RIOI_I2GCLK_BOT1 +RIOI3_X105Y35/RIOI_I2GCLK_TOP0 +RIOI3_X105Y39/RIOI_I2GCLK_TOP0 +RIOI3_X105Y39/RIOI_I2GCLK_TOP1 +RIOI3_X105Y41/RIOI_I2GCLK_BOT1 +RIOI3_X105Y41/RIOI_I2GCLK_TOP0 +RIOI3_X105Y41/RIOI_I2GCLK_TOP1 +RIOI3_X105Y45/RIOI_I2GCLK_BOT1 +RIOI3_X105Y45/RIOI_I2GCLK_TOP0 +RIOI3_X105Y47/RIOI_I2GCLK_BOT1 +RIOI3_X105Y5/RIOI_I2GCLK_TOP0 +RIOI3_X105Y5/RIOI_I2GCLK_TOP1 +RIOI3_X105Y53/RIOI_I2GCLK_TOP1 +RIOI3_X105Y55/RIOI_I2GCLK_TOP0 +RIOI3_X105Y55/RIOI_I2GCLK_TOP1 +RIOI3_X105Y59/RIOI_I2GCLK_BOT1 +RIOI3_X105Y59/RIOI_I2GCLK_TOP0 +RIOI3_X105Y59/RIOI_I2GCLK_TOP1 +RIOI3_X105Y61/RIOI_I2GCLK_BOT1 +RIOI3_X105Y61/RIOI_I2GCLK_TOP0 +RIOI3_X105Y65/RIOI_I2GCLK_TOP0 +RIOI3_X105Y65/RIOI_I2GCLK_TOP1 +RIOI3_X105Y67/RIOI_I2GCLK_BOT1 +RIOI3_X105Y67/RIOI_I2GCLK_TOP0 +RIOI3_X105Y67/RIOI_I2GCLK_TOP1 +RIOI3_X105Y71/RIOI_I2GCLK_BOT1 +RIOI3_X105Y71/RIOI_I2GCLK_TOP0 +RIOI3_X105Y73/RIOI_I2GCLK_BOT1 +RIOI3_X105Y77/RIOI_I2GCLK_TOP1 +RIOI3_X105Y79/RIOI_I2GCLK_TOP0 +RIOI3_X105Y79/RIOI_I2GCLK_TOP1 +RIOI3_X105Y83/RIOI_I2GCLK_BOT1 +RIOI3_X105Y83/RIOI_I2GCLK_TOP0 +RIOI3_X105Y83/RIOI_I2GCLK_TOP1 +RIOI3_X105Y85/RIOI_I2GCLK_BOT1 +RIOI3_X105Y85/RIOI_I2GCLK_TOP0 +RIOI3_X105Y89/RIOI_I2GCLK_TOP0 +RIOI3_X105Y89/RIOI_I2GCLK_TOP1 +RIOI3_X105Y9/RIOI_I2GCLK_BOT1 +RIOI3_X105Y9/RIOI_I2GCLK_TOP0 +RIOI3_X105Y9/RIOI_I2GCLK_TOP1 +RIOI3_X105Y91/RIOI_I2GCLK_BOT1 +RIOI3_X105Y91/RIOI_I2GCLK_TOP0 +RIOI3_X105Y91/RIOI_I2GCLK_TOP1 +RIOI3_X105Y95/RIOI_I2GCLK_BOT1 +RIOI3_X105Y95/RIOI_I2GCLK_TOP0 +RIOI3_X105Y97/RIOI_I2GCLK_BOT1 +R_TERM_INT_X262Y10/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y110/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y112/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y114/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y116/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y12/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y120/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y122/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y124/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y126/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y135/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y137/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y139/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y141/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y145/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y147/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y149/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y151/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y16/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y162/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y164/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y166/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y168/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y172/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y174/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y176/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y178/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y18/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y187/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y189/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y191/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y193/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y197/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y199/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y20/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y201/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y203/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y214/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y216/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y218/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y22/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y220/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y224/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y226/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y228/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y230/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y239/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y241/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y243/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y245/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y249/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y251/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y253/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y255/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y31/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y33/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y35/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y37/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y41/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y43/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y45/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y47/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y58/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y6/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y60/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y62/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y64/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y68/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y70/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y72/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y74/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y8/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y83/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y85/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y87/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y89/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y93/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y95/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y97/L_TERM_INT_DQS_IOTOPHASER +R_TERM_INT_X262Y99/L_TERM_INT_DQS_IOTOPHASER diff --git a/fuzzers/074-dump_all/artix7_ignored_wires.txt b/fuzzers/074-dump_all/ignored_wires/artix7/xc7a50tfgg484-1_ignored_wires.txt similarity index 100% rename from fuzzers/074-dump_all/artix7_ignored_wires.txt rename to fuzzers/074-dump_all/ignored_wires/artix7/xc7a50tfgg484-1_ignored_wires.txt diff --git a/fuzzers/074-dump_all/kintex7_ignored_wires.txt b/fuzzers/074-dump_all/ignored_wires/kintex7/xc7k70tfbg676-2_ignored_wires.txt similarity index 100% rename from fuzzers/074-dump_all/kintex7_ignored_wires.txt rename to fuzzers/074-dump_all/ignored_wires/kintex7/xc7k70tfbg676-2_ignored_wires.txt diff --git a/fuzzers/074-dump_all/zynq7_ignored_wires.txt b/fuzzers/074-dump_all/ignored_wires/zynq7/xc7z010clg400-1_ignored_wires.txt similarity index 100% rename from fuzzers/074-dump_all/zynq7_ignored_wires.txt rename to fuzzers/074-dump_all/ignored_wires/zynq7/xc7z010clg400-1_ignored_wires.txt From 5db213293c19f564c6da7e62bd9a2ea67662bc6e Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Mon, 20 Jan 2020 11:39:02 +0100 Subject: [PATCH 25/35] 072-ordered_wires: better handling of Lock Signed-off-by: Alessandro Comodi --- fuzzers/072-ordered_wires/run_fuzzer.py | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/fuzzers/072-ordered_wires/run_fuzzer.py b/fuzzers/072-ordered_wires/run_fuzzer.py index 98859c49..d8abbf7b 100644 --- a/fuzzers/072-ordered_wires/run_fuzzer.py +++ b/fuzzers/072-ordered_wires/run_fuzzer.py @@ -10,10 +10,12 @@ import argparse # Can be used to redirect vivado tons of output # stdout=DEVNULL in subprocess.check_call -MP_LOCK = Lock() - -# Worker function called from threads +# Worker function called from threads. +# Once the worker completes the job, the temporary files +# get merged with the final outputs in a thread-safe way +# and deleted to save disk usage. +# To do so, a global Lock is provided at the Pool initialization. def start_pips(argList): blockID, start, stop, total = argList print("Running instance :" + str(blockID) + " / " + str(total)) @@ -26,7 +28,7 @@ def start_pips(argList): downhill_wires = "wires/downhill_wires_{}.txt".format(blockID) # Locking to write on final file and remove the temporary one - MP_LOCK.acquire() + Lock.acquire() with open("uphill_wires.txt", "a") as wfd: f = uphill_wires with open(f, "r") as fd: @@ -36,7 +38,7 @@ def start_pips(argList): f = downhill_wires with open(f, "r") as fd: shutil.copyfileobj(fd, wfd) - MP_LOCK.release() + Lock.release() os.remove(uphill_wires) os.remove(downhill_wires) @@ -52,6 +54,11 @@ def get_nb_pips(): return int(countfile.readline()) +def pool_init(lock): + global Lock + Lock = lock + + def run_pool(itemcount, nbBlocks, blocksize, nbParBlock, workFunc): # We handle the case of not integer multiple of pips intitemcount = blocksize * nbBlocks @@ -78,9 +85,12 @@ def run_pool(itemcount, nbBlocks, blocksize, nbParBlock, workFunc): startI = chain(startI, [intitemcount]) stopI = chain(stopI, [itemcount]) + mpLock = Lock() + argList = zip(blockId, startI, stopI, totalBlock) - with Pool(processes=nbParBlock) as pool: + with Pool(processes=nbParBlock, initializer=pool_init, + initargs=(mpLock, )) as pool: pool.map(workFunc, argList) return nbBlocks From 4849f4972420a62522915ff0a7c7a77892cfa2a6 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Mon, 20 Jan 2020 12:12:05 +0100 Subject: [PATCH 26/35] 005-tilegrid: added comment on EXCLUDE_ROI env variable Signed-off-by: Alessandro Comodi --- fuzzers/005-tilegrid/README.md | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/fuzzers/005-tilegrid/README.md b/fuzzers/005-tilegrid/README.md index d372625a..b6575eba 100644 --- a/fuzzers/005-tilegrid/README.md +++ b/fuzzers/005-tilegrid/README.md @@ -19,6 +19,21 @@ Finally, generate.py calculates the segment word offsets based on known segment This environment variable must be set with a valid ROI. See database for example values +### XRAY_EXCLUDE_ROI_TILEGRID +This environment variable must be set in case the part selected does not allow some tiles to be +locked. + +Error example (when using the artix 200T part): +`ERROR: [Place 30-25] Component carry4_SLICE_X82Y249 has been locked to a prohibited site SLICE_X82Y249.` + +To avoid this error, the `XRAY_EXCLUDE_ROI_TILEGRID` defines an ROI that is not taken into account +when building the tilegrid, therefore excluding the problematic un-lockable sites. + +As the resulting output file, `tilegrid.json`, is going to be checked against the one produced in +the `074-dump_all` fuzzer, also the latter one needs to produce a reduced tilegrid, with the excluded +tiles specified with the environment variable. + + ### XRAY_ROI_FRAMES This can be set to a specific value to speed up processing and reduce disk space If you don't know where your ROI is, just set to to include all values (0x00000000:0xfffffff) From dfb0717f2cc7102ae600a6033fb5e80b2bd49dfb Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Mon, 20 Jan 2020 16:39:13 +0100 Subject: [PATCH 27/35] fix makefile part_only dependencies Signed-off-by: Alessandro Comodi --- fuzzers/Makefile | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/fuzzers/Makefile b/fuzzers/Makefile index f4bc20d5..fc74633a 100644 --- a/fuzzers/Makefile +++ b/fuzzers/Makefile @@ -130,19 +130,24 @@ quick: # Part only targets # ----------------- -part_only_yaml: ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.yaml ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.json - +$(MAKE) -C 001-part-yaml run +${XRAY_FAMILY_DIR}/${XRAY_PART}/part.yaml: + $(MAKE) -C 001-part-yaml run +${XRAY_FAMILY_DIR}/${XRAY_PART}/package_pins.csv: + $(MAKE) -C 075-pins run + +${XRAY_FAMILY_DIR}/${XRAY_PART}/tilegrid.json: + $(MAKE) -C 005-tilegrid run + +${XRAY_FAMILY_DIR}/${XRAY_PART}/tileconn.json: + $(MAKE) -C 072-ordered_wires run + $(MAKE) -C 073-get_counts run + $(MAKE) -C 074-dump_all run + +part_only_yaml: ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.yaml part_only_tilegrid: ${XRAY_FAMILY_DIR}/${XRAY_PART}/tilegrid.json - +$(MAKE) -C 005-tilegrid run - part_only_tileconn: ${XRAY_FAMILY_DIR}/${XRAY_PART}/tileconn.json - +$(MAKE) -C 072-ordered_wires run - +$(MAKE) -C 073-get_counts run - +$(MAKE) -C 074-dump_all run - part_only_pins: ${XRAY_FAMILY_DIR}/${XRAY_PART}/package_pins.csv - +$(MAKE) -C 075-pins run # part_only runs the fuzzers required to support additional parts part_only: From c4faa02c51fc866ded0b2612de95a715a45bc8c6 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Tue, 21 Jan 2020 11:13:41 +0100 Subject: [PATCH 28/35] fasm2frames: imported correctly util Signed-off-by: Alessandro Comodi --- utils/fasm2frames.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/utils/fasm2frames.py b/utils/fasm2frames.py index 8260a95e..c9e6c5f0 100755 --- a/utils/fasm2frames.py +++ b/utils/fasm2frames.py @@ -11,7 +11,7 @@ import csv from collections import defaultdict -from prjxray import fasm_assembler +from prjxray import fasm_assembler, util from prjxray.db import Database from prjxray.roi import Roi From 4a0ca410773a0fa57b292f415134aea0bf73fcc0 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Tue, 21 Jan 2020 16:21:15 +0100 Subject: [PATCH 29/35] roi_only: copy tilegrid and tileconn from equivalent part 005-tilegrid fuzzer cannot run for some parts as some of the IOBs are not available, therefore the fuzzer exits with errors. Instead, the tilegrid is copied from the specified equivalent part. Signed-off-by: Alessandro Comodi --- fuzzers/Makefile | 5 +++-- minitests/roi_harness/arty-common.sh | 1 + minitests/roi_harness/basys3-common.sh | 1 + minitests/roi_harness/zybo-common.sh | 1 + 4 files changed, 6 insertions(+), 2 deletions(-) diff --git a/fuzzers/Makefile b/fuzzers/Makefile index fc74633a..addf2671 100644 --- a/fuzzers/Makefile +++ b/fuzzers/Makefile @@ -169,9 +169,10 @@ roi_only: mkdir -p ${XRAY_FAMILY_DIR}/${XRAY_PART} # Generate YAML +$(MAKE) part_only_yaml - # Generate Tile grid - +$(MAKE) part_only_tilegrid # Generate package pins +$(MAKE) part_only_pins + # Copy tilegrid and tileconn + cp ${XRAY_FAMILY_DIR}/${XRAY_EQUIV_PART}/tilegrid.json ${XRAY_FAMILY_DIR}/${XRAY_PART}/tilegrid.json + cp ${XRAY_FAMILY_DIR}/${XRAY_EQUIV_PART}/tileconn.json ${XRAY_FAMILY_DIR}/${XRAY_PART}/tileconn.json .PHONY: all clean clean_fuzzers clean_logs quick part_only roi_only diff --git a/minitests/roi_harness/arty-common.sh b/minitests/roi_harness/arty-common.sh index 2a3145c6..9da02714 100644 --- a/minitests/roi_harness/arty-common.sh +++ b/minitests/roi_harness/arty-common.sh @@ -1,5 +1,6 @@ # XC7A35TICSG324-1L export XRAY_PART=xc7a35tcsg324-1 +export XRAY_EQUIV_PART=xc7a50tfgg484-1 if [ -z "$XRAY_PINCFG" ]; then echo "XRAY_PINCFG not set" diff --git a/minitests/roi_harness/basys3-common.sh b/minitests/roi_harness/basys3-common.sh index a76c8653..8047f822 100644 --- a/minitests/roi_harness/basys3-common.sh +++ b/minitests/roi_harness/basys3-common.sh @@ -1,5 +1,6 @@ # XC7A35T-1CPG236C export XRAY_PART=xc7a35tcpg236-1 +export XRAY_EQUIV_PART=xc7a50tfgg484-1 if [ -z "$XRAY_PINCFG" ]; then echo "XRAY_PINCFG not set" return 1 diff --git a/minitests/roi_harness/zybo-common.sh b/minitests/roi_harness/zybo-common.sh index 1aa60baf..408eed54 100644 --- a/minitests/roi_harness/zybo-common.sh +++ b/minitests/roi_harness/zybo-common.sh @@ -1,5 +1,6 @@ # XC7010-1CLG400C export XRAY_PART=xc7z010clg400-1 +export XRAY_EQUIV_PART=xc7z010clg400-1 if [ -z "$XRAY_PINCFG" ]; then echo "XRAY_PINCFG not set" From 117f3e51b2fedf2af2c9c98b68b787876c9ec122 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Tue, 21 Jan 2020 16:31:06 +0100 Subject: [PATCH 30/35] revert 074 and 072 to use previous Makefile configuration Signed-off-by: Alessandro Comodi --- fuzzers/072-ordered_wires/Makefile | 4 ++-- fuzzers/074-dump_all/Makefile | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/fuzzers/072-ordered_wires/Makefile b/fuzzers/072-ordered_wires/Makefile index 48439017..851bebc8 100644 --- a/fuzzers/072-ordered_wires/Makefile +++ b/fuzzers/072-ordered_wires/Makefile @@ -2,8 +2,8 @@ N := 1 SPECIMENS := $(addprefix build/specimen_,$(shell seq -f '%03.0f' $(N))) SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS)) -MAX_VIVADO_PROCESS ?= 8 -MAX_PIPS_INSTANCE ?= 680000 +MAX_VIVADO_PROCESS ?= 4 +MAX_PIPS_INSTANCE ?= 340000 database: $(SPECIMENS_OK) true diff --git a/fuzzers/074-dump_all/Makefile b/fuzzers/074-dump_all/Makefile index 053286fc..f9ba3ed9 100644 --- a/fuzzers/074-dump_all/Makefile +++ b/fuzzers/074-dump_all/Makefile @@ -2,9 +2,9 @@ N := 1 SPECIMENS := $(addprefix build/specimen_,$(shell seq -f '%03.0f' $(N))) SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS)) -MAX_VIVADO_PROCESS ?= 8 -MAX_TILES_INSTANCE ?= 600 -MAX_NODES_INSTANCE ?= 60000 +MAX_VIVADO_PROCESS ?= 4 +MAX_TILES_INSTANCE ?= 300 +MAX_NODES_INSTANCE ?= 30000 database: $(SPECIMENS_OK) true From 5ae155fd9c754d6b343926339002590c6bd135e6 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Wed, 22 Jan 2020 12:20:22 +0100 Subject: [PATCH 31/35] copy tileconn.json in the correct diretory Signed-off-by: Alessandro Comodi --- fuzzers/074-dump_all/Makefile | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/fuzzers/074-dump_all/Makefile b/fuzzers/074-dump_all/Makefile index f9ba3ed9..c377e69d 100644 --- a/fuzzers/074-dump_all/Makefile +++ b/fuzzers/074-dump_all/Makefile @@ -10,10 +10,10 @@ database: $(SPECIMENS_OK) true pushdb: - cp build/output/tile_type_*.json ${XRAY_DATABASE_DIR}/$(XRAY_DATABASE)/ - rm ${XRAY_DATABASE_DIR}/$(XRAY_DATABASE)/tile_type_*_site_type_*.json - cp build/output/site_type_*.json ${XRAY_DATABASE_DIR}/$(XRAY_DATABASE)/ - cp build/output/tileconn.json ${XRAY_DATABASE_DIR}/$(XRAY_DATABASE)/ + cp build/output/tile_type_*.json ${XRAY_FAMILY_DIR}/ + rm ${XRAY_FAMILY_DIR}/tile_type_*_site_type_*.json + cp build/output/site_type_*.json ${XRAY_FAMILY_DIR}/ + cp build/output/tileconn.json ${XRAY_FAMILY_DIR}/$(XRAY_PART)/ $(SPECIMENS_OK): bash generate.sh $(subst /OK,,$@) -p=$(MAX_VIVADO_PROCESS) -t=$(MAX_TILES_INSTANCE) -n=$(MAX_NODES_INSTANCE) From 0b623982e543dba8d3f520789c154fd411753397 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Wed, 22 Jan 2020 15:49:37 +0100 Subject: [PATCH 32/35] divided harness and extra parts creation There is an issue with the roi_harness creation, for which the multi-process make does not correctly works for roi_harness target Signed-off-by: Alessandro Comodi --- .github/kokoro/db-full.sh | 3 ++- Makefile | 19 +++++++++++-------- fuzzers/Makefile | 4 ++-- 3 files changed, 15 insertions(+), 11 deletions(-) diff --git a/.github/kokoro/db-full.sh b/.github/kokoro/db-full.sh index 5fc5030d..c4113901 100755 --- a/.github/kokoro/db-full.sh +++ b/.github/kokoro/db-full.sh @@ -91,7 +91,8 @@ echo "----------------------------------------" # Generate extra files (additional part yaml's, harness, etc). set +e # Attempt to generate extras here, but don't check until after diff reporting. -make db-extras-${XRAY_SETTINGS} +make db-extras-${XRAY_SETTINGS}-harness +make db-extras-${XRAY_SETTINGS}-parts -j $CORES EXTRAS_RET=$? set -e # Format the database diff --git a/Makefile b/Makefile index f86c8378..8697e820 100644 --- a/Makefile +++ b/Makefile @@ -161,7 +161,7 @@ $(foreach PART,$(XRAY_PARTS),$(eval $(call multiple-parts,$(PART)))) db-extras-artix7-parts: $(addprefix db-part-only-,$(ARTIX_PARTS)) -db-extras-artix7: +db-extras-artix7-harness: +source minitests/roi_harness/basys3-swbut.sh && $(MAKE) -C fuzzers roi_only +source minitests/roi_harness/arty-uart.sh && $(MAKE) -C fuzzers roi_only +source minitests/roi_harness/basys3-swbut.sh && \ @@ -170,7 +170,7 @@ db-extras-artix7: +source minitests/roi_harness/basys3-swbut.sh && \ $(MAKE) -C minitests/roi_harness \ XRAY_ROIV=../roi_base_div2.v \ - HARNESS_DIR=$(XRAY_DATABASE_DIR)/artix7/harness/basys3/swbut_50 run copy + HARNESS_DIR=$(XRAY_DATABASE_DIR)/artix7/harness/basys3/swbut_50 copy +source minitests/roi_harness/arty-uart.sh && \ $(MAKE) -C minitests/roi_harness \ HARNESS_DIR=$(XRAY_DATABASE_DIR)/artix7/harness/arty-a7/uart run copy @@ -180,17 +180,20 @@ db-extras-artix7: +source minitests/roi_harness/arty-swbut.sh && \ $(MAKE) -C minitests/roi_harness \ HARNESS_DIR=$(XRAY_DATABASE_DIR)/artix7/harness/arty-a7/swbut run copy - # Generate multiple part support - +$(MAKE) db-extras-artix7-parts -db-extras-kintex7: +db-extras-kintex7-parts: @true -db-extras-zynq7: - +source minitests/roi_harness/zybo-swbut.sh && $(MAKE) -C fuzzers roi_only +db-extras-kintex7-harness: + @true + +db-extras-zynq7-parts: + @true + +db-extras-zynq7-harness: +source minitests/roi_harness/zybo-swbut.sh && \ $(MAKE) -C minitests/roi_harness \ - HARNESS_DIR=$(XRAY_DATABASE_DIR)/zynq7/harness/zybo/swbut run + HARNESS_DIR=$(XRAY_DATABASE_DIR)/zynq7/harness/zybo/swbut run copy db-check: @true diff --git a/fuzzers/Makefile b/fuzzers/Makefile index addf2671..b58659b9 100644 --- a/fuzzers/Makefile +++ b/fuzzers/Makefile @@ -130,7 +130,7 @@ quick: # Part only targets # ----------------- -${XRAY_FAMILY_DIR}/${XRAY_PART}/part.yaml: +$(addprefix ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.,yaml json): $(MAKE) -C 001-part-yaml run ${XRAY_FAMILY_DIR}/${XRAY_PART}/package_pins.csv: @@ -144,7 +144,7 @@ ${XRAY_FAMILY_DIR}/${XRAY_PART}/tileconn.json: $(MAKE) -C 073-get_counts run $(MAKE) -C 074-dump_all run -part_only_yaml: ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.yaml +part_only_yaml: $(addprefix ${XRAY_FAMILY_DIR}/${XRAY_PART}/part.,yaml json) part_only_tilegrid: ${XRAY_FAMILY_DIR}/${XRAY_PART}/tilegrid.json part_only_tileconn: ${XRAY_FAMILY_DIR}/${XRAY_PART}/tileconn.json part_only_pins: ${XRAY_FAMILY_DIR}/${XRAY_PART}/package_pins.csv From 8d971ea15ea7664218e9c0be6657b2f53b064dfb Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Thu, 23 Jan 2020 11:54:10 +0100 Subject: [PATCH 33/35] attempt to move extra-parts generation after diff Signed-off-by: Alessandro Comodi --- .github/kokoro/db-full.sh | 26 ++++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/.github/kokoro/db-full.sh b/.github/kokoro/db-full.sh index c4113901..0ad87f25 100755 --- a/.github/kokoro/db-full.sh +++ b/.github/kokoro/db-full.sh @@ -86,14 +86,11 @@ echo "----------------------------------------" ) echo "----------------------------------------" -# Check the database -#make checkdb-${XRAY_SETTINGS} || true # Generate extra files (additional part yaml's, harness, etc). set +e -# Attempt to generate extras here, but don't check until after diff reporting. +# Attempt to generate extra harnesses here, but don't check until after diff reporting. make db-extras-${XRAY_SETTINGS}-harness -make db-extras-${XRAY_SETTINGS}-parts -j $CORES -EXTRAS_RET=$? +EXTRAS_HARNESS_RET=$? set -e # Format the database make db-format-${XRAY_SETTINGS} @@ -186,11 +183,24 @@ echo "----------------------------------------" ) echo "----------------------------------------" +# Calculating extra parts here, to avoid the huge diff issue by the introduction +# of new parts +set +e +make db-extras-${XRAY_SETTINGS}-parts -j $CORES +EXTRAS_PARTS_RET=$? +set -e + # Check the database and fail if it is broken. make db-check-${XRAY_SETTINGS} -if [[ $EXTRAS_RET != 0 ]] ; then - echo "A failure occurred during extras generation." - exit $EXTRAS_RET + +if [[ $EXTRAS_HARNESS_RET != 0 ]] ; then + echo "A failure occurred during extra harnesses generation." + exit $EXTRAS_HARNESS_RET +fi + +if [[ $EXTRAS_PARTS_RET != 0 ]] ; then + echo "A failure occurred during extra parts generation." + exit $EXTRAS_PARTS_RET fi # If we get here, then all the fuzzers completed fine. Hence we are From e03f635ed8b28cb9c20e13450f34f1268ac7cc90 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Fri, 24 Jan 2020 10:22:04 +0100 Subject: [PATCH 34/35] remove artix50t.sh settings as it is not needed anymore Signed-off-by: Alessandro Comodi --- settings/artix50t.sh | 21 --------------------- 1 file changed, 21 deletions(-) delete mode 100644 settings/artix50t.sh diff --git a/settings/artix50t.sh b/settings/artix50t.sh deleted file mode 100644 index 852f0299..00000000 --- a/settings/artix50t.sh +++ /dev/null @@ -1,21 +0,0 @@ -export XRAY_DATABASE="artix7" -export XRAY_PART="xc7a50tfgg484-1" -export XRAY_ROI_FRAMES="0x00000000:0xffffffff" - -# All CLB's in part, all BRAM's in part, all DSP's in part. -# tcl queries IOB => don't bother adding -export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X65Y99 SLICE_X0Y100:SLICE_X57Y149 RAMB18_X0Y0:RAMB18_X1Y59 RAMB36_X0Y0:RAMB36_X1Y29 RAMB18_X2Y0:RAMB18_X2Y39 RAMB36_X2Y0:RAMB36_X2Y19 DSP48_X0Y0:DSP48_X1Y59" - -export XRAY_EXCLUDE_ROI_TILEGRID="" - -export XRAY_IOI3_TILES="LIOI3_X0Y9 RIOI3_X43Y9" - -export XRAY_PIN_00="E22" -export XRAY_PIN_01="D22" -export XRAY_PIN_02="E21" -export XRAY_PIN_03="D21" -export XRAY_PIN_04="G21" -export XRAY_PIN_05="G22" -export XRAY_PIN_06="F21" - -source $(dirname ${BASH_SOURCE[0]})/../utils/environment.sh From 5f277c2d30f9d4f64dc30405836d1148853076c2 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Fri, 24 Jan 2020 10:22:37 +0100 Subject: [PATCH 35/35] disable extra-parts generation due to high run-time Signed-off-by: Alessandro Comodi --- .github/kokoro/db-full.sh | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/.github/kokoro/db-full.sh b/.github/kokoro/db-full.sh index 0ad87f25..dd10f56d 100755 --- a/.github/kokoro/db-full.sh +++ b/.github/kokoro/db-full.sh @@ -86,12 +86,20 @@ echo "----------------------------------------" ) echo "----------------------------------------" -# Generate extra files (additional part yaml's, harness, etc). +# Generate extra harness files (additional part yaml's, harness). set +e # Attempt to generate extra harnesses here, but don't check until after diff reporting. make db-extras-${XRAY_SETTINGS}-harness EXTRAS_HARNESS_RET=$? set -e + +# Generate extra parts file (tilegrid, tileconn, part yaml, part json and package_pin) +# TODO: Disabled for now as for big parts it takes a huge amount of time +#set +e +#make db-extras-${XRAY_SETTINGS}-parts -j $CORES +EXTRAS_PARTS_RET=0 +#set -e + # Format the database make db-format-${XRAY_SETTINGS} # Update the database/Info.md file @@ -183,13 +191,6 @@ echo "----------------------------------------" ) echo "----------------------------------------" -# Calculating extra parts here, to avoid the huge diff issue by the introduction -# of new parts -set +e -make db-extras-${XRAY_SETTINGS}-parts -j $CORES -EXTRAS_PARTS_RET=$? -set -e - # Check the database and fail if it is broken. make db-check-${XRAY_SETTINGS}