diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index ccfd7082..a0647c03 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -41,6 +41,13 @@ if (PRJXRAY_BUILD_TESTING)
 	add_test(NAME xilinx_xc7series_bitstream_reader_test
 		 COMMAND xilinx_xc7series_bitstream_reader_test)
 
+	add_executable(xilinx_xc7series_block_type_test
+		xilinx/xc7series/block_type_test.cc)
+	target_link_libraries(xilinx_xc7series_block_type_test
+		libprjxray gtest_main)
+	add_test(NAME xilinx_xc7series_block_type_test
+		 COMMAND xilinx_xc7series_block_type_test)
+
 	add_executable(xilinx_xc7series_configuration_packet_test
 		xilinx/xc7series/configuration_packet_test.cc)
 	target_link_libraries(xilinx_xc7series_configuration_packet_test
diff --git a/lib/xilinx/xc7series/block_type_test.cc b/lib/xilinx/xc7series/block_type_test.cc
new file mode 100644
index 00000000..3420c0bd
--- /dev/null
+++ b/lib/xilinx/xc7series/block_type_test.cc
@@ -0,0 +1,30 @@
+#include <prjxray/xilinx/xc7series/block_type.h>
+
+#include <gtest/gtest.h>
+
+namespace xc7series = prjxray::xilinx::xc7series;
+
+TEST(BlockTypeTest, YamlEncode) {
+	YAML::Node node;
+	node.push_back(xc7series::BlockType::CLB_IO_CLK);
+	node.push_back(xc7series::BlockType::BLOCK_RAM);
+	node.push_back(xc7series::BlockType::CFG_CLB);
+
+	EXPECT_EQ(node[0].as<std::string>(), "CLB_IO_CLK");
+	EXPECT_EQ(node[1].as<std::string>(), "BLOCK_RAM");
+	EXPECT_EQ(node[2].as<std::string>(), "CFG_CLB");
+}
+
+TEST(BlockTypeTest, YamlDecode) {
+	YAML::Node node;
+	node.push_back("CFG_CLB");
+	node.push_back("BLOCK_RAM");
+	node.push_back("CLB_IO_CLK");
+
+	EXPECT_EQ(node[0].as<xc7series::BlockType>(),
+		  xc7series::BlockType::CFG_CLB);
+	EXPECT_EQ(node[1].as<xc7series::BlockType>(),
+		  xc7series::BlockType::BLOCK_RAM);
+	EXPECT_EQ(node[2].as<xc7series::BlockType>(),
+		  xc7series::BlockType::CLB_IO_CLK);
+}