From d0c139ae35d21222b96154f56988093e2d0f2258 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sat, 6 Jan 2018 16:32:55 +0100 Subject: [PATCH] Add missing blacklist rules to tileconn fuzzer Signed-off-by: Clifford Wolf --- fuzzers/070-tileconn/generate.py | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/fuzzers/070-tileconn/generate.py b/fuzzers/070-tileconn/generate.py index 2fda59e7..6c64dc2b 100644 --- a/fuzzers/070-tileconn/generate.py +++ b/fuzzers/070-tileconn/generate.py @@ -35,8 +35,21 @@ def filter_pair(type1, type2, wire1, wire2, delta_x, delta_y): if wire1.startswith("HCLK_BYP"): is_vertical_wire = True if wire1.startswith("HCLK_FAN"): is_vertical_wire = True if wire1.startswith("HCLK_LEAF_CLK_"): is_vertical_wire = True + + is_horizontal_wire = False + if wire1.startswith("HCLK_CK_"): is_horizontal_wire = True + if wire1.startswith("HCLK_INT_"): is_horizontal_wire = True + + assert is_vertical_wire != is_horizontal_wire if is_vertical_wire and delta_y == 0: return True - if not is_vertical_wire and delta_x == 0: return True + if is_horizontal_wire and delta_x == 0: return True + + if type1 in ["INT_L", "INT_R"]: + # the wires with underscore after BEG/END all connect vertically + if (("BEG_" in wire1) or ("END_" in wire1)) and delta_y == 0: return True + + if type1 in ["BRKH_INT", "BRKH_B_TERM_INT", "T_TERM_INT"]: + if delta_y == 0: return True return False