diff --git a/minitests/iob/Makefile b/minitests/iob/Makefile
index a0cd12fa..6560eec1 100644
--- a/minitests/iob/Makefile
+++ b/minitests/iob/Makefile
@@ -12,9 +12,12 @@ clean:
 build/env:
 	test "$(XRAY_PART)" = "xc7a50tfgg484-1"
 
-build/roi_roi_io.diff:
+build/roi_io.diff:
 	$(MAKE) -f diff.mk OUT_DIFF=build/roi_io.diff PRJL=roi_io_a PRJR=roi_io_b
 
+build/roi_prop.diff:
+	$(MAKE) -f diff.mk OUT_DIFF=build/roi_prop.diff PRJL=roi_prop_a PRJR=roi_prop_b
+
 build/PULLTYPE/run.ok:
 	PROJECT=PULLTYPE bash runme_tcl.sh
 	diff build/PULLTYPE/design_{PULLDOWN,KEEPER}.bits || true
diff --git a/minitests/iob/runme.tcl b/minitests/iob/runme.tcl
index 9674265d..3f98cb7b 100644
--- a/minitests/iob/runme.tcl
+++ b/minitests/iob/runme.tcl
@@ -8,6 +8,8 @@ set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_po
 set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports di]
 set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do]
 
+# set_property roi/dut
+
 create_pblock roi
 set_property EXCLUDE_PLACEMENT 1 [get_pblocks roi]
 add_cells_to_pblock [get_pblocks roi] [get_cells roi]
diff --git a/minitests/iob/template.tcl b/minitests/iob/template.tcl
index 0c0dc873..2fa1321e 100644
--- a/minitests/iob/template.tcl
+++ b/minitests/iob/template.tcl
@@ -18,3 +18,8 @@ set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF]
 place_design
 route_design
 
+# set port [create_port -direction OUT myport]
+# set_property -dict "PACKAGE_PIN D19 IOSTANDARD LVCMOS33" $port
+# set_property PULLTYPE PULLUP $port
+# set_property PULLTYPE PULLDOWN $port
+
diff --git a/minitests/iob/top.v b/minitests/iob/top.v
index c4a37e21..0e8f32b8 100644
--- a/minitests/iob/top.v
+++ b/minitests/iob/top.v
@@ -1,3 +1,16 @@
+/*
+IOBUF
+    Not a primitive?
+    Looks like it has an OBUFT
+
+
+Output buffer family:
+    OBUF
+    OBUFDS
+    OBUFT
+    OBUFTDS
+*/
+
 `ifndef ROI
 ERROR: must set ROI
 `endif
@@ -89,3 +102,82 @@ module roi_io_b(input clk, input [255:0] din, output [255:0] dout);
 
 endmodule
 
+/*
+For some reason this doesn't diff
+Was this optimized out?
+
+ERROR: [Place 30-69] Instance roi/dut/OBUFT (OBUFT) is unplaced after IO placer
+ERROR: [Place 30-68] Instance roi/dut/OBUFT (OBUFT) is not placed
+*/
+
+/*
+module roi_prop_a(input clk, input [255:0] din, output [255:0] dout);
+    assign dout[0] = din[0] & din[1];
+
+    //(* LOC="D19", KEEP, DONT_TOUCH *)
+    (* KEEP, DONT_TOUCH *)
+    IOBUF #(
+        .DRIVE(8),
+        .IBUF_LOW_PWR("TRUE"),
+        .IOSTANDARD("DEFAULT"),
+        .SLEW("SLOW")
+    ) dut (
+        .O(dout[1]),
+        .I(din[0]),
+        .T(din[1]));
+endmodule
+
+module roi_prop_b(input clk, input [255:0] din, output [255:0] dout);
+    assign dout[0] = din[0] & din[1];
+
+    //(* LOC="D19", KEEP, DONT_TOUCH *)
+    (* KEEP, DONT_TOUCH *)
+    IOBUF #(
+        .DRIVE(12),
+        .IBUF_LOW_PWR("TRUE"),
+        .IOSTANDARD("DEFAULT"),
+        .SLEW("SLOW")
+    ) dut (
+        .O(dout[1]),
+        .I(din[0]),
+        .T(din[1]));
+endmodule
+*/
+
+/*
+ERROR: [DRC REQP-1581] obuf_loaded: OBUFT roi/dut pin O drives one or more invalid loads. The loads are: dout_shr[1]_i_1 
+ERROR: [Place 30-69] Instance roi/dut (OBUFT) is unplaced after IO placer
+hmm
+Abandoning verilog approach
+tcl seems to work well, just use it directly
+*/
+module roi_prop_a(input clk, input [255:0] din, output [255:0] dout);
+    (* LOC="D19", KEEP, DONT_TOUCH *)
+    //(* KEEP, DONT_TOUCH *)
+    OBUFT #(
+        .DRIVE(8),
+        .IOSTANDARD("DEFAULT"),
+        .SLEW("SLOW")
+    ) dut (
+        //.O(dout[1]),
+        .O(),
+        .I(din[0]),
+        .T(din[1]));
+endmodule
+
+module roi_prop_b(input clk, input [255:0] din, output [255:0] dout);
+    (* LOC="D19", KEEP, DONT_TOUCH *)
+    //(* KEEP, DONT_TOUCH *)
+    (* KEEP, DONT_TOUCH *)
+    OBUFT #(
+        .DRIVE(12),
+        .IOSTANDARD("DEFAULT"),
+        .SLEW("SLOW")
+    ) dut (
+        //.O(dout[1]),
+        .O(),
+        .I(din[0]),
+        .T(din[1]));
+endmodule
+
+