diff --git a/Makefile b/Makefile index 3e6b9dad..41c2af53 100644 --- a/Makefile +++ b/Makefile @@ -143,7 +143,7 @@ $(foreach DB,$(DATABASES),$(eval $(call database,$(DB)))) # -------------------------------------- ARTIX_PARTS=artix200t -ZYNQ_PARTS=zynq020 +ZYNQ_PARTS=zynq7010 KINTEX_PARTS=kintex70t XRAY_PARTS=${ARTIX_PARTS} ${ZYNQ_PARTS} ${KINTEX_PARTS} @@ -187,8 +187,7 @@ db-extras-kintex7-parts: db-extras-kintex7-harness: @true -db-extras-zynq7-parts: - @true +db-extras-zynq7-parts: $(addprefix db-part-only-,$(ARTIX_PARTS)) db-extras-zynq7-harness: @true diff --git a/fuzzers/005-tilegrid/ps7_int/top.py b/fuzzers/005-tilegrid/ps7_int/top.py index 4d69683c..0f5ef5c9 100644 --- a/fuzzers/005-tilegrid/ps7_int/top.py +++ b/fuzzers/005-tilegrid/ps7_int/top.py @@ -39,9 +39,11 @@ module top(input clk, stb, di, output do); params = {} # NOTE: The INT_L tile has been hardcoded and it works only for the part specified in the assertion - assert os.getenv('XRAY_PART') == "xc7z020clg484-1" + database = os.getenv('XRAY_DATABASE') + int_tile = os.getenv('XRAY_PS7_INT') + assert database == "zynq7", database for isone in util.gen_fuzz_states(1): - params['INT_L_X18Y100'] = isone + params[int_tile] = isone print( ''' (* KEEP, DONT_TOUCH *) diff --git a/settings/zynq7.sh b/settings/zynq7.sh index 25d69b41..7f3e50cb 100644 --- a/settings/zynq7.sh +++ b/settings/zynq7.sh @@ -7,7 +7,8 @@ export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X113Y149 RAMB18_X0Y0:RAMB18_X5Y59 RAM export XRAY_EXCLUDE_ROI_TILEGRID="" -export XRAY_IOI3_TILES="RIOI3_X31Y9" +export XRAY_IOI3_TILES="RIOI3_X73Y9" +export XRAY_PS7_INT="INT_L_X18Y100" # These settings must remain in sync export XRAY_ROI="SLICE_X0Y0:SLICE_X49Y49 RAMB18_X0Y0:RAMB18_X2Y19 RAMB36_X0Y0:RAMB36_X2Y9 IOB_X0Y0:IOB_X0Y49 DSP48_X0Y0:DSP48_X2Y19" diff --git a/settings/zynq7010.sh b/settings/zynq7010.sh new file mode 100644 index 00000000..f69107fe --- /dev/null +++ b/settings/zynq7010.sh @@ -0,0 +1,31 @@ +export XRAY_DATABASE="zynq7" +export XRAY_PART="xc7z010clg400-1" +export XRAY_ROI_FRAMES="0x00000000:0xffffffff" + +# All CLB's in part, all BRAM's in part, all DSP's in part. +export XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X43Y99 RAMB18_X0Y0:RAMB18_X2Y39 RAMB36_X0Y0:RAMB36_X2Y19 DSP48_X0Y0:DSP48_X1Y39" + +export XRAY_EXCLUDE_ROI_TILEGRID="" + +export XRAY_IOI3_TILES="RIOI3_X31Y9" +export XRAY_PS7_INT="INT_L_X0Y50" + +# These settings must remain in sync +export XRAY_ROI="SLICE_X00Y50:SLICE_X43Y99 RAMB18_X0Y20:RAMB18_X2Y39 RAMB36_X0Y10:RAMB36_X2Y19 IOB_X0Y50:IOB_X0Y99" + +# Most of CMT X0Y2. +export XRAY_ROI_GRID_X1="83" +export XRAY_ROI_GRID_X2="118" +# Include VBRK / VTERM +export XRAY_ROI_GRID_Y1="0" +export XRAY_ROI_GRID_Y2="51" + +export XRAY_PIN_00="L14" +export XRAY_PIN_01="L15" +export XRAY_PIN_02="M14" +export XRAY_PIN_03="M15" +export XRAY_PIN_04="K16" +export XRAY_PIN_05="J16" +export XRAY_PIN_06="J15" + +source $(dirname ${BASH_SOURCE[0]})/../utils/environment.sh