From 2df9e9e92c5a938e5c327eec3d81b66733f782e8 Mon Sep 17 00:00:00 2001 From: Hans Baier Date: Tue, 3 Oct 2023 11:06:17 +0700 Subject: [PATCH] add ppips for CFG_CENTER_MID Signed-off-by: Hans Baier --- fuzzers/071-ppips/generate.tcl | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/fuzzers/071-ppips/generate.tcl b/fuzzers/071-ppips/generate.tcl index a4243801..b9f3fb19 100644 --- a/fuzzers/071-ppips/generate.tcl +++ b/fuzzers/071-ppips/generate.tcl @@ -90,6 +90,23 @@ proc write_bram_ppips_db {filename tile} { close $fp } +proc write_cfg_ppips_db {filename tile} { + set fp [open $filename "w"] + set tile [get_tiles $tile] + set tile_type [get_property TILE_TYPE $tile] + + foreach pip [get_pips -of_objects $tile] { + set dst_wire [get_wires -downhill -of_objects $pip] + if {[get_pips -uphill -of_objects [get_nodes -of_objects $dst_wire]] == $pip} { + set src_wire [get_wires -uphill -of_objects $pip] + puts $fp "${tile_type}.[regsub {.*/} $dst_wire ""].[regsub {.*/} $src_wire ""] always" + } + } + + close $fp +} + + proc write_dsp_ppips_db {filename tile} { set fp [open $filename "w"] set tile [get_tiles $tile] @@ -338,6 +355,14 @@ foreach tile_type {BRAM_L BRAM_R} { } } +foreach tile_type {CFG_CENTER_MID} { + set tiles [get_tiles -filter "TILE_TYPE == $tile_type"] + if {[llength $tiles] != 0} { + set tile [lindex $tiles 0] + write_cfg_ppips_db "ppips_[string tolower $tile_type].db" $tile + } +} + foreach tile_type {DSP_L DSP_R} { set tiles [get_tiles -filter "TILE_TYPE == $tile_type"] if {[llength $tiles] != 0} {