From 2cffb2987e3340e11f7307ff61a590939f782150 Mon Sep 17 00:00:00 2001
From: John McMaster <johndmcmaster@gmail.com>
Date: Wed, 31 Oct 2018 17:47:18 -0700
Subject: [PATCH] bram: minor cleanup

Signed-off-by: John McMaster <johndmcmaster@gmail.com>
---
 fuzzers/025-bram-config/top.py           | 14 ++++----------
 fuzzers/026-bram-data/minitest/runme.tcl |  2 +-
 fuzzers/026-bram-data/top.py             |  3 +--
 3 files changed, 6 insertions(+), 13 deletions(-)

diff --git a/fuzzers/025-bram-config/top.py b/fuzzers/025-bram-config/top.py
index c030673e..4425454d 100644
--- a/fuzzers/025-bram-config/top.py
+++ b/fuzzers/025-bram-config/top.py
@@ -32,15 +32,7 @@ def gen_brams():
     '''
     Correctly assign a site to either bram36 or 2x bram18
     '''
-    # FIXME
-    #yield ('RAMBFIFO36E1', "RAMB36_X0Y20")
-    #return
-
-    #for _tile_name, site_name, _site_type in util.get_roi().gen_tiles():
-
-    #for site in gen_bram36():
-    #    yield ('RAMBFIFO36E1', site)
-
+    # XXX: mix 18 and 36?
     for site in gen_bram18():
         yield ('RAMB18E1', site)
 
@@ -100,6 +92,7 @@ for loci, (site_type, site) in enumerate(brams):
 
         return ('my_RAMB18E1', ports, params)
 
+    '''
     def place_bram36():
         ports = {
             'clk': 'clk',
@@ -121,10 +114,11 @@ for loci, (site_type, site) in enumerate(brams):
             'WRITE_MODE_B': '"WRITE_FIRST"',
         }
         return ('my_RAMB36E1', ports, params)
+    '''
 
     modname, ports, params = {
         'RAMB18E1': place_bram18,
-        'RAMBFIFO36E1': place_bram36,
+        #'RAMBFIFO36E1': place_bram36,
     }[site_type]()
 
     verilog.instance(modname, 'inst_%u' % loci, ports, params=params)
diff --git a/fuzzers/026-bram-data/minitest/runme.tcl b/fuzzers/026-bram-data/minitest/runme.tcl
index 6aa1f9eb..83db6f9b 100644
--- a/fuzzers/026-bram-data/minitest/runme.tcl
+++ b/fuzzers/026-bram-data/minitest/runme.tcl
@@ -9,7 +9,7 @@ set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_po
 set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do]
 
 create_pblock roi
-set_property EXCLUDE_PLACEMENT 1 [get_pblocks roi]
+
 add_cells_to_pblock [get_pblocks roi] [get_cells roi]
 resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)"
 
diff --git a/fuzzers/026-bram-data/top.py b/fuzzers/026-bram-data/top.py
index 6b029c0c..4adc8c9f 100644
--- a/fuzzers/026-bram-data/top.py
+++ b/fuzzers/026-bram-data/top.py
@@ -9,13 +9,12 @@ import sys
 
 
 def gen_bram36():
-    #yield "RAMB36_X%dY%d" % (x, y)
     for _tile_name, site_name, _site_type in util.get_roi().gen_sites(
         ['RAMBFIFO36E1']):
         yield site_name
 
 
-DUTN = 10
+DUTN = len(list(gen_bram36()))
 DIN_N = DUTN * 8
 DOUT_N = DUTN * 8