diff --git a/minitests/bram/Makefile b/minitests/bram/Makefile
index 7e47a0e0..1347daca 100644
--- a/minitests/bram/Makefile
+++ b/minitests/bram/Makefile
@@ -1,27 +1 @@
-N := 3
-SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N)))
-SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
-
-all:
-	bash runme.sh
-	test -z $(fgrep CRITICAL vivado.log)
-	${XRAY_SEGPRINT} -z -D design.bits  >design.txt
-
-database: $(SPECIMENS_OK)
-	${XRAY_SEGMATCH} -o seg_clblx.segbits $(addsuffix /segdata_clbl[lm]_[lr].txt,$(SPECIMENS))
-
-pushdb:
-	${XRAY_MERGEDDB} clbll_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clbll_r seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_r seg_clblx.segbits
-
-$(SPECIMENS_OK):
-	bash generate.sh $(subst /OK,,$@)
-	touch $@
-
-clean:
-	rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit design.txt .Xil
-
-.PHONY: database pushdb clean
-
+include ../util/Makefile
diff --git a/minitests/bram/runme.sh b/minitests/bram/runme.sh
deleted file mode 100755
index 210c4eb3..00000000
--- a/minitests/bram/runme.sh
+++ /dev/null
@@ -1,6 +0,0 @@
-#!/bin/bash
-
-set -ex
-vivado -mode batch -source runme.tcl
-${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
-
diff --git a/minitests/bram/runme.tcl b/minitests/bram/runme.tcl
deleted file mode 100644
index 1f55871a..00000000
--- a/minitests/bram/runme.tcl
+++ /dev/null
@@ -1,28 +0,0 @@
-create_project -force -part $::env(XRAY_PART) design design
-read_verilog top.v
-synth_design -top top
-
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports clk]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports stb]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports di]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do]
-
-create_pblock roi
-set_property EXCLUDE_PLACEMENT 1 [get_pblocks roi]
-add_cells_to_pblock [get_pblocks roi] [get_cells roi]
-# Need to go outside
-# SLICE_X12Y100:SLICE_X27Y149
-resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)"
-
-set_property CFGBVS VCCO [current_design]
-set_property CONFIG_VOLTAGE 3.3 [current_design]
-set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
-
-set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF]
-
-place_design
-route_design
-
-write_checkpoint -force design.dcp
-write_bitstream -force design.bit
-
diff --git a/minitests/clb_bused/Makefile b/minitests/clb_bused/Makefile
index 95a85611..1d13e215 100644
--- a/minitests/clb_bused/Makefile
+++ b/minitests/clb_bused/Makefile
@@ -1,27 +1 @@
-N := 3
-SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N)))
-SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
-
-all:
-	bash runme.sh
-	test -z $(fgrep CRITICAL vivado.log)
-	${XRAY_SEGPRINT} -z -D design.bits  >design.txt
-
-database: $(SPECIMENS_OK)
-	${XRAY_SEGMATCH} -o seg_clblx.segbits $(addsuffix /segdata_clbl[lm]_[lr].txt,$(SPECIMENS))
-
-pushdb:
-	${XRAY_MERGEDDB} clbll_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clbll_r seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_r seg_clblx.segbits
-
-$(SPECIMENS_OK):
-	bash generate.sh $(subst /OK,,$@)
-	touch $@
-
-clean:
-	rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit
-
-.PHONY: database pushdb clean
-
+include ../util/common.mk
diff --git a/minitests/clb_bused/runme.sh b/minitests/clb_bused/runme.sh
deleted file mode 100755
index 6ffc4043..00000000
--- a/minitests/clb_bused/runme.sh
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/bin/bash
-
-set -ex
-# rm -f vivado*.log vivado*.jou
-vivado -mode batch -source runme.tcl
-test -z $(fgrep CRITICAL vivado.log)
-${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
-#${XRAY_SEGPRINT} design.bits SLICE_X16Y100 SLICE_X16Y101 SLICE_X16Y102 SLICE_X16Y103
diff --git a/minitests/ffcfg/.gitignore b/minitests/clb_ffcfg/.gitignore
similarity index 100%
rename from minitests/ffcfg/.gitignore
rename to minitests/clb_ffcfg/.gitignore
diff --git a/minitests/clb_ffcfg/Makefile b/minitests/clb_ffcfg/Makefile
new file mode 100644
index 00000000..1d13e215
--- /dev/null
+++ b/minitests/clb_ffcfg/Makefile
@@ -0,0 +1 @@
+include ../util/common.mk
diff --git a/minitests/ffcfg/README.txt b/minitests/clb_ffcfg/README.txt
similarity index 100%
rename from minitests/ffcfg/README.txt
rename to minitests/clb_ffcfg/README.txt
diff --git a/minitests/ffcfg/top.v b/minitests/clb_ffcfg/top.v
similarity index 100%
rename from minitests/ffcfg/top.v
rename to minitests/clb_ffcfg/top.v
diff --git a/minitests/clb_n5ffmux/Makefile b/minitests/clb_n5ffmux/Makefile
index a1c8f16a..1d13e215 100644
--- a/minitests/clb_n5ffmux/Makefile
+++ b/minitests/clb_n5ffmux/Makefile
@@ -1,27 +1 @@
-N := 3
-SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N)))
-SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
-
-all:
-	bash runme.sh
-	test -z $(fgrep CRITICAL vivado.log)
-	${XRAY_SEGPRINT} -z -D design.bits  >design.txt
-
-database: $(SPECIMENS_OK)
-	${XRAY_SEGMATCH} -o seg_clblx.segbits $(addsuffix /segdata_clbl[lm]_[lr].txt,$(SPECIMENS))
-
-pushdb:
-	${XRAY_MERGEDDB} clbll_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clbll_r seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_r seg_clblx.segbits
-
-$(SPECIMENS_OK):
-	bash generate.sh $(subst /OK,,$@)
-	touch $@
-
-clean:
-	rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit design.txt
-
-.PHONY: database pushdb clean
-
+include ../util/common.mk
diff --git a/minitests/clb_n5ffmux/runme.sh b/minitests/clb_n5ffmux/runme.sh
deleted file mode 100755
index 6ffc4043..00000000
--- a/minitests/clb_n5ffmux/runme.sh
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/bin/bash
-
-set -ex
-# rm -f vivado*.log vivado*.jou
-vivado -mode batch -source runme.tcl
-test -z $(fgrep CRITICAL vivado.log)
-${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
-#${XRAY_SEGPRINT} design.bits SLICE_X16Y100 SLICE_X16Y101 SLICE_X16Y102 SLICE_X16Y103
diff --git a/minitests/clb_n5ffmux/runme.tcl b/minitests/clb_n5ffmux/runme.tcl
deleted file mode 100644
index 86162f92..00000000
--- a/minitests/clb_n5ffmux/runme.tcl
+++ /dev/null
@@ -1,26 +0,0 @@
-create_project -force -part $::env(XRAY_PART) design design
-read_verilog top.v
-synth_design -top top
-
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports clk]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports stb]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports di]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do]
-
-create_pblock roi
-set_property EXCLUDE_PLACEMENT 1 [get_pblocks roi]
-add_cells_to_pblock [get_pblocks roi] [get_cells roi]
-resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)"
-
-set_property CFGBVS VCCO [current_design]
-set_property CONFIG_VOLTAGE 3.3 [current_design]
-set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
-
-set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF]
-
-place_design
-route_design
-
-write_checkpoint -force design.dcp
-write_bitstream -force design.bit
-
diff --git a/minitests/clb_n5ffmux/top.v b/minitests/clb_n5ffmux/top.v
index c6dc1dc6..1390d37f 100644
--- a/minitests/clb_n5ffmux/top.v
+++ b/minitests/clb_n5ffmux/top.v
@@ -29,6 +29,173 @@ module top(input clk, stb, di, output do);
 endmodule
 
 module roi(input clk, input [255:0] din, output [255:0] dout);
+    my_mux8  # (.LOC("SLICE_X22Y100"), .N(0))
+        c0 (.clk(clk), .din(din[  0 +: 8]), .dout(dout[0 +: 8]));
+endmodule
+
+module my_mux8 (input clk, input [7:0] din, output [7:0] dout);
+    parameter LOC="SLICE_X22Y100";
+    parameter N=-1;
+    parameter DEF_A=1;
+    wire lutdo, lutco, lutbo, lutao;
+    wire lut7bo, lut7ao;
+    wire lut8o;
+
+    assign dout[0] = lut8o;
+
+    reg [3:0] ffds;
+    wire lutdo5, lutco5, lutbo5, lutao5;
+    //wire lutno5 [3:0] = {lutao5, lutbo5, lutco5, lutdo5};
+    wire lutno5 [3:0] = {lutdo5, lutco5, lutbo5, lutao5};
+    always @(*) begin
+        /*
+        ffds[3] = lutdo5;
+        ffds[2] = lutco5;
+        ffds[1] = lutbo5;
+        ffds[0] = lutao5;
+        */
+        /*
+        ffds[3] = din[6];
+        ffds[2] = din[6];
+        ffds[1] = din[6];
+        ffds[0] = din[6];
+        */
+
+        if (DEF_A) begin
+            //Default poliarty A
+            ffds[3] = lutdo5;
+            ffds[2] = lutco5;
+            ffds[1] = lutbo5;
+            ffds[0] = lutao5;
+            ffds[N] = din[6];
+        end else begin
+            //Default polarity B
+            ffds[3] = din[6];
+            ffds[2] = din[6];
+            ffds[1] = din[6];
+            ffds[0] = din[6];
+            ffds[N] = lutno5[N];
+        end
+    end
+
+    (* LOC=LOC, BEL="F8MUX", KEEP, DONT_TOUCH *)
+    MUXF8 mux8 (.O(my_mux8), .I0(lut7bo), .I1(lut7ao), .S(din[6]));
+    (* LOC=LOC, BEL="F7BMUX", KEEP, DONT_TOUCH *)
+    MUXF7 mux7b (.O(lut7bo), .I0(lutdo), .I1(lutco), .S(din[6]));
+    (* LOC=LOC, BEL="F7AMUX", KEEP, DONT_TOUCH *)
+    MUXF7 mux7a (.O(lut7ao), .I0(lutbo), .I1(lutao), .S(din[6]));
+
+	(* LOC=LOC, BEL="D6LUT", KEEP, DONT_TOUCH *)
+	LUT6_2 #(
+		.INIT(64'h8000_DEAD_0000_0001)
+	) lutd (
+		.I0(din[0]),
+		.I1(din[1]),
+		.I2(din[2]),
+		.I3(din[3]),
+		.I4(din[4]),
+		.I5(din[5]),
+		.O5(lutdo5),
+		.O6(lutdo));
+	(* LOC=LOC, BEL="D5FF" *)
+	FDPE ffd (
+		.C(clk),
+		.Q(dout[1]),
+		.CE(din[0]),
+		.PRE(din[1]),
+		.D(ffds[3]));
+
+	(* LOC=LOC, BEL="C6LUT", KEEP, DONT_TOUCH *)
+	LUT6_2 #(
+		.INIT(64'h8000_BEEF_0000_0001)
+	) lutc (
+		.I0(din[0]),
+		.I1(din[1]),
+		.I2(din[2]),
+		.I3(din[3]),
+		.I4(din[4]),
+		.I5(din[5]),
+		.O5(lutco5),
+		.O6(lutco));
+	(* LOC=LOC, BEL="C5FF" *)
+	FDPE ffc (
+		.C(clk),
+		.Q(dout[2]),
+		.CE(din[0]),
+		.PRE(din[1]),
+		.D(ffds[2]));
+
+	(* LOC=LOC, BEL="B6LUT", KEEP, DONT_TOUCH *)
+	LUT6_2 #(
+		.INIT(64'h8000_CAFE_0000_0001)
+	) lutb (
+		.I0(din[0]),
+		.I1(din[1]),
+		.I2(din[2]),
+		.I3(din[3]),
+		.I4(din[4]),
+		.I5(din[5]),
+		.O5(lutbo5),
+		.O6(lutbo));
+	(* LOC=LOC, BEL="B5FF" *)
+	FDPE ffb (
+		.C(clk),
+		.Q(dout[3]),
+		.CE(din[0]),
+		.PRE(din[1]),
+		.D(ffds[1]));
+
+	(* LOC=LOC, BEL="A6LUT", KEEP, DONT_TOUCH *)
+	LUT6_2 #(
+		.INIT(64'h8000_1CE0_0000_0001)
+	) luta (
+		.I0(din[0]),
+		.I1(din[1]),
+		.I2(din[2]),
+		.I3(din[3]),
+		.I4(din[4]),
+		.I5(din[5]),
+		.O5(lutao5),
+		.O6(lutao));
+	(* LOC=LOC, BEL="A5FF" *)
+	FDPE ffa (
+		.C(clk),
+		.Q(dout[4]),
+		.CE(din[0]),
+		.PRE(din[1]),
+		//D can only come from O5 or AX
+		//AX is used by MUXF7:S
+		.D(ffds[0]));
+endmodule
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+module roi_ld(input clk, input [255:0] din, output [255:0] dout);
     clb_N5FFMUX  # (.LOC("SLICE_X22Y100"), .N(0))
         clb_N5FFMUX_0 (.clk(clk), .din(din[  0 +: 8]), .dout(dout[0 +: 8]));
     clb_N5FFMUX  # (.LOC("SLICE_X22Y101"), .N(1))
diff --git a/minitests/clb_ncy0/Makefile b/minitests/clb_ncy0/Makefile
index a1c8f16a..1d13e215 100644
--- a/minitests/clb_ncy0/Makefile
+++ b/minitests/clb_ncy0/Makefile
@@ -1,27 +1 @@
-N := 3
-SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N)))
-SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
-
-all:
-	bash runme.sh
-	test -z $(fgrep CRITICAL vivado.log)
-	${XRAY_SEGPRINT} -z -D design.bits  >design.txt
-
-database: $(SPECIMENS_OK)
-	${XRAY_SEGMATCH} -o seg_clblx.segbits $(addsuffix /segdata_clbl[lm]_[lr].txt,$(SPECIMENS))
-
-pushdb:
-	${XRAY_MERGEDDB} clbll_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clbll_r seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_r seg_clblx.segbits
-
-$(SPECIMENS_OK):
-	bash generate.sh $(subst /OK,,$@)
-	touch $@
-
-clean:
-	rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit design.txt
-
-.PHONY: database pushdb clean
-
+include ../util/common.mk
diff --git a/minitests/clb_ncy0/runme.sh b/minitests/clb_ncy0/runme.sh
deleted file mode 100755
index 6ffc4043..00000000
--- a/minitests/clb_ncy0/runme.sh
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/bin/bash
-
-set -ex
-# rm -f vivado*.log vivado*.jou
-vivado -mode batch -source runme.tcl
-test -z $(fgrep CRITICAL vivado.log)
-${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
-#${XRAY_SEGPRINT} design.bits SLICE_X16Y100 SLICE_X16Y101 SLICE_X16Y102 SLICE_X16Y103
diff --git a/minitests/clb_ncy0/runme.tcl b/minitests/clb_ncy0/runme.tcl
deleted file mode 100644
index 86162f92..00000000
--- a/minitests/clb_ncy0/runme.tcl
+++ /dev/null
@@ -1,26 +0,0 @@
-create_project -force -part $::env(XRAY_PART) design design
-read_verilog top.v
-synth_design -top top
-
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports clk]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports stb]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports di]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do]
-
-create_pblock roi
-set_property EXCLUDE_PLACEMENT 1 [get_pblocks roi]
-add_cells_to_pblock [get_pblocks roi] [get_cells roi]
-resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)"
-
-set_property CFGBVS VCCO [current_design]
-set_property CONFIG_VOLTAGE 3.3 [current_design]
-set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
-
-set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF]
-
-place_design
-route_design
-
-write_checkpoint -force design.dcp
-write_bitstream -force design.bit
-
diff --git a/minitests/clb_ndi1mux/Makefile b/minitests/clb_ndi1mux/Makefile
index 7e47a0e0..1d13e215 100644
--- a/minitests/clb_ndi1mux/Makefile
+++ b/minitests/clb_ndi1mux/Makefile
@@ -1,27 +1 @@
-N := 3
-SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N)))
-SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
-
-all:
-	bash runme.sh
-	test -z $(fgrep CRITICAL vivado.log)
-	${XRAY_SEGPRINT} -z -D design.bits  >design.txt
-
-database: $(SPECIMENS_OK)
-	${XRAY_SEGMATCH} -o seg_clblx.segbits $(addsuffix /segdata_clbl[lm]_[lr].txt,$(SPECIMENS))
-
-pushdb:
-	${XRAY_MERGEDDB} clbll_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clbll_r seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_r seg_clblx.segbits
-
-$(SPECIMENS_OK):
-	bash generate.sh $(subst /OK,,$@)
-	touch $@
-
-clean:
-	rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit design.txt .Xil
-
-.PHONY: database pushdb clean
-
+include ../util/common.mk
diff --git a/minitests/clb_ndi1mux/runme.sh b/minitests/clb_ndi1mux/runme.sh
deleted file mode 100755
index 7810c911..00000000
--- a/minitests/clb_ndi1mux/runme.sh
+++ /dev/null
@@ -1,9 +0,0 @@
-#!/bin/bash
-
-set -ex
-# rm -f vivado*.log vivado*.jou
-vivado -mode batch -source runme.tcl
-${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
-#${XRAY_SEGPRINT} design.bits SLICE_X16Y100 SLICE_X16Y101 SLICE_X16Y102 SLICE_X16Y103
-test -z $(fgrep CRITICAL vivado.log)
-
diff --git a/minitests/clb_ndi1mux/runme.tcl b/minitests/clb_ndi1mux/runme.tcl
deleted file mode 100644
index 86162f92..00000000
--- a/minitests/clb_ndi1mux/runme.tcl
+++ /dev/null
@@ -1,26 +0,0 @@
-create_project -force -part $::env(XRAY_PART) design design
-read_verilog top.v
-synth_design -top top
-
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports clk]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports stb]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports di]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do]
-
-create_pblock roi
-set_property EXCLUDE_PLACEMENT 1 [get_pblocks roi]
-add_cells_to_pblock [get_pblocks roi] [get_cells roi]
-resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)"
-
-set_property CFGBVS VCCO [current_design]
-set_property CONFIG_VOLTAGE 3.3 [current_design]
-set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
-
-set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF]
-
-place_design
-route_design
-
-write_checkpoint -force design.dcp
-write_bitstream -force design.bit
-
diff --git a/minitests/clb_nffmux/Makefile b/minitests/clb_nffmux/Makefile
index 7e47a0e0..1d13e215 100644
--- a/minitests/clb_nffmux/Makefile
+++ b/minitests/clb_nffmux/Makefile
@@ -1,27 +1 @@
-N := 3
-SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N)))
-SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
-
-all:
-	bash runme.sh
-	test -z $(fgrep CRITICAL vivado.log)
-	${XRAY_SEGPRINT} -z -D design.bits  >design.txt
-
-database: $(SPECIMENS_OK)
-	${XRAY_SEGMATCH} -o seg_clblx.segbits $(addsuffix /segdata_clbl[lm]_[lr].txt,$(SPECIMENS))
-
-pushdb:
-	${XRAY_MERGEDDB} clbll_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clbll_r seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_r seg_clblx.segbits
-
-$(SPECIMENS_OK):
-	bash generate.sh $(subst /OK,,$@)
-	touch $@
-
-clean:
-	rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit design.txt .Xil
-
-.PHONY: database pushdb clean
-
+include ../util/common.mk
diff --git a/minitests/clb_nffmux/runme.sh b/minitests/clb_nffmux/runme.sh
deleted file mode 100755
index 536f2346..00000000
--- a/minitests/clb_nffmux/runme.sh
+++ /dev/null
@@ -1,7 +0,0 @@
-#!/bin/bash
-
-set -ex
-# rm -f vivado*.log vivado*.jou
-vivado -mode batch -source runme.tcl
-${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
-#${XRAY_SEGPRINT} design.bits SLICE_X16Y100 SLICE_X16Y101 SLICE_X16Y102 SLICE_X16Y103
diff --git a/minitests/clb_nffmux/runme.tcl b/minitests/clb_nffmux/runme.tcl
deleted file mode 100644
index 86162f92..00000000
--- a/minitests/clb_nffmux/runme.tcl
+++ /dev/null
@@ -1,26 +0,0 @@
-create_project -force -part $::env(XRAY_PART) design design
-read_verilog top.v
-synth_design -top top
-
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports clk]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports stb]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports di]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do]
-
-create_pblock roi
-set_property EXCLUDE_PLACEMENT 1 [get_pblocks roi]
-add_cells_to_pblock [get_pblocks roi] [get_cells roi]
-resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)"
-
-set_property CFGBVS VCCO [current_design]
-set_property CONFIG_VOLTAGE 3.3 [current_design]
-set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
-
-set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF]
-
-place_design
-route_design
-
-write_checkpoint -force design.dcp
-write_bitstream -force design.bit
-
diff --git a/minitests/clb_noutmux/Makefile b/minitests/clb_noutmux/Makefile
index 7e47a0e0..1d13e215 100644
--- a/minitests/clb_noutmux/Makefile
+++ b/minitests/clb_noutmux/Makefile
@@ -1,27 +1 @@
-N := 3
-SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N)))
-SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
-
-all:
-	bash runme.sh
-	test -z $(fgrep CRITICAL vivado.log)
-	${XRAY_SEGPRINT} -z -D design.bits  >design.txt
-
-database: $(SPECIMENS_OK)
-	${XRAY_SEGMATCH} -o seg_clblx.segbits $(addsuffix /segdata_clbl[lm]_[lr].txt,$(SPECIMENS))
-
-pushdb:
-	${XRAY_MERGEDDB} clbll_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clbll_r seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_r seg_clblx.segbits
-
-$(SPECIMENS_OK):
-	bash generate.sh $(subst /OK,,$@)
-	touch $@
-
-clean:
-	rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit design.txt .Xil
-
-.PHONY: database pushdb clean
-
+include ../util/common.mk
diff --git a/minitests/clb_noutmux/runme.sh b/minitests/clb_noutmux/runme.sh
deleted file mode 100755
index 536f2346..00000000
--- a/minitests/clb_noutmux/runme.sh
+++ /dev/null
@@ -1,7 +0,0 @@
-#!/bin/bash
-
-set -ex
-# rm -f vivado*.log vivado*.jou
-vivado -mode batch -source runme.tcl
-${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
-#${XRAY_SEGPRINT} design.bits SLICE_X16Y100 SLICE_X16Y101 SLICE_X16Y102 SLICE_X16Y103
diff --git a/minitests/clb_noutmux/runme.tcl b/minitests/clb_noutmux/runme.tcl
deleted file mode 100644
index 86162f92..00000000
--- a/minitests/clb_noutmux/runme.tcl
+++ /dev/null
@@ -1,26 +0,0 @@
-create_project -force -part $::env(XRAY_PART) design design
-read_verilog top.v
-synth_design -top top
-
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports clk]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports stb]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports di]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do]
-
-create_pblock roi
-set_property EXCLUDE_PLACEMENT 1 [get_pblocks roi]
-add_cells_to_pblock [get_pblocks roi] [get_cells roi]
-resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)"
-
-set_property CFGBVS VCCO [current_design]
-set_property CONFIG_VOLTAGE 3.3 [current_design]
-set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
-
-set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF]
-
-place_design
-route_design
-
-write_checkpoint -force design.dcp
-write_bitstream -force design.bit
-
diff --git a/minitests/clb_ram/Makefile b/minitests/clb_ram/Makefile
index 7e47a0e0..1d13e215 100644
--- a/minitests/clb_ram/Makefile
+++ b/minitests/clb_ram/Makefile
@@ -1,27 +1 @@
-N := 3
-SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N)))
-SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
-
-all:
-	bash runme.sh
-	test -z $(fgrep CRITICAL vivado.log)
-	${XRAY_SEGPRINT} -z -D design.bits  >design.txt
-
-database: $(SPECIMENS_OK)
-	${XRAY_SEGMATCH} -o seg_clblx.segbits $(addsuffix /segdata_clbl[lm]_[lr].txt,$(SPECIMENS))
-
-pushdb:
-	${XRAY_MERGEDDB} clbll_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clbll_r seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_r seg_clblx.segbits
-
-$(SPECIMENS_OK):
-	bash generate.sh $(subst /OK,,$@)
-	touch $@
-
-clean:
-	rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit design.txt .Xil
-
-.PHONY: database pushdb clean
-
+include ../util/common.mk
diff --git a/minitests/clb_ram/runme.sh b/minitests/clb_ram/runme.sh
deleted file mode 100755
index 7810c911..00000000
--- a/minitests/clb_ram/runme.sh
+++ /dev/null
@@ -1,9 +0,0 @@
-#!/bin/bash
-
-set -ex
-# rm -f vivado*.log vivado*.jou
-vivado -mode batch -source runme.tcl
-${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
-#${XRAY_SEGPRINT} design.bits SLICE_X16Y100 SLICE_X16Y101 SLICE_X16Y102 SLICE_X16Y103
-test -z $(fgrep CRITICAL vivado.log)
-
diff --git a/minitests/clb_ram/runme.tcl b/minitests/clb_ram/runme.tcl
deleted file mode 100644
index 86162f92..00000000
--- a/minitests/clb_ram/runme.tcl
+++ /dev/null
@@ -1,26 +0,0 @@
-create_project -force -part $::env(XRAY_PART) design design
-read_verilog top.v
-synth_design -top top
-
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports clk]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports stb]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports di]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do]
-
-create_pblock roi
-set_property EXCLUDE_PLACEMENT 1 [get_pblocks roi]
-add_cells_to_pblock [get_pblocks roi] [get_cells roi]
-resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)"
-
-set_property CFGBVS VCCO [current_design]
-set_property CONFIG_VOLTAGE 3.3 [current_design]
-set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
-
-set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF]
-
-place_design
-route_design
-
-write_checkpoint -force design.dcp
-write_bitstream -force design.bit
-
diff --git a/minitests/ffcfg/Makefile b/minitests/ffcfg/Makefile
deleted file mode 100644
index 0ddf1bfa..00000000
--- a/minitests/ffcfg/Makefile
+++ /dev/null
@@ -1,25 +0,0 @@
-N := 3
-SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N)))
-SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
-
-all:
-	bash runme.sh
-
-database: $(SPECIMENS_OK)
-	${XRAY_SEGMATCH} -o seg_clblx.segbits $(addsuffix /segdata_clbl[lm]_[lr].txt,$(SPECIMENS))
-
-pushdb:
-	${XRAY_MERGEDDB} clbll_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clbll_r seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_r seg_clblx.segbits
-
-$(SPECIMENS_OK):
-	bash generate.sh $(subst /OK,,$@)
-	touch $@
-
-clean:
-	rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit
-
-.PHONY: database pushdb clean
-
diff --git a/minitests/ffcfg/runme.sh b/minitests/ffcfg/runme.sh
deleted file mode 100755
index 3cfc7a1e..00000000
--- a/minitests/ffcfg/runme.sh
+++ /dev/null
@@ -1,6 +0,0 @@
-#!/bin/bash
-
-set -ex
-vivado -mode batch -source runme.tcl
-${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
-#${XRAY_SEGPRINT} design.bits SLICE_X16Y100 SLICE_X16Y101 SLICE_X16Y102 SLICE_X16Y103
diff --git a/minitests/ffcfg/runme.tcl b/minitests/ffcfg/runme.tcl
deleted file mode 100644
index 86162f92..00000000
--- a/minitests/ffcfg/runme.tcl
+++ /dev/null
@@ -1,26 +0,0 @@
-create_project -force -part $::env(XRAY_PART) design design
-read_verilog top.v
-synth_design -top top
-
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports clk]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports stb]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports di]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do]
-
-create_pblock roi
-set_property EXCLUDE_PLACEMENT 1 [get_pblocks roi]
-add_cells_to_pblock [get_pblocks roi] [get_cells roi]
-resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)"
-
-set_property CFGBVS VCCO [current_design]
-set_property CONFIG_VOLTAGE 3.3 [current_design]
-set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
-
-set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF]
-
-place_design
-route_design
-
-write_checkpoint -force design.dcp
-write_bitstream -force design.bit
-
diff --git a/minitests/picorv32-v/Makefile b/minitests/picorv32-v/Makefile
index 30ea233d..e9e022b0 100644
--- a/minitests/picorv32-v/Makefile
+++ b/minitests/picorv32-v/Makefile
@@ -1,12 +1,8 @@
-N := 3
-SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N)))
-SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
-
 all:
 	bash runme.sh
 
 clean:
 	rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit design.txt .Xil
 
-.PHONY: database pushdb clean
+.PHONY: all clean
 
diff --git a/minitests/picorv32-v/runme.sh b/minitests/picorv32-v/runme.sh
old mode 100755
new mode 100644
index c1027bc4..059093d1
--- a/minitests/picorv32-v/runme.sh
+++ b/minitests/picorv32-v/runme.sh
@@ -1,11 +1,11 @@
 #!/bin/bash
 
 set -ex
-# rm -f vivado*.log vivado*.jou
 vivado -mode batch -source runme.tcl
-test -z $(fgrep CRITICAL vivado.log)
 ${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
+test -z "$(fgrep CRITICAL vivado.log)"
 ${XRAY_SEGPRINT} -z -D design.bits  >design.txt
-# test -z $(cat design.txt)
+
+# All bits solved?
 test $(wc -c design.txt  |cut -d\  -f 1) = 0
 
diff --git a/minitests/picorv32-y/Makefile b/minitests/picorv32-y/Makefile
index b01331f5..e9e022b0 100644
--- a/minitests/picorv32-y/Makefile
+++ b/minitests/picorv32-y/Makefile
@@ -1,12 +1,8 @@
-N := 3
-SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N)))
-SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
-
 all:
 	bash runme.sh
 
 clean:
-	rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit design.txt *.edif .Xil
+	rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit design.txt .Xil
 
-.PHONY: database pushdb clean
+.PHONY: all clean
 
diff --git a/minitests/picorv32-y/runme.sh b/minitests/picorv32-y/runme.sh
index 5854d5f0..8de51ec8 100755
--- a/minitests/picorv32-y/runme.sh
+++ b/minitests/picorv32-y/runme.sh
@@ -3,9 +3,10 @@
 set -ex
 yosys run_yosys.ys
 vivado -mode batch -source runme.tcl
-test -z $(fgrep CRITICAL vivado.log)
 ${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
+test -z "$(fgrep CRITICAL vivado.log)"
 ${XRAY_SEGPRINT} -z -D design.bits  >design.txt
-# test -z $(cat design.txt)
+
+# All bits solved?
 test $(wc -c design.txt  |cut -d\  -f 1) = 0
 
diff --git a/minitests/rom/.gitignore b/minitests/rom/.gitignore
deleted file mode 100644
index 82a01aa0..00000000
--- a/minitests/rom/.gitignore
+++ /dev/null
@@ -1,8 +0,0 @@
-/.Xil
-/design/
-/design.bit
-/design.bits
-/design.dcp
-/usage_statistics_webtalk.*
-/vivado*
-/design.txt
diff --git a/minitests/rom/Makefile b/minitests/rom/Makefile
deleted file mode 100644
index 7e47a0e0..00000000
--- a/minitests/rom/Makefile
+++ /dev/null
@@ -1,27 +0,0 @@
-N := 3
-SPECIMENS := $(addprefix specimen_,$(shell seq -f '%03.0f' $(N)))
-SPECIMENS_OK := $(addsuffix /OK,$(SPECIMENS))
-
-all:
-	bash runme.sh
-	test -z $(fgrep CRITICAL vivado.log)
-	${XRAY_SEGPRINT} -z -D design.bits  >design.txt
-
-database: $(SPECIMENS_OK)
-	${XRAY_SEGMATCH} -o seg_clblx.segbits $(addsuffix /segdata_clbl[lm]_[lr].txt,$(SPECIMENS))
-
-pushdb:
-	${XRAY_MERGEDDB} clbll_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clbll_r seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_l seg_clblx.segbits
-	${XRAY_MERGEDDB} clblm_r seg_clblx.segbits
-
-$(SPECIMENS_OK):
-	bash generate.sh $(subst /OK,,$@)
-	touch $@
-
-clean:
-	rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit design.txt .Xil
-
-.PHONY: database pushdb clean
-
diff --git a/minitests/rom/README.txt b/minitests/rom/README.txt
deleted file mode 100644
index 07f50a5f..00000000
--- a/minitests/rom/README.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-Test to verify that all the ROM* primitives are just regular LUTs and not BRAMs with init values
-
-Result:
-Confirmed: floorplan shows as LUTs and no unknown bits observed
diff --git a/minitests/rom/runme.sh b/minitests/rom/runme.sh
deleted file mode 100755
index 536f2346..00000000
--- a/minitests/rom/runme.sh
+++ /dev/null
@@ -1,7 +0,0 @@
-#!/bin/bash
-
-set -ex
-# rm -f vivado*.log vivado*.jou
-vivado -mode batch -source runme.tcl
-${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
-#${XRAY_SEGPRINT} design.bits SLICE_X16Y100 SLICE_X16Y101 SLICE_X16Y102 SLICE_X16Y103
diff --git a/minitests/rom/runme.tcl b/minitests/rom/runme.tcl
deleted file mode 100644
index 86162f92..00000000
--- a/minitests/rom/runme.tcl
+++ /dev/null
@@ -1,26 +0,0 @@
-create_project -force -part $::env(XRAY_PART) design design
-read_verilog top.v
-synth_design -top top
-
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_00) IOSTANDARD LVCMOS33" [get_ports clk]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_01) IOSTANDARD LVCMOS33" [get_ports stb]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_02) IOSTANDARD LVCMOS33" [get_ports di]
-set_property -dict "PACKAGE_PIN $::env(XRAY_PIN_03) IOSTANDARD LVCMOS33" [get_ports do]
-
-create_pblock roi
-set_property EXCLUDE_PLACEMENT 1 [get_pblocks roi]
-add_cells_to_pblock [get_pblocks roi] [get_cells roi]
-resize_pblock [get_pblocks roi] -add "$::env(XRAY_ROI)"
-
-set_property CFGBVS VCCO [current_design]
-set_property CONFIG_VOLTAGE 3.3 [current_design]
-set_property BITSTREAM.GENERAL.PERFRAMECRC YES [current_design]
-
-set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets clk_IBUF]
-
-place_design
-route_design
-
-write_checkpoint -force design.dcp
-write_bitstream -force design.bit
-
diff --git a/minitests/rom/top.v b/minitests/rom/top.v
deleted file mode 100644
index 8fb127ad..00000000
--- a/minitests/rom/top.v
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
-ROM128X1: 128-Deep by 1-Wide ROM
-ROM256X1: 256-Deep by 1-Wide ROM
-ROM32X1: 32-Deep by 1-Wide ROM
-ROM64X1: 64-Deep by 1-Wide ROM
-*/
-
-module top(input clk, stb, di, output do);
-	localparam integer DIN_N = 256;
-	localparam integer DOUT_N = 256;
-
-	reg [DIN_N-1:0] din;
-	wire [DOUT_N-1:0] dout;
-
-	reg [DIN_N-1:0] din_shr;
-	reg [DOUT_N-1:0] dout_shr;
-
-	always @(posedge clk) begin
-		din_shr <= {din_shr, di};
-		dout_shr <= {dout_shr, din_shr[DIN_N-1]};
-		if (stb) begin
-			din <= din_shr;
-			dout_shr <= dout;
-		end
-	end
-
-	assign do = dout_shr[DOUT_N-1];
-
-	roi roi (
-		.clk(clk),
-		.din(din),
-		.dout(dout)
-	);
-endmodule
-
-module roi(input clk, input [255:0] din, output [255:0] dout);
-    rom_ROM128X1 #(.LOC("XXX"))
-            rom_ROM128X1(.clk(clk), .din(din[  0 +: 8]), .dout(dout[  0 +: 8]));
-    rom_ROM256X1 #(.LOC("XXX"))
-            rom_ROM256X1(.clk(clk), .din(din[  8 +: 8]), .dout(dout[  8 +: 8]));
-    rom_ROM32X1 #(.LOC("XXX"))
-            rom_ROM32X1(.clk(clk), .din(din[  16 +: 8]), .dout(dout[  16 +: 8]));
-    rom_ROM64X1 #(.LOC("XXX"))
-            rom_ROM64X1(.clk(clk), .din(din[  32 +: 8]), .dout(dout[  32 +: 8]));
-endmodule
-
-//******************************************************************************
-//BOUTMUX tests
-
-/*
-Cell as SLICEM D6LUT + C6LUT + F7BMUX
-*/
-module rom_ROM128X1 (input clk, input [7:0] din, output [7:0] dout);
-    parameter LOC="SLICE_FIXME";
-
-    //ROM128X1 #(.LOC(LOC), .N(N))
-    ROM128X1 #(.INIT(128'b0))
-            rom(
-            .O(dout[0]),
-            .A0(din[0]),
-            .A1(din[1]),
-            .A2(din[2]),
-            .A3(din[3]),
-            .A4(din[4]),
-            .A5(din[5]),
-            .A6(din[6]));
-endmodule
-
-module rom_ROM256X1 (input clk, input [7:0] din, output [7:0] dout);
-    parameter LOC="SLICE_FIXME";
-
-    ROM256X1 #(.INIT(256'b0))
-            rom(
-            .O(dout[0]),
-            .A0(din[0]),
-            .A1(din[1]),
-            .A2(din[2]),
-            .A3(din[3]),
-            .A4(din[4]),
-            .A5(din[5]),
-            .A6(din[6]),
-            .A7(din[7]));
-endmodule
-
-module rom_ROM32X1 (input clk, input [7:0] din, output [7:0] dout);
-    parameter LOC="SLICE_FIXME";
-
-    ROM32X1 #(.INIT(32'b0))
-            rom(
-            .O(dout[0]),
-            .A0(din[0]),
-            .A1(din[1]),
-            .A2(din[2]),
-            .A3(din[3]),
-            .A4(din[4]));
-endmodule
-
-module rom_ROM64X1 (input clk, input [7:0] din, output [7:0] dout);
-    parameter LOC="SLICE_FIXME";
-
-    ROM64X1 #(.INIT(64'b0))
-            rom(
-            .O(dout[0]),
-            .A0(din[0]),
-            .A1(din[1]),
-            .A2(din[2]),
-            .A3(din[3]),
-            .A4(din[4]),
-            .A5(din[5]));
-endmodule
-
diff --git a/minitests/util/common.mk b/minitests/util/common.mk
new file mode 100644
index 00000000..07cce754
--- /dev/null
+++ b/minitests/util/common.mk
@@ -0,0 +1,8 @@
+all:
+	bash ../util/runme.sh
+
+clean:
+	rm -rf specimen_[0-9][0-9][0-9]/ seg_clblx.segbits vivado*.log vivado_*.str vivado*.jou design *.bits *.dcp *.bit design.txt .Xil
+
+.PHONY: all clean
+
diff --git a/minitests/util/runme.sh b/minitests/util/runme.sh
new file mode 100755
index 00000000..8abd5acf
--- /dev/null
+++ b/minitests/util/runme.sh
@@ -0,0 +1,8 @@
+#!/bin/bash
+
+set -ex
+vivado -mode batch -source ../util/runme.tcl
+${XRAY_BITREAD} -F $XRAY_ROI_FRAMES -o design.bits -z -y design.bit
+test -z "$(fgrep CRITICAL vivado.log)"
+${XRAY_SEGPRINT} -z -D design.bits  >design.txt
+
diff --git a/minitests/clb_bused/runme.tcl b/minitests/util/runme.tcl
similarity index 100%
rename from minitests/clb_bused/runme.tcl
rename to minitests/util/runme.tcl