diff --git a/fuzzers/035b-iob-iserdes/generate.py b/fuzzers/035b-iob-iserdes/generate.py
index cafc248c..e9bd198a 100644
--- a/fuzzers/035b-iob-iserdes/generate.py
+++ b/fuzzers/035b-iob-iserdes/generate.py
@@ -138,7 +138,8 @@ for param_list in data:
                         loc, "IFF.ZSRVAL_Q%d" % i, not params["SRVAL_Q%d" % i])
 
             if "IS_D_INVERTED" in params:
-                segmk.add_site_tag(loc, "ZINV_D", int(params["IS_D_INVERTED"] == 0))
+                segmk.add_site_tag(
+                    loc, "ZINV_D", int(params["IS_D_INVERTED"] == 0))
 
 #            if "IS_CLKB_INVERTED" in params:
 #                segmk.add_site_tag(
diff --git a/fuzzers/035b-iob-iserdes/top.py b/fuzzers/035b-iob-iserdes/top.py
index 526ba503..691d3f0f 100644
--- a/fuzzers/035b-iob-iserdes/top.py
+++ b/fuzzers/035b-iob-iserdes/top.py
@@ -85,7 +85,6 @@ def gen_iserdes(loc):
         "IS_CLKDIV_INVERTED": random.randint(0, 1),
         "IS_CLKB_INVERTED": random.randint(0, 1),
         "IS_CLK_INVERTED": random.randint(0, 1),
-
         "DYN_CLKDIV_INV_EN": verilog.quote(random.choice(["TRUE", "FALSE"])),
         "DYN_CLK_INV_EN": verilog.quote(random.choice(["TRUE", "FALSE"])),
         "IOBDELAY": verilog.quote(