From e8cd4018f9e723cb882dd9d439dc754a45e955a4 Mon Sep 17 00:00:00 2001 From: Hans Baier Date: Wed, 19 Mar 2025 05:55:31 +0700 Subject: [PATCH] fix k70t tilegrid.json --- kintex7/xc7k70t/tilegrid.json | 923 +++++++++++++++++++++++++++++----- 1 file changed, 808 insertions(+), 115 deletions(-) diff --git a/kintex7/xc7k70t/tilegrid.json b/kintex7/xc7k70t/tilegrid.json index 4a2e14d..ab54768 100644 --- a/kintex7/xc7k70t/tilegrid.json +++ b/kintex7/xc7k70t/tilegrid.json @@ -119555,8 +119555,8 @@ "CLB_IO_CLK": { "baseaddr": "0x00001280", "frames": 32, - "offset": 12, - "words": 6 + "offset": 0, + "words": 22 } }, "clock_region": "X1Y2", @@ -119583,8 +119583,8 @@ "CLB_IO_CLK": { "baseaddr": "0x00021280", "frames": 32, - "offset": 12, - "words": 6 + "offset": 0, + "words": 22 } }, "clock_region": "X1Y3", @@ -119611,8 +119611,8 @@ "CLB_IO_CLK": { "baseaddr": "0x00001280", "frames": 32, - "offset": 34, - "words": 6 + "offset": 22, + "words": 22 } }, "clock_region": "X1Y2", @@ -119639,8 +119639,8 @@ "CLB_IO_CLK": { "baseaddr": "0x00021280", "frames": 32, - "offset": 34, - "words": 6 + "offset": 22, + "words": 22 } }, "clock_region": "X1Y3", @@ -119667,8 +119667,8 @@ "CLB_IO_CLK": { "baseaddr": "0x00001280", "frames": 32, - "offset": 69, - "words": 6 + "offset": 57, + "words": 22 } }, "clock_region": "X1Y2", @@ -119695,8 +119695,8 @@ "CLB_IO_CLK": { "baseaddr": "0x00021280", "frames": 32, - "offset": 69, - "words": 6 + "offset": 57, + "words": 22 } }, "clock_region": "X1Y3", @@ -119723,8 +119723,8 @@ "CLB_IO_CLK": { "baseaddr": "0x00001280", "frames": 32, - "offset": 91, - "words": 6 + "offset": 79, + "words": 22 } }, "clock_region": "X1Y2", @@ -119751,8 +119751,8 @@ "CLB_IO_CLK": { "baseaddr": "0x00021280", "frames": 32, - "offset": 91, - "words": 6 + "offset": 79, + "words": 22 } }, "clock_region": "X1Y3", @@ -119835,7 +119835,14 @@ "type": "GTX_COMMON" }, "GTX_INT_INTERFACE_X37Y100": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": -2, + "words": 2 + } + }, "grid_x": 96, "grid_y": 103, "pin_functions": {}, @@ -119844,7 +119851,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y101": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 0, + "words": 2 + } + }, "grid_x": 96, "grid_y": 102, "pin_functions": {}, @@ -119853,7 +119867,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y102": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 2, + "words": 2 + } + }, "grid_x": 96, "grid_y": 101, "pin_functions": {}, @@ -119862,7 +119883,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y103": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 4, + "words": 2 + } + }, "grid_x": 96, "grid_y": 100, "pin_functions": {}, @@ -119871,7 +119899,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y104": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 6, + "words": 2 + } + }, "grid_x": 96, "grid_y": 99, "pin_functions": {}, @@ -119880,7 +119915,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y105": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 8, + "words": 2 + } + }, "grid_x": 96, "grid_y": 98, "pin_functions": {}, @@ -119889,7 +119931,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y106": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 10, + "words": 2 + } + }, "grid_x": 96, "grid_y": 97, "pin_functions": {}, @@ -119898,7 +119947,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y107": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 12, + "words": 2 + } + }, "grid_x": 96, "grid_y": 96, "pin_functions": {}, @@ -119907,7 +119963,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y108": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 14, + "words": 2 + } + }, "grid_x": 96, "grid_y": 95, "pin_functions": {}, @@ -119916,7 +119979,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y109": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 16, + "words": 2 + } + }, "grid_x": 96, "grid_y": 94, "pin_functions": {}, @@ -119925,7 +119995,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y110": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 18, + "words": 2 + } + }, "grid_x": 96, "grid_y": 93, "pin_functions": {}, @@ -119934,7 +120011,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y111": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 20, + "words": 2 + } + }, "grid_x": 96, "grid_y": 92, "pin_functions": {}, @@ -119943,7 +120027,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y112": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 22, + "words": 2 + } + }, "grid_x": 96, "grid_y": 91, "pin_functions": {}, @@ -119952,7 +120043,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y113": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 24, + "words": 2 + } + }, "grid_x": 96, "grid_y": 90, "pin_functions": {}, @@ -119961,7 +120059,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y114": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 26, + "words": 2 + } + }, "grid_x": 96, "grid_y": 89, "pin_functions": {}, @@ -119970,7 +120075,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y115": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 28, + "words": 2 + } + }, "grid_x": 96, "grid_y": 88, "pin_functions": {}, @@ -119979,7 +120091,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y116": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 30, + "words": 2 + } + }, "grid_x": 96, "grid_y": 87, "pin_functions": {}, @@ -119988,7 +120107,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y117": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 32, + "words": 2 + } + }, "grid_x": 96, "grid_y": 86, "pin_functions": {}, @@ -119997,7 +120123,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y118": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 34, + "words": 2 + } + }, "grid_x": 96, "grid_y": 85, "pin_functions": {}, @@ -120006,7 +120139,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y119": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 36, + "words": 2 + } + }, "grid_x": 96, "grid_y": 84, "pin_functions": {}, @@ -120015,7 +120155,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y120": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 38, + "words": 2 + } + }, "grid_x": 96, "grid_y": 83, "pin_functions": {}, @@ -120024,7 +120171,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y121": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 40, + "words": 2 + } + }, "grid_x": 96, "grid_y": 82, "pin_functions": {}, @@ -120033,7 +120187,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y122": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 42, + "words": 2 + } + }, "grid_x": 96, "grid_y": 81, "pin_functions": {}, @@ -120042,7 +120203,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y123": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 44, + "words": 2 + } + }, "grid_x": 96, "grid_y": 80, "pin_functions": {}, @@ -120051,7 +120219,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y124": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 46, + "words": 2 + } + }, "grid_x": 96, "grid_y": 79, "pin_functions": {}, @@ -120060,7 +120235,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y125": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 49, + "words": 2 + } + }, "grid_x": 96, "grid_y": 77, "pin_functions": {}, @@ -120085,7 +120267,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y127": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 53, + "words": 2 + } + }, "grid_x": 96, "grid_y": 75, "pin_functions": {}, @@ -120094,7 +120283,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y128": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 55, + "words": 2 + } + }, "grid_x": 96, "grid_y": 74, "pin_functions": {}, @@ -120103,7 +120299,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y129": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 57, + "words": 2 + } + }, "grid_x": 96, "grid_y": 73, "pin_functions": {}, @@ -120112,7 +120315,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y130": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 59, + "words": 2 + } + }, "grid_x": 96, "grid_y": 72, "pin_functions": {}, @@ -120121,7 +120331,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y131": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 61, + "words": 2 + } + }, "grid_x": 96, "grid_y": 71, "pin_functions": {}, @@ -120130,7 +120347,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y132": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 63, + "words": 2 + } + }, "grid_x": 96, "grid_y": 70, "pin_functions": {}, @@ -120139,7 +120363,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y133": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 65, + "words": 2 + } + }, "grid_x": 96, "grid_y": 69, "pin_functions": {}, @@ -120148,7 +120379,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y134": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 67, + "words": 2 + } + }, "grid_x": 96, "grid_y": 68, "pin_functions": {}, @@ -120157,7 +120395,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y135": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 69, + "words": 2 + } + }, "grid_x": 96, "grid_y": 67, "pin_functions": {}, @@ -120166,7 +120411,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y136": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 71, + "words": 2 + } + }, "grid_x": 96, "grid_y": 66, "pin_functions": {}, @@ -120175,7 +120427,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y137": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 73, + "words": 2 + } + }, "grid_x": 96, "grid_y": 65, "pin_functions": {}, @@ -120184,7 +120443,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y138": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 75, + "words": 2 + } + }, "grid_x": 96, "grid_y": 64, "pin_functions": {}, @@ -120193,7 +120459,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y139": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 77, + "words": 2 + } + }, "grid_x": 96, "grid_y": 63, "pin_functions": {}, @@ -120202,7 +120475,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y140": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 79, + "words": 2 + } + }, "grid_x": 96, "grid_y": 62, "pin_functions": {}, @@ -120211,7 +120491,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y141": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 81, + "words": 2 + } + }, "grid_x": 96, "grid_y": 61, "pin_functions": {}, @@ -120220,7 +120507,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y142": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 83, + "words": 2 + } + }, "grid_x": 96, "grid_y": 60, "pin_functions": {}, @@ -120229,7 +120523,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y143": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 85, + "words": 2 + } + }, "grid_x": 96, "grid_y": 59, "pin_functions": {}, @@ -120238,7 +120539,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y144": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 87, + "words": 2 + } + }, "grid_x": 96, "grid_y": 58, "pin_functions": {}, @@ -120247,7 +120555,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y145": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 89, + "words": 2 + } + }, "grid_x": 96, "grid_y": 57, "pin_functions": {}, @@ -120256,7 +120571,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y146": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 91, + "words": 2 + } + }, "grid_x": 96, "grid_y": 56, "pin_functions": {}, @@ -120265,7 +120587,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y147": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 93, + "words": 2 + } + }, "grid_x": 96, "grid_y": 55, "pin_functions": {}, @@ -120274,7 +120603,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y148": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 95, + "words": 2 + } + }, "grid_x": 96, "grid_y": 54, "pin_functions": {}, @@ -120283,7 +120619,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y149": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00001280", + "frames": 28, + "offset": 97, + "words": 2 + } + }, "grid_x": 96, "grid_y": 53, "pin_functions": {}, @@ -120292,7 +120635,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y150": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": -2, + "words": 2 + } + }, "grid_x": 96, "grid_y": 51, "pin_functions": {}, @@ -120301,7 +120651,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y151": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 0, + "words": 2 + } + }, "grid_x": 96, "grid_y": 50, "pin_functions": {}, @@ -120310,7 +120667,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y152": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 2, + "words": 2 + } + }, "grid_x": 96, "grid_y": 49, "pin_functions": {}, @@ -120319,7 +120683,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y153": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 4, + "words": 2 + } + }, "grid_x": 96, "grid_y": 48, "pin_functions": {}, @@ -120328,7 +120699,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y154": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 6, + "words": 2 + } + }, "grid_x": 96, "grid_y": 47, "pin_functions": {}, @@ -120337,7 +120715,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y155": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 8, + "words": 2 + } + }, "grid_x": 96, "grid_y": 46, "pin_functions": {}, @@ -120346,7 +120731,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y156": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 10, + "words": 2 + } + }, "grid_x": 96, "grid_y": 45, "pin_functions": {}, @@ -120355,7 +120747,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y157": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 12, + "words": 2 + } + }, "grid_x": 96, "grid_y": 44, "pin_functions": {}, @@ -120364,7 +120763,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y158": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 14, + "words": 2 + } + }, "grid_x": 96, "grid_y": 43, "pin_functions": {}, @@ -120373,7 +120779,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y159": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 16, + "words": 2 + } + }, "grid_x": 96, "grid_y": 42, "pin_functions": {}, @@ -120382,7 +120795,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y160": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 18, + "words": 2 + } + }, "grid_x": 96, "grid_y": 41, "pin_functions": {}, @@ -120391,7 +120811,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y161": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 20, + "words": 2 + } + }, "grid_x": 96, "grid_y": 40, "pin_functions": {}, @@ -120400,7 +120827,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y162": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 22, + "words": 2 + } + }, "grid_x": 96, "grid_y": 39, "pin_functions": {}, @@ -120409,7 +120843,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y163": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 24, + "words": 2 + } + }, "grid_x": 96, "grid_y": 38, "pin_functions": {}, @@ -120418,7 +120859,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y164": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 26, + "words": 2 + } + }, "grid_x": 96, "grid_y": 37, "pin_functions": {}, @@ -120427,7 +120875,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y165": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 28, + "words": 2 + } + }, "grid_x": 96, "grid_y": 36, "pin_functions": {}, @@ -120436,7 +120891,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y166": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 30, + "words": 2 + } + }, "grid_x": 96, "grid_y": 35, "pin_functions": {}, @@ -120445,7 +120907,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y167": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 32, + "words": 2 + } + }, "grid_x": 96, "grid_y": 34, "pin_functions": {}, @@ -120454,7 +120923,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y168": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 34, + "words": 2 + } + }, "grid_x": 96, "grid_y": 33, "pin_functions": {}, @@ -120463,7 +120939,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y169": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 36, + "words": 2 + } + }, "grid_x": 96, "grid_y": 32, "pin_functions": {}, @@ -120472,7 +120955,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y170": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 38, + "words": 2 + } + }, "grid_x": 96, "grid_y": 31, "pin_functions": {}, @@ -120481,7 +120971,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y171": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 40, + "words": 2 + } + }, "grid_x": 96, "grid_y": 30, "pin_functions": {}, @@ -120490,7 +120987,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y172": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 42, + "words": 2 + } + }, "grid_x": 96, "grid_y": 29, "pin_functions": {}, @@ -120499,7 +121003,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y173": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 44, + "words": 2 + } + }, "grid_x": 96, "grid_y": 28, "pin_functions": {}, @@ -120508,7 +121019,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y174": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 46, + "words": 2 + } + }, "grid_x": 96, "grid_y": 27, "pin_functions": {}, @@ -120517,7 +121035,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y175": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 49, + "words": 2 + } + }, "grid_x": 96, "grid_y": 25, "pin_functions": {}, @@ -120542,7 +121067,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y177": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 53, + "words": 2 + } + }, "grid_x": 96, "grid_y": 23, "pin_functions": {}, @@ -120551,7 +121083,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y178": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 55, + "words": 2 + } + }, "grid_x": 96, "grid_y": 22, "pin_functions": {}, @@ -120560,7 +121099,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y179": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 57, + "words": 2 + } + }, "grid_x": 96, "grid_y": 21, "pin_functions": {}, @@ -120569,7 +121115,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y180": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 59, + "words": 2 + } + }, "grid_x": 96, "grid_y": 20, "pin_functions": {}, @@ -120578,7 +121131,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y181": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 61, + "words": 2 + } + }, "grid_x": 96, "grid_y": 19, "pin_functions": {}, @@ -120587,7 +121147,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y182": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 63, + "words": 2 + } + }, "grid_x": 96, "grid_y": 18, "pin_functions": {}, @@ -120596,7 +121163,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y183": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 65, + "words": 2 + } + }, "grid_x": 96, "grid_y": 17, "pin_functions": {}, @@ -120605,7 +121179,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y184": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 67, + "words": 2 + } + }, "grid_x": 96, "grid_y": 16, "pin_functions": {}, @@ -120614,7 +121195,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y185": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 69, + "words": 2 + } + }, "grid_x": 96, "grid_y": 15, "pin_functions": {}, @@ -120623,7 +121211,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y186": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 71, + "words": 2 + } + }, "grid_x": 96, "grid_y": 14, "pin_functions": {}, @@ -120632,7 +121227,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y187": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 73, + "words": 2 + } + }, "grid_x": 96, "grid_y": 13, "pin_functions": {}, @@ -120641,7 +121243,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y188": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 75, + "words": 2 + } + }, "grid_x": 96, "grid_y": 12, "pin_functions": {}, @@ -120650,7 +121259,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y189": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 77, + "words": 2 + } + }, "grid_x": 96, "grid_y": 11, "pin_functions": {}, @@ -120659,7 +121275,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y190": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 79, + "words": 2 + } + }, "grid_x": 96, "grid_y": 10, "pin_functions": {}, @@ -120668,7 +121291,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y191": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 81, + "words": 2 + } + }, "grid_x": 96, "grid_y": 9, "pin_functions": {}, @@ -120677,7 +121307,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y192": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 83, + "words": 2 + } + }, "grid_x": 96, "grid_y": 8, "pin_functions": {}, @@ -120686,7 +121323,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y193": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 85, + "words": 2 + } + }, "grid_x": 96, "grid_y": 7, "pin_functions": {}, @@ -120695,7 +121339,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y194": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 87, + "words": 2 + } + }, "grid_x": 96, "grid_y": 6, "pin_functions": {}, @@ -120704,7 +121355,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y195": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 89, + "words": 2 + } + }, "grid_x": 96, "grid_y": 5, "pin_functions": {}, @@ -120713,7 +121371,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y196": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 91, + "words": 2 + } + }, "grid_x": 96, "grid_y": 4, "pin_functions": {}, @@ -120722,7 +121387,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y197": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 93, + "words": 2 + } + }, "grid_x": 96, "grid_y": 3, "pin_functions": {}, @@ -120731,7 +121403,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y198": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 95, + "words": 2 + } + }, "grid_x": 96, "grid_y": 2, "pin_functions": {}, @@ -120740,7 +121419,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X37Y199": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00021280", + "frames": 28, + "offset": 97, + "words": 2 + } + }, "grid_x": 96, "grid_y": 1, "pin_functions": {}, @@ -340640,7 +341326,14 @@ "type": "RIOI" }, "RIOI_X43Y9": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00421580", + "frames": 42, + "offset": 18, + "words": 4 + } + }, "clock_region": "X1Y0", "grid_x": 115, "grid_y": 198,