diff --git a/kintex7/xc7k325t/tilegrid.json b/kintex7/xc7k325t/tilegrid.json index 1b1ebf1..c153faa 100644 --- a/kintex7/xc7k325t/tilegrid.json +++ b/kintex7/xc7k325t/tilegrid.json @@ -565160,7 +565160,14 @@ "type": "DSP_R" }, "GTX_CHANNEL_0_X219Y162": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 32, + "offset": 0, + "words": 22 + } + }, "clock_region": "X1Y3", "grid_x": 219, "grid_y": 202, @@ -565181,7 +565188,14 @@ "type": "GTX_CHANNEL_0" }, "GTX_CHANNEL_0_X219Y214": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 32, + "offset": 0, + "words": 22 + } + }, "clock_region": "X1Y4", "grid_x": 219, "grid_y": 150, @@ -565202,7 +565216,14 @@ "type": "GTX_CHANNEL_0" }, "GTX_CHANNEL_0_X219Y266": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 32, + "offset": 0, + "words": 22 + } + }, "clock_region": "X1Y5", "grid_x": 219, "grid_y": 98, @@ -565223,7 +565244,14 @@ "type": "GTX_CHANNEL_0" }, "GTX_CHANNEL_0_X219Y318": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 32, + "offset": 0, + "words": 22 + } + }, "clock_region": "X1Y6", "grid_x": 219, "grid_y": 46, @@ -565244,7 +565272,14 @@ "type": "GTX_CHANNEL_0" }, "GTX_CHANNEL_1_X219Y173": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 32, + "offset": 22, + "words": 22 + } + }, "clock_region": "X1Y3", "grid_x": 219, "grid_y": 191, @@ -565265,7 +565300,14 @@ "type": "GTX_CHANNEL_1" }, "GTX_CHANNEL_1_X219Y225": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 32, + "offset": 22, + "words": 22 + } + }, "clock_region": "X1Y4", "grid_x": 219, "grid_y": 139, @@ -565286,7 +565328,14 @@ "type": "GTX_CHANNEL_1" }, "GTX_CHANNEL_1_X219Y277": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 32, + "offset": 22, + "words": 22 + } + }, "clock_region": "X1Y5", "grid_x": 219, "grid_y": 87, @@ -565307,7 +565356,14 @@ "type": "GTX_CHANNEL_1" }, "GTX_CHANNEL_1_X219Y329": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 32, + "offset": 22, + "words": 22 + } + }, "clock_region": "X1Y6", "grid_x": 219, "grid_y": 35, @@ -565328,7 +565384,14 @@ "type": "GTX_CHANNEL_1" }, "GTX_CHANNEL_2_X219Y191": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 32, + "offset": 57, + "words": 22 + } + }, "clock_region": "X1Y3", "grid_x": 219, "grid_y": 173, @@ -565349,7 +565412,14 @@ "type": "GTX_CHANNEL_2" }, "GTX_CHANNEL_2_X219Y243": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 32, + "offset": 57, + "words": 22 + } + }, "clock_region": "X1Y4", "grid_x": 219, "grid_y": 121, @@ -565370,7 +565440,14 @@ "type": "GTX_CHANNEL_2" }, "GTX_CHANNEL_2_X219Y295": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 32, + "offset": 57, + "words": 22 + } + }, "clock_region": "X1Y5", "grid_x": 219, "grid_y": 69, @@ -565391,7 +565468,14 @@ "type": "GTX_CHANNEL_2" }, "GTX_CHANNEL_2_X219Y347": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 32, + "offset": 57, + "words": 22 + } + }, "clock_region": "X1Y6", "grid_x": 219, "grid_y": 17, @@ -565412,7 +565496,14 @@ "type": "GTX_CHANNEL_2" }, "GTX_CHANNEL_3_X219Y202": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 32, + "offset": 79, + "words": 22 + } + }, "clock_region": "X1Y3", "grid_x": 219, "grid_y": 162, @@ -565433,7 +565524,14 @@ "type": "GTX_CHANNEL_3" }, "GTX_CHANNEL_3_X219Y254": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 32, + "offset": 79, + "words": 22 + } + }, "clock_region": "X1Y4", "grid_x": 219, "grid_y": 110, @@ -565454,7 +565552,14 @@ "type": "GTX_CHANNEL_3" }, "GTX_CHANNEL_3_X219Y306": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 32, + "offset": 79, + "words": 22 + } + }, "clock_region": "X1Y5", "grid_x": 219, "grid_y": 58, @@ -565475,7 +565580,14 @@ "type": "GTX_CHANNEL_3" }, "GTX_CHANNEL_3_X219Y358": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 32, + "offset": 79, + "words": 22 + } + }, "clock_region": "X1Y6", "grid_x": 219, "grid_y": 6, @@ -565496,7 +565608,14 @@ "type": "GTX_CHANNEL_3" }, "GTX_COMMON_X219Y179": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 32, + "offset": 0, + "words": 101 + } + }, "clock_region": "X1Y3", "grid_x": 219, "grid_y": 185, @@ -565519,7 +565638,14 @@ "type": "GTX_COMMON" }, "GTX_COMMON_X219Y231": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 32, + "offset": 0, + "words": 101 + } + }, "clock_region": "X1Y4", "grid_x": 219, "grid_y": 133, @@ -565542,7 +565668,14 @@ "type": "GTX_COMMON" }, "GTX_COMMON_X219Y283": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 32, + "offset": 0, + "words": 101 + } + }, "clock_region": "X1Y5", "grid_x": 219, "grid_y": 81, @@ -565565,7 +565698,14 @@ "type": "GTX_COMMON" }, "GTX_COMMON_X219Y335": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 32, + "offset": 0, + "words": 101 + } + }, "clock_region": "X1Y6", "grid_x": 219, "grid_y": 29, @@ -565588,7 +565728,14 @@ "type": "GTX_COMMON" }, "GTX_INT_INTERFACE_X89Y150": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": -2, + "words": 2 + } + }, "grid_x": 216, "grid_y": 207, "pin_functions": {}, @@ -565597,7 +565744,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y151": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, "grid_x": 216, "grid_y": 206, "pin_functions": {}, @@ -565606,7 +565760,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y152": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, "grid_x": 216, "grid_y": 205, "pin_functions": {}, @@ -565615,7 +565776,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y153": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, "grid_x": 216, "grid_y": 204, "pin_functions": {}, @@ -565624,7 +565792,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y154": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, "grid_x": 216, "grid_y": 203, "pin_functions": {}, @@ -565633,7 +565808,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y155": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, "grid_x": 216, "grid_y": 202, "pin_functions": {}, @@ -565642,7 +565824,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y156": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, "grid_x": 216, "grid_y": 201, "pin_functions": {}, @@ -565651,7 +565840,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y157": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, "grid_x": 216, "grid_y": 200, "pin_functions": {}, @@ -565660,7 +565856,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y158": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, "grid_x": 216, "grid_y": 199, "pin_functions": {}, @@ -565669,7 +565872,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y159": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, "grid_x": 216, "grid_y": 198, "pin_functions": {}, @@ -565678,7 +565888,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y160": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, "grid_x": 216, "grid_y": 197, "pin_functions": {}, @@ -565687,7 +565904,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y161": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, "grid_x": 216, "grid_y": 196, "pin_functions": {}, @@ -565696,7 +565920,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y162": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, "grid_x": 216, "grid_y": 195, "pin_functions": {}, @@ -565705,7 +565936,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y163": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, "grid_x": 216, "grid_y": 194, "pin_functions": {}, @@ -565714,7 +565952,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y164": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, "grid_x": 216, "grid_y": 193, "pin_functions": {}, @@ -565723,7 +565968,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y165": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, "grid_x": 216, "grid_y": 192, "pin_functions": {}, @@ -565732,7 +565984,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y166": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, "grid_x": 216, "grid_y": 191, "pin_functions": {}, @@ -565741,7 +566000,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y167": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, "grid_x": 216, "grid_y": 190, "pin_functions": {}, @@ -565750,7 +566016,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y168": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, "grid_x": 216, "grid_y": 189, "pin_functions": {}, @@ -565759,7 +566032,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y169": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, "grid_x": 216, "grid_y": 188, "pin_functions": {}, @@ -565768,7 +566048,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y170": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, "grid_x": 216, "grid_y": 187, "pin_functions": {}, @@ -565777,7 +566064,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y171": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, "grid_x": 216, "grid_y": 186, "pin_functions": {}, @@ -565786,7 +566080,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y172": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, "grid_x": 216, "grid_y": 185, "pin_functions": {}, @@ -565795,7 +566096,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y173": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, "grid_x": 216, "grid_y": 184, "pin_functions": {}, @@ -565804,7 +566112,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y174": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, "grid_x": 216, "grid_y": 183, "pin_functions": {}, @@ -565813,7 +566128,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y175": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 49, + "words": 2 + } + }, "grid_x": 216, "grid_y": 181, "pin_functions": {}, @@ -565822,7 +566144,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y176": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, "grid_x": 216, "grid_y": 180, "pin_functions": {}, @@ -565831,7 +566160,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y177": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, "grid_x": 216, "grid_y": 179, "pin_functions": {}, @@ -565840,7 +566176,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y178": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, "grid_x": 216, "grid_y": 178, "pin_functions": {}, @@ -565849,7 +566192,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y179": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, "grid_x": 216, "grid_y": 177, "pin_functions": {}, @@ -565858,7 +566208,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y180": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, "grid_x": 216, "grid_y": 176, "pin_functions": {}, @@ -565867,7 +566224,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y181": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, "grid_x": 216, "grid_y": 175, "pin_functions": {}, @@ -565876,7 +566240,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y182": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, "grid_x": 216, "grid_y": 174, "pin_functions": {}, @@ -565885,7 +566256,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y183": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, "grid_x": 216, "grid_y": 173, "pin_functions": {}, @@ -565894,7 +566272,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y184": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, "grid_x": 216, "grid_y": 172, "pin_functions": {}, @@ -565903,7 +566288,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y185": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, "grid_x": 216, "grid_y": 171, "pin_functions": {}, @@ -565912,7 +566304,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y186": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, "grid_x": 216, "grid_y": 170, "pin_functions": {}, @@ -565921,7 +566320,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y187": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, "grid_x": 216, "grid_y": 169, "pin_functions": {}, @@ -565930,7 +566336,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y188": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, "grid_x": 216, "grid_y": 168, "pin_functions": {}, @@ -565939,7 +566352,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y189": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, "grid_x": 216, "grid_y": 167, "pin_functions": {}, @@ -565948,7 +566368,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y190": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, "grid_x": 216, "grid_y": 166, "pin_functions": {}, @@ -565957,7 +566384,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y191": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, "grid_x": 216, "grid_y": 165, "pin_functions": {}, @@ -565966,7 +566400,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y192": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, "grid_x": 216, "grid_y": 164, "pin_functions": {}, @@ -565975,7 +566416,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y193": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, "grid_x": 216, "grid_y": 163, "pin_functions": {}, @@ -565984,7 +566432,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y194": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, "grid_x": 216, "grid_y": 162, "pin_functions": {}, @@ -565993,7 +566448,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y195": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, "grid_x": 216, "grid_y": 161, "pin_functions": {}, @@ -566002,7 +566464,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y196": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, "grid_x": 216, "grid_y": 160, "pin_functions": {}, @@ -566011,7 +566480,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y197": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, "grid_x": 216, "grid_y": 159, "pin_functions": {}, @@ -566020,7 +566496,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y198": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, "grid_x": 216, "grid_y": 158, "pin_functions": {}, @@ -566029,7 +566512,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y199": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00002C80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, "grid_x": 216, "grid_y": 157, "pin_functions": {}, @@ -566038,7 +566528,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y200": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": -2, + "words": 2 + } + }, "grid_x": 216, "grid_y": 155, "pin_functions": {}, @@ -566047,7 +566544,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y201": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, "grid_x": 216, "grid_y": 154, "pin_functions": {}, @@ -566056,7 +566560,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y202": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, "grid_x": 216, "grid_y": 153, "pin_functions": {}, @@ -566065,7 +566576,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y203": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, "grid_x": 216, "grid_y": 152, "pin_functions": {}, @@ -566074,7 +566592,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y204": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, "grid_x": 216, "grid_y": 151, "pin_functions": {}, @@ -566083,7 +566608,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y205": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, "grid_x": 216, "grid_y": 150, "pin_functions": {}, @@ -566092,7 +566624,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y206": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, "grid_x": 216, "grid_y": 149, "pin_functions": {}, @@ -566101,7 +566640,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y207": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, "grid_x": 216, "grid_y": 148, "pin_functions": {}, @@ -566110,7 +566656,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y208": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, "grid_x": 216, "grid_y": 147, "pin_functions": {}, @@ -566119,7 +566672,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y209": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, "grid_x": 216, "grid_y": 146, "pin_functions": {}, @@ -566128,7 +566688,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y210": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, "grid_x": 216, "grid_y": 145, "pin_functions": {}, @@ -566137,7 +566704,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y211": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, "grid_x": 216, "grid_y": 144, "pin_functions": {}, @@ -566146,7 +566720,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y212": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, "grid_x": 216, "grid_y": 143, "pin_functions": {}, @@ -566155,7 +566736,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y213": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, "grid_x": 216, "grid_y": 142, "pin_functions": {}, @@ -566164,7 +566752,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y214": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, "grid_x": 216, "grid_y": 141, "pin_functions": {}, @@ -566173,7 +566768,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y215": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, "grid_x": 216, "grid_y": 140, "pin_functions": {}, @@ -566182,7 +566784,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y216": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, "grid_x": 216, "grid_y": 139, "pin_functions": {}, @@ -566191,7 +566800,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y217": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, "grid_x": 216, "grid_y": 138, "pin_functions": {}, @@ -566200,7 +566816,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y218": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, "grid_x": 216, "grid_y": 137, "pin_functions": {}, @@ -566209,7 +566832,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y219": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, "grid_x": 216, "grid_y": 136, "pin_functions": {}, @@ -566218,7 +566848,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y220": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, "grid_x": 216, "grid_y": 135, "pin_functions": {}, @@ -566227,7 +566864,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y221": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, "grid_x": 216, "grid_y": 134, "pin_functions": {}, @@ -566236,7 +566880,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y222": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, "grid_x": 216, "grid_y": 133, "pin_functions": {}, @@ -566245,7 +566896,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y223": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, "grid_x": 216, "grid_y": 132, "pin_functions": {}, @@ -566254,7 +566912,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y224": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, "grid_x": 216, "grid_y": 131, "pin_functions": {}, @@ -566263,7 +566928,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y225": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 49, + "words": 2 + } + }, "grid_x": 216, "grid_y": 129, "pin_functions": {}, @@ -566272,7 +566944,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y226": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, "grid_x": 216, "grid_y": 128, "pin_functions": {}, @@ -566281,7 +566960,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y227": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, "grid_x": 216, "grid_y": 127, "pin_functions": {}, @@ -566290,7 +566976,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y228": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, "grid_x": 216, "grid_y": 126, "pin_functions": {}, @@ -566299,7 +566992,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y229": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, "grid_x": 216, "grid_y": 125, "pin_functions": {}, @@ -566308,7 +567008,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y230": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, "grid_x": 216, "grid_y": 124, "pin_functions": {}, @@ -566317,7 +567024,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y231": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, "grid_x": 216, "grid_y": 123, "pin_functions": {}, @@ -566326,7 +567040,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y232": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, "grid_x": 216, "grid_y": 122, "pin_functions": {}, @@ -566335,7 +567056,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y233": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, "grid_x": 216, "grid_y": 121, "pin_functions": {}, @@ -566344,7 +567072,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y234": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, "grid_x": 216, "grid_y": 120, "pin_functions": {}, @@ -566353,7 +567088,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y235": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, "grid_x": 216, "grid_y": 119, "pin_functions": {}, @@ -566362,7 +567104,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y236": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, "grid_x": 216, "grid_y": 118, "pin_functions": {}, @@ -566371,7 +567120,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y237": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, "grid_x": 216, "grid_y": 117, "pin_functions": {}, @@ -566380,7 +567136,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y238": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, "grid_x": 216, "grid_y": 116, "pin_functions": {}, @@ -566389,7 +567152,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y239": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, "grid_x": 216, "grid_y": 115, "pin_functions": {}, @@ -566398,7 +567168,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y240": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, "grid_x": 216, "grid_y": 114, "pin_functions": {}, @@ -566407,7 +567184,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y241": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, "grid_x": 216, "grid_y": 113, "pin_functions": {}, @@ -566416,7 +567200,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y242": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, "grid_x": 216, "grid_y": 112, "pin_functions": {}, @@ -566425,7 +567216,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y243": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, "grid_x": 216, "grid_y": 111, "pin_functions": {}, @@ -566434,7 +567232,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y244": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, "grid_x": 216, "grid_y": 110, "pin_functions": {}, @@ -566443,7 +567248,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y245": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, "grid_x": 216, "grid_y": 109, "pin_functions": {}, @@ -566452,7 +567264,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y246": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, "grid_x": 216, "grid_y": 108, "pin_functions": {}, @@ -566461,7 +567280,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y247": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, "grid_x": 216, "grid_y": 107, "pin_functions": {}, @@ -566470,7 +567296,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y248": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, "grid_x": 216, "grid_y": 106, "pin_functions": {}, @@ -566479,7 +567312,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y249": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00022C80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, "grid_x": 216, "grid_y": 105, "pin_functions": {}, @@ -566488,7 +567328,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y250": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": -2, + "words": 2 + } + }, "grid_x": 216, "grid_y": 103, "pin_functions": {}, @@ -566497,7 +567344,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y251": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, "grid_x": 216, "grid_y": 102, "pin_functions": {}, @@ -566506,7 +567360,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y252": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, "grid_x": 216, "grid_y": 101, "pin_functions": {}, @@ -566515,7 +567376,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y253": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, "grid_x": 216, "grid_y": 100, "pin_functions": {}, @@ -566524,7 +567392,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y254": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, "grid_x": 216, "grid_y": 99, "pin_functions": {}, @@ -566533,7 +567408,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y255": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, "grid_x": 216, "grid_y": 98, "pin_functions": {}, @@ -566542,7 +567424,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y256": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, "grid_x": 216, "grid_y": 97, "pin_functions": {}, @@ -566551,7 +567440,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y257": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, "grid_x": 216, "grid_y": 96, "pin_functions": {}, @@ -566560,7 +567456,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y258": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, "grid_x": 216, "grid_y": 95, "pin_functions": {}, @@ -566569,7 +567472,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y259": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, "grid_x": 216, "grid_y": 94, "pin_functions": {}, @@ -566578,7 +567488,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y260": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, "grid_x": 216, "grid_y": 93, "pin_functions": {}, @@ -566587,7 +567504,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y261": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, "grid_x": 216, "grid_y": 92, "pin_functions": {}, @@ -566596,7 +567520,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y262": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, "grid_x": 216, "grid_y": 91, "pin_functions": {}, @@ -566605,7 +567536,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y263": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, "grid_x": 216, "grid_y": 90, "pin_functions": {}, @@ -566614,7 +567552,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y264": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, "grid_x": 216, "grid_y": 89, "pin_functions": {}, @@ -566623,7 +567568,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y265": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, "grid_x": 216, "grid_y": 88, "pin_functions": {}, @@ -566632,7 +567584,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y266": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, "grid_x": 216, "grid_y": 87, "pin_functions": {}, @@ -566641,7 +567600,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y267": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, "grid_x": 216, "grid_y": 86, "pin_functions": {}, @@ -566650,7 +567616,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y268": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, "grid_x": 216, "grid_y": 85, "pin_functions": {}, @@ -566659,7 +567632,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y269": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, "grid_x": 216, "grid_y": 84, "pin_functions": {}, @@ -566668,7 +567648,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y270": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, "grid_x": 216, "grid_y": 83, "pin_functions": {}, @@ -566677,7 +567664,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y271": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, "grid_x": 216, "grid_y": 82, "pin_functions": {}, @@ -566686,7 +567680,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y272": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, "grid_x": 216, "grid_y": 81, "pin_functions": {}, @@ -566695,7 +567696,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y273": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, "grid_x": 216, "grid_y": 80, "pin_functions": {}, @@ -566704,7 +567712,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y274": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, "grid_x": 216, "grid_y": 79, "pin_functions": {}, @@ -566713,7 +567728,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y275": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 49, + "words": 2 + } + }, "grid_x": 216, "grid_y": 77, "pin_functions": {}, @@ -566722,7 +567744,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y276": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, "grid_x": 216, "grid_y": 76, "pin_functions": {}, @@ -566731,7 +567760,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y277": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, "grid_x": 216, "grid_y": 75, "pin_functions": {}, @@ -566740,7 +567776,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y278": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, "grid_x": 216, "grid_y": 74, "pin_functions": {}, @@ -566749,7 +567792,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y279": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, "grid_x": 216, "grid_y": 73, "pin_functions": {}, @@ -566758,7 +567808,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y280": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, "grid_x": 216, "grid_y": 72, "pin_functions": {}, @@ -566767,7 +567824,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y281": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, "grid_x": 216, "grid_y": 71, "pin_functions": {}, @@ -566776,7 +567840,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y282": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, "grid_x": 216, "grid_y": 70, "pin_functions": {}, @@ -566785,7 +567856,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y283": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, "grid_x": 216, "grid_y": 69, "pin_functions": {}, @@ -566794,7 +567872,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y284": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, "grid_x": 216, "grid_y": 68, "pin_functions": {}, @@ -566803,7 +567888,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y285": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, "grid_x": 216, "grid_y": 67, "pin_functions": {}, @@ -566812,7 +567904,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y286": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, "grid_x": 216, "grid_y": 66, "pin_functions": {}, @@ -566821,7 +567920,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y287": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, "grid_x": 216, "grid_y": 65, "pin_functions": {}, @@ -566830,7 +567936,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y288": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, "grid_x": 216, "grid_y": 64, "pin_functions": {}, @@ -566839,7 +567952,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y289": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, "grid_x": 216, "grid_y": 63, "pin_functions": {}, @@ -566848,7 +567968,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y290": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, "grid_x": 216, "grid_y": 62, "pin_functions": {}, @@ -566857,7 +567984,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y291": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, "grid_x": 216, "grid_y": 61, "pin_functions": {}, @@ -566866,7 +568000,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y292": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, "grid_x": 216, "grid_y": 60, "pin_functions": {}, @@ -566875,7 +568016,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y293": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, "grid_x": 216, "grid_y": 59, "pin_functions": {}, @@ -566884,7 +568032,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y294": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, "grid_x": 216, "grid_y": 58, "pin_functions": {}, @@ -566893,7 +568048,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y295": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, "grid_x": 216, "grid_y": 57, "pin_functions": {}, @@ -566902,7 +568064,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y296": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, "grid_x": 216, "grid_y": 56, "pin_functions": {}, @@ -566911,7 +568080,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y297": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, "grid_x": 216, "grid_y": 55, "pin_functions": {}, @@ -566920,7 +568096,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y298": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, "grid_x": 216, "grid_y": 54, "pin_functions": {}, @@ -566929,7 +568112,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y299": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00042C80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, "grid_x": 216, "grid_y": 53, "pin_functions": {}, @@ -566938,7 +568128,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y300": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": -2, + "words": 2 + } + }, "grid_x": 216, "grid_y": 51, "pin_functions": {}, @@ -566947,7 +568144,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y301": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 0, + "words": 2 + } + }, "grid_x": 216, "grid_y": 50, "pin_functions": {}, @@ -566956,7 +568160,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y302": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 2, + "words": 2 + } + }, "grid_x": 216, "grid_y": 49, "pin_functions": {}, @@ -566965,7 +568176,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y303": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 4, + "words": 2 + } + }, "grid_x": 216, "grid_y": 48, "pin_functions": {}, @@ -566974,7 +568192,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y304": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 6, + "words": 2 + } + }, "grid_x": 216, "grid_y": 47, "pin_functions": {}, @@ -566983,7 +568208,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y305": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 8, + "words": 2 + } + }, "grid_x": 216, "grid_y": 46, "pin_functions": {}, @@ -566992,7 +568224,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y306": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 10, + "words": 2 + } + }, "grid_x": 216, "grid_y": 45, "pin_functions": {}, @@ -567001,7 +568240,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y307": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 12, + "words": 2 + } + }, "grid_x": 216, "grid_y": 44, "pin_functions": {}, @@ -567010,7 +568256,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y308": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 14, + "words": 2 + } + }, "grid_x": 216, "grid_y": 43, "pin_functions": {}, @@ -567019,7 +568272,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y309": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 16, + "words": 2 + } + }, "grid_x": 216, "grid_y": 42, "pin_functions": {}, @@ -567028,7 +568288,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y310": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 18, + "words": 2 + } + }, "grid_x": 216, "grid_y": 41, "pin_functions": {}, @@ -567037,7 +568304,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y311": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 20, + "words": 2 + } + }, "grid_x": 216, "grid_y": 40, "pin_functions": {}, @@ -567046,7 +568320,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y312": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 22, + "words": 2 + } + }, "grid_x": 216, "grid_y": 39, "pin_functions": {}, @@ -567055,7 +568336,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y313": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 24, + "words": 2 + } + }, "grid_x": 216, "grid_y": 38, "pin_functions": {}, @@ -567064,7 +568352,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y314": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 26, + "words": 2 + } + }, "grid_x": 216, "grid_y": 37, "pin_functions": {}, @@ -567073,7 +568368,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y315": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 28, + "words": 2 + } + }, "grid_x": 216, "grid_y": 36, "pin_functions": {}, @@ -567082,7 +568384,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y316": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 30, + "words": 2 + } + }, "grid_x": 216, "grid_y": 35, "pin_functions": {}, @@ -567091,7 +568400,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y317": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 32, + "words": 2 + } + }, "grid_x": 216, "grid_y": 34, "pin_functions": {}, @@ -567100,7 +568416,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y318": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 34, + "words": 2 + } + }, "grid_x": 216, "grid_y": 33, "pin_functions": {}, @@ -567109,7 +568432,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y319": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 36, + "words": 2 + } + }, "grid_x": 216, "grid_y": 32, "pin_functions": {}, @@ -567118,7 +568448,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y320": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 38, + "words": 2 + } + }, "grid_x": 216, "grid_y": 31, "pin_functions": {}, @@ -567127,7 +568464,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y321": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 40, + "words": 2 + } + }, "grid_x": 216, "grid_y": 30, "pin_functions": {}, @@ -567136,7 +568480,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y322": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 42, + "words": 2 + } + }, "grid_x": 216, "grid_y": 29, "pin_functions": {}, @@ -567145,7 +568496,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y323": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 44, + "words": 2 + } + }, "grid_x": 216, "grid_y": 28, "pin_functions": {}, @@ -567154,7 +568512,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y324": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 46, + "words": 2 + } + }, "grid_x": 216, "grid_y": 27, "pin_functions": {}, @@ -567163,7 +568528,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y325": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 49, + "words": 2 + } + }, "grid_x": 216, "grid_y": 25, "pin_functions": {}, @@ -567172,7 +568544,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y326": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 51, + "words": 2 + } + }, "grid_x": 216, "grid_y": 24, "pin_functions": {}, @@ -567181,7 +568560,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y327": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 53, + "words": 2 + } + }, "grid_x": 216, "grid_y": 23, "pin_functions": {}, @@ -567190,7 +568576,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y328": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 55, + "words": 2 + } + }, "grid_x": 216, "grid_y": 22, "pin_functions": {}, @@ -567199,7 +568592,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y329": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 57, + "words": 2 + } + }, "grid_x": 216, "grid_y": 21, "pin_functions": {}, @@ -567208,7 +568608,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y330": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 59, + "words": 2 + } + }, "grid_x": 216, "grid_y": 20, "pin_functions": {}, @@ -567217,7 +568624,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y331": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 61, + "words": 2 + } + }, "grid_x": 216, "grid_y": 19, "pin_functions": {}, @@ -567226,7 +568640,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y332": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 63, + "words": 2 + } + }, "grid_x": 216, "grid_y": 18, "pin_functions": {}, @@ -567235,7 +568656,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y333": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 65, + "words": 2 + } + }, "grid_x": 216, "grid_y": 17, "pin_functions": {}, @@ -567244,7 +568672,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y334": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 67, + "words": 2 + } + }, "grid_x": 216, "grid_y": 16, "pin_functions": {}, @@ -567253,7 +568688,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y335": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 69, + "words": 2 + } + }, "grid_x": 216, "grid_y": 15, "pin_functions": {}, @@ -567262,7 +568704,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y336": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 71, + "words": 2 + } + }, "grid_x": 216, "grid_y": 14, "pin_functions": {}, @@ -567271,7 +568720,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y337": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 73, + "words": 2 + } + }, "grid_x": 216, "grid_y": 13, "pin_functions": {}, @@ -567280,7 +568736,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y338": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 75, + "words": 2 + } + }, "grid_x": 216, "grid_y": 12, "pin_functions": {}, @@ -567289,7 +568752,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y339": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 77, + "words": 2 + } + }, "grid_x": 216, "grid_y": 11, "pin_functions": {}, @@ -567298,7 +568768,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y340": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 79, + "words": 2 + } + }, "grid_x": 216, "grid_y": 10, "pin_functions": {}, @@ -567307,7 +568784,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y341": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 81, + "words": 2 + } + }, "grid_x": 216, "grid_y": 9, "pin_functions": {}, @@ -567316,7 +568800,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y342": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 83, + "words": 2 + } + }, "grid_x": 216, "grid_y": 8, "pin_functions": {}, @@ -567325,7 +568816,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y343": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 85, + "words": 2 + } + }, "grid_x": 216, "grid_y": 7, "pin_functions": {}, @@ -567334,7 +568832,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y344": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 87, + "words": 2 + } + }, "grid_x": 216, "grid_y": 6, "pin_functions": {}, @@ -567343,7 +568848,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y345": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 89, + "words": 2 + } + }, "grid_x": 216, "grid_y": 5, "pin_functions": {}, @@ -567352,7 +568864,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y346": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 91, + "words": 2 + } + }, "grid_x": 216, "grid_y": 4, "pin_functions": {}, @@ -567361,7 +568880,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y347": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 93, + "words": 2 + } + }, "grid_x": 216, "grid_y": 3, "pin_functions": {}, @@ -567370,7 +568896,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y348": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 95, + "words": 2 + } + }, "grid_x": 216, "grid_y": 2, "pin_functions": {}, @@ -567379,7 +568912,14 @@ "type": "GTX_INT_INTERFACE" }, "GTX_INT_INTERFACE_X89Y349": { - "bits": {}, + "bits": { + "CLB_IO_CLK": { + "baseaddr": "0x00062C80", + "frames": 28, + "offset": 97, + "words": 2 + } + }, "grid_x": 216, "grid_y": 1, "pin_functions": {},