diff --git a/Info.md b/Info.md index 0cb94a0..00b977e 100644 --- a/Info.md +++ b/Info.md @@ -37,27 +37,26 @@ These files are released under the very permissive [CC0 1.0 Universal](COPYING). # Details -Last updated on Wed Oct 24 17:47:45 UTC 2018 (2018-10-24T17:47:45+00:00). +Last updated on Wed Oct 24 23:57:13 UTC 2018 (2018-10-24T23:57:13+00:00). -Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [v0.0-858-g7f2735d](https://github.com/SymbiFlow/prjxray/commit/7f2735dd4b5c9c695642b377515194af8909bf4d). +Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [v0.0-902-g3247963](https://github.com/SymbiFlow/prjxray/commit/32479630be1a661d1cfd6e5e6f1961e64c263db7). Latest commit was; ``` -commit 7f2735dd4b5c9c695642b377515194af8909bf4d -Merge: 01c359c 47cc2b0 -Author: Tim Ansell -Date: Tue Oct 23 09:57:25 2018 -0700 +commit 32479630be1a661d1cfd6e5e6f1961e64c263db7 +Author: Tim 'mithro' Ansell +Date: Wed Oct 24 16:49:20 2018 -0700 - Merge pull request #179 from litghost/fix_fuzzer + minitests/roi_harness: Remove hardcoded values in Makefile. - Fix indirection. + Signed-off-by: Tim 'mithro' Ansell ``` ## Database for [artix7](artix7/) ### Settings -Created using following [settings.sh (sha256: cb777c1e854d877556482ff2067eff348386ce627caa0ef5617a6e5dea01dc6a)](https://github.com/SymbiFlow/prjxray/blob/7f2735dd4b5c9c695642b377515194af8909bf4d/database/artix7/settings.sh) +Created using following [settings.sh (sha256: cb777c1e854d877556482ff2067eff348386ce627caa0ef5617a6e5dea01dc6a)](https://github.com/SymbiFlow/prjxray/blob/32479630be1a661d1cfd6e5e6f1961e64c263db7/database/artix7/settings.sh) ```shell export XRAY_DATABASE="artix7" export XRAY_PART="xc7a50tfgg484-1" @@ -88,6 +87,19 @@ Results have checksums; * [`8c6097166bf4b43969c49894dc464d1202f19683d7287a63ec709bc867d97105 ./artix7/element_counts.csv`](./artix7/element_counts.csv) * [`6864d8edcef442cb129f83b9c5cd27be85d1b4bded8007bbeadcfc70717f8c48 ./artix7/gridinfo/grid-xc7a50tfgg484-1-db.txt`](./artix7/gridinfo/grid-xc7a50tfgg484-1-db.txt) + * [`8416e8eef29e5defebbd3e45f60baa15cbcc22d66647a8da62ec7c42eff8b521 ./artix7/harness/arty-a7/pmod/design.bit`](./artix7/harness/arty-a7/pmod/design.bit) + * [`c98eefb677a5cd469b75223d6ceb0e95f5d331de00291193caed008f33ee746c ./artix7/harness/arty-a7/pmod/design.dcp`](./artix7/harness/arty-a7/pmod/design.dcp) + * [`856f9f5845a6eea5b7df26a110ed6fefa37a8cf4a8653ef9876c76e233005e03 ./artix7/harness/arty-a7/pmod/design.json`](./artix7/harness/arty-a7/pmod/design.json) + * [`0c0db34e2b1a0f38b05799ad7e042874d43443d79426e9f32f0b63c71a8c9d3d ./artix7/harness/arty-a7/pmod/design.txt`](./artix7/harness/arty-a7/pmod/design.txt) + * [`0df8a22d29a4425ee1da4363b8cdb56c82c1ab71913fbe36b4470b3ebc082c60 ./artix7/harness/arty-a7/swbut/design.bit`](./artix7/harness/arty-a7/swbut/design.bit) + * [`578bbe948ecc1af59c3e9cda0aacd53841d31534a6ec156af9d2779aee8770f4 ./artix7/harness/arty-a7/swbut/design.dcp`](./artix7/harness/arty-a7/swbut/design.dcp) + * [`e291554cf40e009b4ca1981c514bf3fb54eccd411d8133d3ef743d9efeaea783 ./artix7/harness/arty-a7/swbut/design.json`](./artix7/harness/arty-a7/swbut/design.json) + * [`d8c1255df5bc352fbff05b9688b86becfc7d28ee82663256332e0a7b8ac4b338 ./artix7/harness/arty-a7/swbut/design.txt`](./artix7/harness/arty-a7/swbut/design.txt) + * [`c805c150d4a58e392a1c41046261fec0b2c76fe1cce5812253902fc95715ba54 ./artix7/harness/basys3/swbut/design.bit`](./artix7/harness/basys3/swbut/design.bit) + * [`29981e44415eaeff674c940dcd5b5be4fc5b04efa1c10f6a43eb054101e0c966 ./artix7/harness/basys3/swbut/design.dcp`](./artix7/harness/basys3/swbut/design.dcp) + * [`b80709f701e7d3611aa9c8d9c70640374f2eb2c15cd7e64fa74d6b4211a9b197 ./artix7/harness/basys3/swbut/design.json`](./artix7/harness/basys3/swbut/design.json) + * [`cd4000b96378f736d31686b381ebd4349898b3b8bd09606223c7ca48cb1a5aba ./artix7/harness/basys3/swbut/design.txt`](./artix7/harness/basys3/swbut/design.txt) + * [`4c0a815ab8943181331f7aa9ac77655a0a640d9a409a602e4f24f8feb5f905e9 ./artix7/harness/README.md`](./artix7/harness/README.md) * [`69f298082e6c8e537d8348b9d4c01f582d0d86fdeddf1e6606b90e800994bcdd ./artix7/mask_bram_l.db`](./artix7/mask_bram_l.db) * [`8fae8a634efb8929db28581b2acd436fd4c31a0bd241dd4643e5692e2da8e648 ./artix7/mask_bram_r.db`](./artix7/mask_bram_r.db) * [`5c274320294201935a3edccb43eca8e347ca1f0acded71ec388c794877d4b55b ./artix7/mask_clbll_l.db`](./artix7/mask_clbll_l.db) @@ -274,13 +286,14 @@ Results have checksums; * [`b97c56f95ae1334f6bd2b7f8cb5782b0f6e335c8c34260555ff31dd0a165bb47 ./artix7/tile_type_VBRK.json`](./artix7/tile_type_VBRK.json) * [`b24c32758a7c21185e2b9689b4ac65f8f00e43e8ec46aac79a8233b3d3fd36c6 ./artix7/tile_type_VFRAME.json`](./artix7/tile_type_VFRAME.json) * [`ef0724733da87455426a0f833642d96e9d206d047f4eb97072c3093f80c40d7d ./artix7/xc7a35tcpg236-1.yaml`](./artix7/xc7a35tcpg236-1.yaml) + * [`ef0724733da87455426a0f833642d96e9d206d047f4eb97072c3093f80c40d7d ./artix7/xc7a35tcsg324-1.yaml`](./artix7/xc7a35tcsg324-1.yaml) * [`41c360b1e2f7e08b9051f1160a34954ce4c05a445a07f226f1f4059caf1fa1d3 ./artix7/xc7a50tfgg484-1.yaml`](./artix7/xc7a50tfgg484-1.yaml) ## Database for [kintex7](kintex7/) ### Settings -Created using following [settings.sh (sha256: 2daf6a69dd6d20df7b1273ff43c5c340abe36f8229d297646865edcfd91eff18)](https://github.com/SymbiFlow/prjxray/blob/7f2735dd4b5c9c695642b377515194af8909bf4d/database/kintex7/settings.sh) +Created using following [settings.sh (sha256: 2daf6a69dd6d20df7b1273ff43c5c340abe36f8229d297646865edcfd91eff18)](https://github.com/SymbiFlow/prjxray/blob/32479630be1a661d1cfd6e5e6f1961e64c263db7/database/kintex7/settings.sh) ```shell export XRAY_DATABASE="kintex7" export XRAY_PART="xc7k70tfbg676-2" diff --git a/artix7/harness/arty-a7/pmod/design.bit b/artix7/harness/arty-a7/pmod/design.bit new file mode 100644 index 0000000..462374a Binary files /dev/null and b/artix7/harness/arty-a7/pmod/design.bit differ diff --git a/artix7/harness/arty-a7/pmod/design.dcp b/artix7/harness/arty-a7/pmod/design.dcp new file mode 100644 index 0000000..d26c67e Binary files /dev/null and b/artix7/harness/arty-a7/pmod/design.dcp differ diff --git a/artix7/harness/arty-a7/pmod/design.json b/artix7/harness/arty-a7/pmod/design.json new file mode 100644 index 0000000..cca39a6 --- /dev/null +++ b/artix7/harness/arty-a7/pmod/design.json @@ -0,0 +1,112 @@ +{ + "info": { + "GRID_X_MAX": 47, + "GRID_X_MIN": 18, + "GRID_Y_MAX": 52, + "GRID_Y_MIN": 0 + }, + "ports": [ + { + "name": "clk", + "node": "CLK_HROW_TOP_R_X60Y130/CLK_HROW_CK_BUFHCLK_L0", + "pin": "G13", + "wire": "HCLK_VBRK_X34Y130/HCLK_VBRK_CK_BUFHCLK0" + }, + { + "name": "din[0]", + "node": "INT_R_X9Y102/NE2BEG3", + "pin": "E15", + "wire": "VBRK_X29Y108/VBRK_NE2A3" + }, + { + "name": "din[1]", + "node": "INT_R_X9Y105/NE2BEG3", + "pin": "E16", + "wire": "VBRK_X29Y111/VBRK_NE2A3" + }, + { + "name": "din[2]", + "node": "INT_R_X9Y108/NE2BEG3", + "pin": "D15", + "wire": "VBRK_X29Y114/VBRK_NE2A3" + }, + { + "name": "din[3]", + "node": "INT_R_X9Y111/NE2BEG3", + "pin": "C15", + "wire": "VBRK_X29Y117/VBRK_NE2A3" + }, + { + "name": "din[4]", + "node": "INT_R_X9Y114/NE2BEG3", + "pin": "J17", + "wire": "VBRK_X29Y120/VBRK_NE2A3" + }, + { + "name": "din[5]", + "node": "INT_R_X9Y117/NE2BEG3", + "pin": "J18", + "wire": "VBRK_X29Y123/VBRK_NE2A3" + }, + { + "name": "din[6]", + "node": "INT_R_X9Y120/NE2BEG3", + "pin": "K15", + "wire": "VBRK_X29Y126/VBRK_NE2A3" + }, + { + "name": "din[7]", + "node": "INT_R_X9Y123/NE2BEG3", + "pin": "J15", + "wire": "VBRK_X29Y129/VBRK_NE2A3" + }, + { + "name": "dout[0]", + "node": "INT_L_X10Y125/SW6BEG0", + "pin": "U12", + "wire": "VBRK_X29Y131/VBRK_SW4A0" + }, + { + "name": "dout[1]", + "node": "INT_L_X10Y128/SW6BEG0", + "pin": "V12", + "wire": "VBRK_X29Y134/VBRK_SW4A0" + }, + { + "name": "dout[2]", + "node": "INT_L_X10Y131/SW6BEG0", + "pin": "V10", + "wire": "VBRK_X29Y137/VBRK_SW4A0" + }, + { + "name": "dout[3]", + "node": "INT_L_X10Y134/SW6BEG0", + "pin": "V11", + "wire": "VBRK_X29Y140/VBRK_SW4A0" + }, + { + "name": "dout[4]", + "node": "INT_L_X10Y137/SW6BEG0", + "pin": "U14", + "wire": "VBRK_X29Y143/VBRK_SW4A0" + }, + { + "name": "dout[5]", + "node": "INT_L_X10Y140/SW6BEG0", + "pin": "V14", + "wire": "VBRK_X29Y146/VBRK_SW4A0" + }, + { + "name": "dout[6]", + "node": "INT_L_X10Y143/SW6BEG0", + "pin": "T13", + "wire": "VBRK_X29Y149/VBRK_SW4A0" + }, + { + "name": "dout[7]", + "node": "INT_L_X10Y146/SW6BEG0", + "pin": "U13", + "wire": "VBRK_X29Y152/VBRK_SW4A0" + } + ] +} \ No newline at end of file diff --git a/artix7/harness/arty-a7/pmod/design.txt b/artix7/harness/arty-a7/pmod/design.txt new file mode 100644 index 0000000..09a8861 --- /dev/null +++ b/artix7/harness/arty-a7/pmod/design.txt @@ -0,0 +1,18 @@ +name node pin wire +clk CLK_HROW_TOP_R_X60Y130/CLK_HROW_CK_BUFHCLK_L0 G13 HCLK_VBRK_X34Y130/HCLK_VBRK_CK_BUFHCLK0 +din[0] INT_R_X9Y102/NE2BEG3 E15 VBRK_X29Y108/VBRK_NE2A3 +din[1] INT_R_X9Y105/NE2BEG3 E16 VBRK_X29Y111/VBRK_NE2A3 +din[2] INT_R_X9Y108/NE2BEG3 D15 VBRK_X29Y114/VBRK_NE2A3 +din[3] INT_R_X9Y111/NE2BEG3 C15 VBRK_X29Y117/VBRK_NE2A3 +din[4] INT_R_X9Y114/NE2BEG3 J17 VBRK_X29Y120/VBRK_NE2A3 +din[5] INT_R_X9Y117/NE2BEG3 J18 VBRK_X29Y123/VBRK_NE2A3 +din[6] INT_R_X9Y120/NE2BEG3 K15 VBRK_X29Y126/VBRK_NE2A3 +din[7] INT_R_X9Y123/NE2BEG3 J15 VBRK_X29Y129/VBRK_NE2A3 +dout[0] INT_L_X10Y125/SW6BEG0 U12 VBRK_X29Y131/VBRK_SW4A0 +dout[1] INT_L_X10Y128/SW6BEG0 V12 VBRK_X29Y134/VBRK_SW4A0 +dout[2] INT_L_X10Y131/SW6BEG0 V10 VBRK_X29Y137/VBRK_SW4A0 +dout[3] INT_L_X10Y134/SW6BEG0 V11 VBRK_X29Y140/VBRK_SW4A0 +dout[4] INT_L_X10Y137/SW6BEG0 U14 VBRK_X29Y143/VBRK_SW4A0 +dout[5] INT_L_X10Y140/SW6BEG0 V14 VBRK_X29Y146/VBRK_SW4A0 +dout[6] INT_L_X10Y143/SW6BEG0 T13 VBRK_X29Y149/VBRK_SW4A0 +dout[7] INT_L_X10Y146/SW6BEG0 U13 VBRK_X29Y152/VBRK_SW4A0 diff --git a/artix7/harness/arty-a7/swbut/design.bit b/artix7/harness/arty-a7/swbut/design.bit new file mode 100644 index 0000000..e37d015 Binary files /dev/null and b/artix7/harness/arty-a7/swbut/design.bit differ diff --git a/artix7/harness/arty-a7/swbut/design.dcp b/artix7/harness/arty-a7/swbut/design.dcp new file mode 100644 index 0000000..b02810f Binary files /dev/null and b/artix7/harness/arty-a7/swbut/design.dcp differ diff --git a/artix7/harness/arty-a7/swbut/design.json b/artix7/harness/arty-a7/swbut/design.json new file mode 100644 index 0000000..3b6be91 --- /dev/null +++ b/artix7/harness/arty-a7/swbut/design.json @@ -0,0 +1,112 @@ +{ + "info": { + "GRID_X_MAX": 47, + "GRID_X_MIN": 18, + "GRID_Y_MAX": 52, + "GRID_Y_MIN": 0 + }, + "ports": [ + { + "name": "clk", + "node": "CLK_HROW_TOP_R_X60Y130/CLK_HROW_CK_BUFHCLK_L0", + "pin": "E3", + "wire": "HCLK_VBRK_X34Y130/HCLK_VBRK_CK_BUFHCLK0" + }, + { + "name": "din[0]", + "node": "INT_R_X9Y102/NE2BEG3", + "pin": "A8", + "wire": "VBRK_X29Y108/VBRK_NE2A3" + }, + { + "name": "din[1]", + "node": "INT_R_X9Y105/NE2BEG3", + "pin": "C11", + "wire": "VBRK_X29Y111/VBRK_NE2A3" + }, + { + "name": "din[2]", + "node": "INT_R_X9Y108/NE2BEG3", + "pin": "C10", + "wire": "VBRK_X29Y114/VBRK_NE2A3" + }, + { + "name": "din[3]", + "node": "INT_R_X9Y111/NE2BEG3", + "pin": "A10", + "wire": "VBRK_X29Y117/VBRK_NE2A3" + }, + { + "name": "din[4]", + "node": "INT_R_X9Y114/NE2BEG3", + "pin": "D9", + "wire": "VBRK_X29Y120/VBRK_NE2A3" + }, + { + "name": "din[5]", + "node": "INT_R_X9Y117/NE2BEG3", + "pin": "C9", + "wire": "VBRK_X29Y123/VBRK_NE2A3" + }, + { + "name": "din[6]", + "node": "INT_R_X9Y120/NE2BEG3", + "pin": "B9", + "wire": "VBRK_X29Y126/VBRK_NE2A3" + }, + { + "name": "din[7]", + "node": "INT_R_X9Y123/NE2BEG3", + "pin": "B8", + "wire": "VBRK_X29Y129/VBRK_NE2A3" + }, + { + "name": "dout[0]", + "node": "INT_R_X17Y125/SE6BEG0", + "pin": "H5", + "wire": "" + }, + { + "name": "dout[1]", + "node": "INT_R_X17Y128/SE6BEG0", + "pin": "J5", + "wire": "" + }, + { + "name": "dout[2]", + "node": "INT_L_X10Y131/SW6BEG0", + "pin": "T9", + "wire": "VBRK_X29Y137/VBRK_SW4A0" + }, + { + "name": "dout[3]", + "node": "INT_L_X10Y134/SW6BEG0", + "pin": "T10", + "wire": "VBRK_X29Y140/VBRK_SW4A0" + }, + { + "name": "dout[4]", + "node": "INT_R_X17Y137/SE6BEG0", + "pin": "F6", + "wire": "" + }, + { + "name": "dout[5]", + "node": "INT_R_X17Y140/SE6BEG0", + "pin": "J4", + "wire": "" + }, + { + "name": "dout[6]", + "node": "INT_R_X17Y143/SE6BEG0", + "pin": "J2", + "wire": "" + }, + { + "name": "dout[7]", + "node": "INT_R_X17Y146/SE6BEG0", + "pin": "H6", + "wire": "" + } + ] +} \ No newline at end of file diff --git a/artix7/harness/arty-a7/swbut/design.txt b/artix7/harness/arty-a7/swbut/design.txt new file mode 100644 index 0000000..e9e91d5 --- /dev/null +++ b/artix7/harness/arty-a7/swbut/design.txt @@ -0,0 +1,18 @@ +name node pin wire +clk CLK_HROW_TOP_R_X60Y130/CLK_HROW_CK_BUFHCLK_L0 E3 HCLK_VBRK_X34Y130/HCLK_VBRK_CK_BUFHCLK0 +din[0] INT_R_X9Y102/NE2BEG3 A8 VBRK_X29Y108/VBRK_NE2A3 +din[1] INT_R_X9Y105/NE2BEG3 C11 VBRK_X29Y111/VBRK_NE2A3 +din[2] INT_R_X9Y108/NE2BEG3 C10 VBRK_X29Y114/VBRK_NE2A3 +din[3] INT_R_X9Y111/NE2BEG3 A10 VBRK_X29Y117/VBRK_NE2A3 +din[4] INT_R_X9Y114/NE2BEG3 D9 VBRK_X29Y120/VBRK_NE2A3 +din[5] INT_R_X9Y117/NE2BEG3 C9 VBRK_X29Y123/VBRK_NE2A3 +din[6] INT_R_X9Y120/NE2BEG3 B9 VBRK_X29Y126/VBRK_NE2A3 +din[7] INT_R_X9Y123/NE2BEG3 B8 VBRK_X29Y129/VBRK_NE2A3 +dout[0] INT_R_X17Y125/SE6BEG0 H5 +dout[1] INT_R_X17Y128/SE6BEG0 J5 +dout[2] INT_L_X10Y131/SW6BEG0 T9 VBRK_X29Y137/VBRK_SW4A0 +dout[3] INT_L_X10Y134/SW6BEG0 T10 VBRK_X29Y140/VBRK_SW4A0 +dout[4] INT_R_X17Y137/SE6BEG0 F6 +dout[5] INT_R_X17Y140/SE6BEG0 J4 +dout[6] INT_R_X17Y143/SE6BEG0 J2 +dout[7] INT_R_X17Y146/SE6BEG0 H6 diff --git a/artix7/harness/basys3/swbut/design.bit b/artix7/harness/basys3/swbut/design.bit new file mode 100644 index 0000000..6867d81 Binary files /dev/null and b/artix7/harness/basys3/swbut/design.bit differ diff --git a/artix7/harness/basys3/swbut/design.dcp b/artix7/harness/basys3/swbut/design.dcp new file mode 100644 index 0000000..cdd6a2b Binary files /dev/null and b/artix7/harness/basys3/swbut/design.dcp differ diff --git a/artix7/harness/basys3/swbut/design.json b/artix7/harness/basys3/swbut/design.json new file mode 100644 index 0000000..97f1647 --- /dev/null +++ b/artix7/harness/basys3/swbut/design.json @@ -0,0 +1,112 @@ +{ + "info": { + "GRID_X_MAX": 47, + "GRID_X_MIN": 18, + "GRID_Y_MAX": 52, + "GRID_Y_MIN": 0 + }, + "ports": [ + { + "name": "clk", + "node": "CLK_HROW_TOP_R_X60Y130/CLK_HROW_CK_BUFHCLK_L0", + "pin": "W5", + "wire": "HCLK_VBRK_X34Y130/HCLK_VBRK_CK_BUFHCLK0" + }, + { + "name": "din[0]", + "node": "INT_R_X9Y102/NE2BEG3", + "pin": "V17", + "wire": "VBRK_X29Y108/VBRK_NE2A3" + }, + { + "name": "din[1]", + "node": "INT_R_X9Y105/NE2BEG3", + "pin": "V16", + "wire": "VBRK_X29Y111/VBRK_NE2A3" + }, + { + "name": "din[2]", + "node": "INT_R_X9Y108/NE2BEG3", + "pin": "W16", + "wire": "VBRK_X29Y114/VBRK_NE2A3" + }, + { + "name": "din[3]", + "node": "INT_R_X9Y111/NE2BEG3", + "pin": "W17", + "wire": "VBRK_X29Y117/VBRK_NE2A3" + }, + { + "name": "din[4]", + "node": "INT_R_X9Y114/NE2BEG3", + "pin": "W15", + "wire": "VBRK_X29Y120/VBRK_NE2A3" + }, + { + "name": "din[5]", + "node": "INT_R_X9Y117/NE2BEG3", + "pin": "V15", + "wire": "VBRK_X29Y123/VBRK_NE2A3" + }, + { + "name": "din[6]", + "node": "INT_R_X9Y120/NE2BEG3", + "pin": "W14", + "wire": "VBRK_X29Y126/VBRK_NE2A3" + }, + { + "name": "din[7]", + "node": "INT_R_X9Y123/NE2BEG3", + "pin": "W13", + "wire": "VBRK_X29Y129/VBRK_NE2A3" + }, + { + "name": "dout[0]", + "node": "INT_L_X10Y125/SW6BEG0", + "pin": "U16", + "wire": "VBRK_X29Y131/VBRK_SW4A0" + }, + { + "name": "dout[1]", + "node": "INT_L_X10Y128/SW6BEG0", + "pin": "E19", + "wire": "VBRK_X29Y134/VBRK_SW4A0" + }, + { + "name": "dout[2]", + "node": "INT_L_X10Y131/SW6BEG0", + "pin": "U19", + "wire": "VBRK_X29Y137/VBRK_SW4A0" + }, + { + "name": "dout[3]", + "node": "INT_L_X10Y134/SW6BEG0", + "pin": "V19", + "wire": "VBRK_X29Y140/VBRK_SW4A0" + }, + { + "name": "dout[4]", + "node": "INT_L_X10Y137/SW6BEG0", + "pin": "W18", + "wire": "VBRK_X29Y143/VBRK_SW4A0" + }, + { + "name": "dout[5]", + "node": "INT_L_X10Y140/SW6BEG0", + "pin": "U15", + "wire": "VBRK_X29Y146/VBRK_SW4A0" + }, + { + "name": "dout[6]", + "node": "INT_L_X10Y143/SW6BEG0", + "pin": "U14", + "wire": "VBRK_X29Y149/VBRK_SW4A0" + }, + { + "name": "dout[7]", + "node": "INT_L_X10Y146/SW6BEG0", + "pin": "V14", + "wire": "VBRK_X29Y152/VBRK_SW4A0" + } + ] +} \ No newline at end of file diff --git a/artix7/harness/basys3/swbut/design.txt b/artix7/harness/basys3/swbut/design.txt new file mode 100644 index 0000000..8a63b52 --- /dev/null +++ b/artix7/harness/basys3/swbut/design.txt @@ -0,0 +1,18 @@ +name node pin wire +clk CLK_HROW_TOP_R_X60Y130/CLK_HROW_CK_BUFHCLK_L0 W5 HCLK_VBRK_X34Y130/HCLK_VBRK_CK_BUFHCLK0 +din[0] INT_R_X9Y102/NE2BEG3 V17 VBRK_X29Y108/VBRK_NE2A3 +din[1] INT_R_X9Y105/NE2BEG3 V16 VBRK_X29Y111/VBRK_NE2A3 +din[2] INT_R_X9Y108/NE2BEG3 W16 VBRK_X29Y114/VBRK_NE2A3 +din[3] INT_R_X9Y111/NE2BEG3 W17 VBRK_X29Y117/VBRK_NE2A3 +din[4] INT_R_X9Y114/NE2BEG3 W15 VBRK_X29Y120/VBRK_NE2A3 +din[5] INT_R_X9Y117/NE2BEG3 V15 VBRK_X29Y123/VBRK_NE2A3 +din[6] INT_R_X9Y120/NE2BEG3 W14 VBRK_X29Y126/VBRK_NE2A3 +din[7] INT_R_X9Y123/NE2BEG3 W13 VBRK_X29Y129/VBRK_NE2A3 +dout[0] INT_L_X10Y125/SW6BEG0 U16 VBRK_X29Y131/VBRK_SW4A0 +dout[1] INT_L_X10Y128/SW6BEG0 E19 VBRK_X29Y134/VBRK_SW4A0 +dout[2] INT_L_X10Y131/SW6BEG0 U19 VBRK_X29Y137/VBRK_SW4A0 +dout[3] INT_L_X10Y134/SW6BEG0 V19 VBRK_X29Y140/VBRK_SW4A0 +dout[4] INT_L_X10Y137/SW6BEG0 W18 VBRK_X29Y143/VBRK_SW4A0 +dout[5] INT_L_X10Y140/SW6BEG0 U15 VBRK_X29Y146/VBRK_SW4A0 +dout[6] INT_L_X10Y143/SW6BEG0 U14 VBRK_X29Y149/VBRK_SW4A0 +dout[7] INT_L_X10Y146/SW6BEG0 V14 VBRK_X29Y152/VBRK_SW4A0 diff --git a/artix7/xc7a35tcsg324-1.yaml b/artix7/xc7a35tcsg324-1.yaml new file mode 100644 index 0000000..ad2e0ba --- /dev/null +++ b/artix7/xc7a35tcsg324-1.yaml @@ -0,0 +1,293 @@ +! +idcode: 0x362d093 +global_clock_regions: + top: ! + rows: + 0: ! + configuration_buses: + CLB_IO_CLK: ! + configuration_columns: + 0: ! + frame_count: 42 + 1: ! + frame_count: 30 + 2: ! + frame_count: 36 + 3: ! + frame_count: 36 + 4: ! + frame_count: 36 + 5: ! + frame_count: 36 + 6: ! + frame_count: 28 + 7: ! + frame_count: 36 + 8: ! + frame_count: 36 + 9: ! + frame_count: 28 + 10: ! + frame_count: 36 + 11: ! + frame_count: 36 + 12: ! + frame_count: 36 + 13: ! + frame_count: 36 + 14: ! + frame_count: 36 + 15: ! + frame_count: 36 + 16: ! + frame_count: 36 + 17: ! + frame_count: 36 + 18: ! + frame_count: 30 + 19: ! + frame_count: 36 + 20: ! + frame_count: 36 + 21: ! + frame_count: 36 + 22: ! + frame_count: 36 + 23: ! + frame_count: 30 + 24: ! + frame_count: 36 + 25: ! + frame_count: 36 + 26: ! + frame_count: 36 + 27: ! + frame_count: 36 + 28: ! + frame_count: 36 + 29: ! + frame_count: 36 + 30: ! + frame_count: 28 + 31: ! + frame_count: 36 + 32: ! + frame_count: 36 + 33: ! + frame_count: 36 + 34: ! + frame_count: 28 + 35: ! + frame_count: 36 + 36: ! + frame_count: 36 + 37: ! + frame_count: 28 + 38: ! + frame_count: 36 + 39: ! + frame_count: 36 + 40: ! + frame_count: 36 + 41: ! + frame_count: 36 + 42: ! + frame_count: 30 + 43: ! + frame_count: 42 + BLOCK_RAM: ! + configuration_columns: + 0: ! + frame_count: 128 + 1: ! + frame_count: 128 + 2: ! + frame_count: 128 + 1: ! + configuration_buses: + CLB_IO_CLK: ! + configuration_columns: + 0: ! + frame_count: 42 + 1: ! + frame_count: 30 + 2: ! + frame_count: 36 + 3: ! + frame_count: 36 + 4: ! + frame_count: 36 + 5: ! + frame_count: 36 + 6: ! + frame_count: 28 + 7: ! + frame_count: 36 + 8: ! + frame_count: 36 + 9: ! + frame_count: 28 + 10: ! + frame_count: 36 + 11: ! + frame_count: 36 + 12: ! + frame_count: 36 + 13: ! + frame_count: 36 + 14: ! + frame_count: 36 + 15: ! + frame_count: 36 + 16: ! + frame_count: 36 + 17: ! + frame_count: 36 + 18: ! + frame_count: 30 + 19: ! + frame_count: 36 + 20: ! + frame_count: 36 + 21: ! + frame_count: 36 + 22: ! + frame_count: 36 + 23: ! + frame_count: 30 + 24: ! + frame_count: 36 + 25: ! + frame_count: 36 + 26: ! + frame_count: 36 + 27: ! + frame_count: 36 + 28: ! + frame_count: 36 + 29: ! + frame_count: 36 + 30: ! + frame_count: 28 + 31: ! + frame_count: 36 + 32: ! + frame_count: 36 + 33: ! + frame_count: 36 + 34: ! + frame_count: 28 + 35: ! + frame_count: 36 + 36: ! + frame_count: 36 + 37: ! + frame_count: 32 + BLOCK_RAM: ! + configuration_columns: + 0: ! + frame_count: 128 + 1: ! + frame_count: 128 + bottom: ! + rows: + 0: ! + configuration_buses: + CLB_IO_CLK: ! + configuration_columns: + 0: ! + frame_count: 42 + 1: ! + frame_count: 30 + 2: ! + frame_count: 36 + 3: ! + frame_count: 36 + 4: ! + frame_count: 36 + 5: ! + frame_count: 36 + 6: ! + frame_count: 28 + 7: ! + frame_count: 36 + 8: ! + frame_count: 36 + 9: ! + frame_count: 28 + 10: ! + frame_count: 36 + 11: ! + frame_count: 36 + 12: ! + frame_count: 36 + 13: ! + frame_count: 36 + 14: ! + frame_count: 36 + 15: ! + frame_count: 36 + 16: ! + frame_count: 36 + 17: ! + frame_count: 36 + 18: ! + frame_count: 30 + 19: ! + frame_count: 36 + 20: ! + frame_count: 36 + 21: ! + frame_count: 36 + 22: ! + frame_count: 36 + 23: ! + frame_count: 30 + 24: ! + frame_count: 36 + 25: ! + frame_count: 36 + 26: ! + frame_count: 36 + 27: ! + frame_count: 36 + 28: ! + frame_count: 36 + 29: ! + frame_count: 36 + 30: ! + frame_count: 28 + 31: ! + frame_count: 36 + 32: ! + frame_count: 36 + 33: ! + frame_count: 36 + 34: ! + frame_count: 28 + 35: ! + frame_count: 36 + 36: ! + frame_count: 36 + 37: ! + frame_count: 28 + 38: ! + frame_count: 36 + 39: ! + frame_count: 36 + 40: ! + frame_count: 36 + 41: ! + frame_count: 36 + 42: ! + frame_count: 30 + 43: ! + frame_count: 42 + BLOCK_RAM: ! + configuration_columns: + 0: ! + frame_count: 128 + 1: ! + frame_count: 128 + 2: ! + frame_count: 128