diff --git a/Info.md b/Info.md
index b86b338..80ee1bf 100644
--- a/Info.md
+++ b/Info.md
@@ -37,20 +37,20 @@ These files are released under the very permissive [CC0 1.0 Universal](COPYING).
 
 # Details
 
-Last updated on Fri 20 Mar 2020 11:01:27 PM UTC (2020-03-20T23:01:27+00:00).
+Last updated on Mon 11 May 2020 11:45:04 PM UTC (2020-05-11T23:45:04+00:00).
 
-Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [85ccaa09](https://github.com/SymbiFlow/prjxray/commit/85ccaa09b464295ed1812008ecb066b475393cb9).
+Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [7ddd5f88](https://github.com/SymbiFlow/prjxray/commit/7ddd5f88e60c9876a6d7171b343c1c855239dc85).
 
 Latest commit was;
 ```
-commit 85ccaa09b464295ed1812008ecb066b475393cb9
-Merge: e856ba57 675af072
-Author: Tim Ansell <me@mith.ro>
-Date:   Wed Mar 18 15:19:41 2020 -0700
+commit 7ddd5f88e60c9876a6d7171b343c1c855239dc85
+Merge: 8df6ed11 e7560c6a
+Author: SymbiFlow Robot <foss-fpga-tools-bot@google.com>
+Date:   Sat May 9 14:50:02 2020 -0700
 
-    Merge pull request #1257 from antmicro/docs_fix_warnings
+    Merge pull request #1327 from SymbiFlow/dependabot/submodules/third_party/yaml-cpp-a98b8af
     
-    Fix warnings in documentation
+    Bump third_party/yaml-cpp from `9fb5153` to `a98b8af`
 ```
 
 
@@ -59,7 +59,7 @@ Date:   Wed Mar 18 15:19:41 2020 -0700
 
 ### Settings
 
-Created using following [settings/artix7.sh (sha256: 51184f624609564b925e9c029ae13326b7163f65679b5c5e13dbd00144df3732)](https://github.com/SymbiFlow/prjxray/blob/85ccaa09b464295ed1812008ecb066b475393cb9/settings/artix7.sh)
+Created using following [settings/artix7.sh (sha256: 51184f624609564b925e9c029ae13326b7163f65679b5c5e13dbd00144df3732)](https://github.com/SymbiFlow/prjxray/blob/7ddd5f88e60c9876a6d7171b343c1c855239dc85/settings/artix7.sh)
 ```shell
 export XRAY_DATABASE="artix7"
 export XRAY_PART="xc7a50tfgg484-1"
@@ -103,19 +103,19 @@ Results have checksums;
  * [`2b18b3806f0e58024469eac1fe11749d04c6b035d2c2eafa7d2f30bf57173fa9  ./artix7/harness/README.md`](./artix7/harness/README.md)
  * [`560f255b569fd4798989f45104d4a511b51380418d4ca6fc53201141b36b20aa  ./artix7/harness/arty-a7/pmod/design.bit`](./artix7/harness/arty-a7/pmod/design.bit)
  * [`1d8a121c3aa3bca7893429cfb08a8748206134271432daa52cdc9d3f5593bda0  ./artix7/harness/arty-a7/pmod/design.dcp`](./artix7/harness/arty-a7/pmod/design.dcp)
- * [`55f2d747a74e2cdbf2043be9641e427f9a06d2438160d54e2b16f05d52f165d3  ./artix7/harness/arty-a7/pmod/design.json`](./artix7/harness/arty-a7/pmod/design.json)
+ * [`12b513bf78373030d43b0d226acb8ad3c7b447acae0255844583bf5001525ce6  ./artix7/harness/arty-a7/pmod/design.json`](./artix7/harness/arty-a7/pmod/design.json)
  * [`fb90ad5fe10750f33d5802e1409ebc2406f7b0adab4bf6ef12b53c0e100b43ea  ./artix7/harness/arty-a7/pmod/design.txt`](./artix7/harness/arty-a7/pmod/design.txt)
  * [`931c1598b75005a8a8e5b2225cc7454c2c7be451cb907bc4c047cb04db99772d  ./artix7/harness/arty-a7/swbut/design.bit`](./artix7/harness/arty-a7/swbut/design.bit)
  * [`5d06132c788097344a9bca7040a08dd0e1632e177ed8def1d7445132020cc768  ./artix7/harness/arty-a7/swbut/design.dcp`](./artix7/harness/arty-a7/swbut/design.dcp)
- * [`343ad995ee7b220ae74271a0aaec83219c1c9562f206d8054c1689b02a0ba24e  ./artix7/harness/arty-a7/swbut/design.json`](./artix7/harness/arty-a7/swbut/design.json)
+ * [`af2bf70bb44cc93c53b344b7bdd9ded859142a1960130434d1418554204c6db2  ./artix7/harness/arty-a7/swbut/design.json`](./artix7/harness/arty-a7/swbut/design.json)
  * [`884af447661ff1cb653cd8280602c2348435366b35bf2627e2221af34899d191  ./artix7/harness/arty-a7/swbut/design.txt`](./artix7/harness/arty-a7/swbut/design.txt)
  * [`128e73ee026cf2238a35c7e993b845e3551919c90fc77b277635bc5098d59741  ./artix7/harness/arty-a7/uart/design.bit`](./artix7/harness/arty-a7/uart/design.bit)
  * [`955daed70c5728c13865eddc9bd7001d93183a50c560559a7b6628aa85b1fbbe  ./artix7/harness/arty-a7/uart/design.dcp`](./artix7/harness/arty-a7/uart/design.dcp)
- * [`f407998f6a7a7def35b271b71f6736f495f80512c9f49ec1ca5ebe2544108b39  ./artix7/harness/arty-a7/uart/design.json`](./artix7/harness/arty-a7/uart/design.json)
+ * [`063a775ffd3c7fdd198c1f8c9298cfd33ab550af8eccd1f1c7ecf92054dc87ba  ./artix7/harness/arty-a7/uart/design.json`](./artix7/harness/arty-a7/uart/design.json)
  * [`0583aa7502ee7a0303510c524f5500d8e1b9598aa26016d3d0e4e9623bf8ab8d  ./artix7/harness/arty-a7/uart/design.txt`](./artix7/harness/arty-a7/uart/design.txt)
  * [`d3109010f8fced3be08e720741a157d08b7042359e84d04bbe677f50cbf10a04  ./artix7/harness/basys3/swbut/design.bit`](./artix7/harness/basys3/swbut/design.bit)
  * [`abedfa7f2ee5a4dbc51b582ebae62dd20489f745a4a239e49b18ba3e02be019f  ./artix7/harness/basys3/swbut/design.dcp`](./artix7/harness/basys3/swbut/design.dcp)
- * [`5d08d9434fd6a8340dfe354613455554c037f6c886a35f6cc98055ff955613c1  ./artix7/harness/basys3/swbut/design.json`](./artix7/harness/basys3/swbut/design.json)
+ * [`96d20a9d5715460c6ac4bd75b761acb5b797ae3f5d573f9f1ee32420844aa9ea  ./artix7/harness/basys3/swbut/design.json`](./artix7/harness/basys3/swbut/design.json)
  * [`9df8eac3c11e57d81b4bf4a927ade787f881f0ef46c8ab610ca529f35e887689  ./artix7/harness/basys3/swbut/design.txt`](./artix7/harness/basys3/swbut/design.txt)
  * [`3ad62b024991225f1565e84159f2eb59d08e9fc6cf2577ea1698952b5dc0e4ec  ./artix7/harness/basys3/swbut_50/design.bit`](./artix7/harness/basys3/swbut_50/design.bit)
  * [`773fe43b4974ab353bde87e544abb6b541cdcb280de40df76afa96f7fa23db46  ./artix7/harness/basys3/swbut_50/design.dcp`](./artix7/harness/basys3/swbut_50/design.dcp)
@@ -144,8 +144,8 @@ Results have checksums;
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/mask_dsp_l.origin_info.db`](./artix7/mask_dsp_l.origin_info.db)
  * [`9af09e437a5fa560e6764933044939cf622250fd4c5a038978dc2e07eb580c83  ./artix7/mask_dsp_r.db`](./artix7/mask_dsp_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/mask_dsp_r.origin_info.db`](./artix7/mask_dsp_r.origin_info.db)
- * [`be757fb834be7ff84a2873c0ac6621c909a5e85362b397667760edde86616f84  ./artix7/mask_hclk_cmt.db`](./artix7/mask_hclk_cmt.db)
- * [`be757fb834be7ff84a2873c0ac6621c909a5e85362b397667760edde86616f84  ./artix7/mask_hclk_cmt_l.db`](./artix7/mask_hclk_cmt_l.db)
+ * [`c714c25d06cc5d3b7947e638f55c5268b01792cb2d86320a5411d00387ada404  ./artix7/mask_hclk_cmt.db`](./artix7/mask_hclk_cmt.db)
+ * [`c714c25d06cc5d3b7947e638f55c5268b01792cb2d86320a5411d00387ada404  ./artix7/mask_hclk_cmt_l.db`](./artix7/mask_hclk_cmt_l.db)
  * [`d0914443ac28056e840aee431bd51933a7cdc6504eefb052113d7e33e8b08e83  ./artix7/mask_hclk_ioi.db`](./artix7/mask_hclk_ioi.db)
  * [`49f54d634cddc4d58df9b8a0c371364088c73c1eeaaf87b80c871430aae66077  ./artix7/mask_hclk_ioi3.db`](./artix7/mask_hclk_ioi3.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./artix7/mask_hclk_l.db`](./artix7/mask_hclk_l.db)
@@ -153,13 +153,13 @@ Results have checksums;
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./artix7/mask_hclk_r.db`](./artix7/mask_hclk_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/mask_hclk_r.origin_info.db`](./artix7/mask_hclk_r.origin_info.db)
  * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./artix7/mask_liob33.db`](./artix7/mask_liob33.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db)
+ * [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c  ./artix7/mask_lioi3.db`](./artix7/mask_lioi3.db)
+ * [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c  ./artix7/mask_lioi3_tbytesrc.db`](./artix7/mask_lioi3_tbytesrc.db)
+ * [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c  ./artix7/mask_lioi3_tbyteterm.db`](./artix7/mask_lioi3_tbyteterm.db)
  * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./artix7/mask_riob33.db`](./artix7/mask_riob33.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db)
- * [`e9c5e8644b7f426944df2adaecb6e4813097034cfe78ab469d9b675e169b60d4  ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db)
+ * [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c  ./artix7/mask_rioi3.db`](./artix7/mask_rioi3.db)
+ * [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c  ./artix7/mask_rioi3_tbytesrc.db`](./artix7/mask_rioi3_tbytesrc.db)
+ * [`f665e297181be0a1ed08f33873068b4fe4cefcb85118e30b85548c117d5fa63c  ./artix7/mask_rioi3_tbyteterm.db`](./artix7/mask_rioi3_tbyteterm.db)
  * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf  ./artix7/ppips_bram_int_interface_l.db`](./artix7/ppips_bram_int_interface_l.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./artix7/ppips_bram_int_interface_l.origin_info.db`](./artix7/ppips_bram_int_interface_l.origin_info.db)
  * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae  ./artix7/ppips_bram_int_interface_r.db`](./artix7/ppips_bram_int_interface_r.db)
@@ -251,10 +251,10 @@ Results have checksums;
  * [`10a6e47f7b26f0d21cf0a011d4a5f2a4266538bb8d028a07fd981323dc1f0da0  ./artix7/segbits_dsp_l.origin_info.db`](./artix7/segbits_dsp_l.origin_info.db)
  * [`f81459ae1c84e0e73815c4577a7d0b19b497dd7f16029763c3fc4f3b8410dcc2  ./artix7/segbits_dsp_r.db`](./artix7/segbits_dsp_r.db)
  * [`76965c2e6ba2acab8f809a3d947b100fd322ba5b6d88c358bf816699348b07bf  ./artix7/segbits_dsp_r.origin_info.db`](./artix7/segbits_dsp_r.origin_info.db)
- * [`b7fc6cf18898ea037285ec9364405cc9adac3338ff7312dcd3de4346bfdf254b  ./artix7/segbits_hclk_cmt.db`](./artix7/segbits_hclk_cmt.db)
- * [`999de4e875bda301d678cf84e2706a5412cd1fa0f8750825974f197aabfb431d  ./artix7/segbits_hclk_cmt.origin_info.db`](./artix7/segbits_hclk_cmt.origin_info.db)
- * [`171f485e3c1f5e2bd3d9b337907a5168a2ae0aaa085f587c677888aed22a8641  ./artix7/segbits_hclk_cmt_l.db`](./artix7/segbits_hclk_cmt_l.db)
- * [`5b220c70eb6a270c6ba14a1db95258f7b7111c6928af6faf6451cfbd58e8f752  ./artix7/segbits_hclk_cmt_l.origin_info.db`](./artix7/segbits_hclk_cmt_l.origin_info.db)
+ * [`5d9063c8d4a35b5458573358459ec5e273cf242a97e5d7f1f0c1bf351edf2c63  ./artix7/segbits_hclk_cmt.db`](./artix7/segbits_hclk_cmt.db)
+ * [`01b36f7757bee52cd1bdd78ecefed58b8215732678cef9eec629c21e4e89d7c5  ./artix7/segbits_hclk_cmt.origin_info.db`](./artix7/segbits_hclk_cmt.origin_info.db)
+ * [`92eab3f79b39609fcd131300a63ddca51200ff4bd23b7b759d1e9bbf99543862  ./artix7/segbits_hclk_cmt_l.db`](./artix7/segbits_hclk_cmt_l.db)
+ * [`7f83f0eb6b8d95ab391ab9bdc112de25829fc369c7c11d0ae2911131a6b81e50  ./artix7/segbits_hclk_cmt_l.origin_info.db`](./artix7/segbits_hclk_cmt_l.origin_info.db)
  * [`d1dd602c5c9d1280ed8d65630da5f53a1f95aab18a48adfa26bee7c76311d675  ./artix7/segbits_hclk_ioi3.db`](./artix7/segbits_hclk_ioi3.db)
  * [`52cf99e3a8d10e7b252907d53f9e1565a3e929fbf778331c17dd81c25a7c00ca  ./artix7/segbits_hclk_ioi3.origin_info.db`](./artix7/segbits_hclk_ioi3.origin_info.db)
  * [`1c2c7229781a4a1d51bbbdeea76238b10497c043aaadf2a76de783041a201878  ./artix7/segbits_hclk_l.db`](./artix7/segbits_hclk_l.db)
@@ -262,25 +262,25 @@ Results have checksums;
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./artix7/segbits_hclk_r.db`](./artix7/segbits_hclk_r.db)
  * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0  ./artix7/segbits_hclk_r.origin_info.db`](./artix7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./artix7/segbits_int_l.db`](./artix7/segbits_int_l.db)
- * [`3214a9a31407d83eb883f814d2143009fac780d6525ca97e47205b5015e75d64  ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
+ * [`73060b8def3a9eb1c21e841a1ee39eb33e2daeaf497f1b9d361e01e91a578df0  ./artix7/segbits_int_l.origin_info.db`](./artix7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./artix7/segbits_int_r.db`](./artix7/segbits_int_r.db)
- * [`bfc266c07cb6686ad50e59f0e9a1fcce82b7925928e38708e6a998d25f050103  ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
- * [`cb6ad1ff288077f7430c25ac016d00daf3b5c36dca3f8d5367ea52cc6501b51d  ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
- * [`48b1c11e82e86433446051994d90436b1dba054fe41f8fe43bf18b9a468f6b49  ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db)
- * [`cf4f6a2b44d13e094f588464a902c315080d2150a522e4241c82ca201a4771e0  ./artix7/segbits_lioi3.db`](./artix7/segbits_lioi3.db)
- * [`de8c6b666e22b9004c531b2ac6d586b056c5f3935cb710bc434656f8a29a66e8  ./artix7/segbits_lioi3.origin_info.db`](./artix7/segbits_lioi3.origin_info.db)
- * [`5835e20544b2364f798c3e00c1e26badde89982052e601b1999242a4975de44f  ./artix7/segbits_lioi3_tbytesrc.db`](./artix7/segbits_lioi3_tbytesrc.db)
- * [`07eae2a33315997fb8cfc1780c4b492a80b4931f71ef87d187ac4b68203fdcf6  ./artix7/segbits_lioi3_tbytesrc.origin_info.db`](./artix7/segbits_lioi3_tbytesrc.origin_info.db)
- * [`859993e9655344aa30940e91a26bbba8459d2eb948803d15331a430c93970200  ./artix7/segbits_lioi3_tbyteterm.db`](./artix7/segbits_lioi3_tbyteterm.db)
- * [`1d06fcaa0cce4e3c88c8b819663df448de2a1c1b4d104ba67de04a461f2a5d23  ./artix7/segbits_lioi3_tbyteterm.origin_info.db`](./artix7/segbits_lioi3_tbyteterm.origin_info.db)
- * [`39042dad94143ea5c97eafd34c7c0a72039bc5cf3e70c20dad60de2402ace923  ./artix7/segbits_riob33.db`](./artix7/segbits_riob33.db)
- * [`f7b69a660831ad69cf119bc91dc15acc6e862b822e3821149285a9b0da9539e7  ./artix7/segbits_riob33.origin_info.db`](./artix7/segbits_riob33.origin_info.db)
- * [`ef0db5acddcfe0181445a4045755fa5d8df9daa424b38faca8ac2b6e9cf0fbf8  ./artix7/segbits_rioi3.db`](./artix7/segbits_rioi3.db)
- * [`65821f052354f0b447607c4644cbabc9f6b4f0f567257bcaa71a2c1b622d8092  ./artix7/segbits_rioi3.origin_info.db`](./artix7/segbits_rioi3.origin_info.db)
- * [`71a57e394185b811eedb26f2553b285350858ca2e3a0b8690ed2ec47137e47a2  ./artix7/segbits_rioi3_tbytesrc.db`](./artix7/segbits_rioi3_tbytesrc.db)
- * [`f88090bcbf31a40e1434bcf58280e777b25d8f23cc692cfaa5ba1b4a29052866  ./artix7/segbits_rioi3_tbytesrc.origin_info.db`](./artix7/segbits_rioi3_tbytesrc.origin_info.db)
- * [`cb752d89871afe41862e17434aca16503cd482165e7d6cdb5b6a682b742ca384  ./artix7/segbits_rioi3_tbyteterm.db`](./artix7/segbits_rioi3_tbyteterm.db)
- * [`e2c8db7cb8cee5d3ed7c28bcbe5fb2d40841a467bfd239d547a153ac6c7e45d0  ./artix7/segbits_rioi3_tbyteterm.origin_info.db`](./artix7/segbits_rioi3_tbyteterm.origin_info.db)
+ * [`5cfb63c95c8120bbec05c0f560abe22fe2f62541821e5533e0a94c90cdbb7459  ./artix7/segbits_int_r.origin_info.db`](./artix7/segbits_int_r.origin_info.db)
+ * [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23  ./artix7/segbits_liob33.db`](./artix7/segbits_liob33.db)
+ * [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e  ./artix7/segbits_liob33.origin_info.db`](./artix7/segbits_liob33.origin_info.db)
+ * [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8  ./artix7/segbits_lioi3.db`](./artix7/segbits_lioi3.db)
+ * [`868eb3fb1066b2658e9786925f11569dc2d3e4a5ab1395d9a371737b085d0b24  ./artix7/segbits_lioi3.origin_info.db`](./artix7/segbits_lioi3.origin_info.db)
+ * [`8222fc98a6a9bc6dd50e5178600dddecc3145a51109795b6f0b7e7f85bd8470a  ./artix7/segbits_lioi3_tbytesrc.db`](./artix7/segbits_lioi3_tbytesrc.db)
+ * [`61983925ee089c501fab2e1d7ab0b0efe3fd014436421fe351719a86e477fc09  ./artix7/segbits_lioi3_tbytesrc.origin_info.db`](./artix7/segbits_lioi3_tbytesrc.origin_info.db)
+ * [`796197b351063cada8564de43931ecc657a018a6405e3e497a12946aafea8910  ./artix7/segbits_lioi3_tbyteterm.db`](./artix7/segbits_lioi3_tbyteterm.db)
+ * [`098379913510473b58ff901108835ea64f469dc88f4667f39804c20b4a9b10c2  ./artix7/segbits_lioi3_tbyteterm.origin_info.db`](./artix7/segbits_lioi3_tbyteterm.origin_info.db)
+ * [`ded5f7b0cdadb7558470dbca9102d7293e4237ecb563b5f69821e01b41e4aad1  ./artix7/segbits_riob33.db`](./artix7/segbits_riob33.db)
+ * [`3a62e9a5ca328fd2a6838656759116ab186cb1c50bf4d4e7e3037424bc77903c  ./artix7/segbits_riob33.origin_info.db`](./artix7/segbits_riob33.origin_info.db)
+ * [`874b7f7587a09c22e8514915465ea3c9176e8a6f4c30347bbea02aac073d00b2  ./artix7/segbits_rioi3.db`](./artix7/segbits_rioi3.db)
+ * [`f568eb959ffa1ce070acab8208626b5cba2dcee6bb7ec086232790ceb5508bb8  ./artix7/segbits_rioi3.origin_info.db`](./artix7/segbits_rioi3.origin_info.db)
+ * [`02657f7f1c3b938911a62d88e1719c0936f82c07cd716593608393d44aa283a0  ./artix7/segbits_rioi3_tbytesrc.db`](./artix7/segbits_rioi3_tbytesrc.db)
+ * [`ccb8cf4caf7c3c6260e39142d2ed8650af182ee2406bf83b144be88a25cc65cc  ./artix7/segbits_rioi3_tbytesrc.origin_info.db`](./artix7/segbits_rioi3_tbytesrc.origin_info.db)
+ * [`7eec366b66a06c783ee115f5adba19644b241b8e122885fb845bee8b7850e4ab  ./artix7/segbits_rioi3_tbyteterm.db`](./artix7/segbits_rioi3_tbyteterm.db)
+ * [`8954da61509613655d7641c0e3ebcef5c9a0dd4c0390362cf41752912fd19bff  ./artix7/segbits_rioi3_tbyteterm.origin_info.db`](./artix7/segbits_rioi3_tbyteterm.origin_info.db)
  * [`2bc07bf06b86af1985fe1c76da7bd6d858768dd6d9e99344a3c52d490b797cdb  ./artix7/settings.sh`](./artix7/settings.sh)
  * [`ac6ba9ad814503f0fdc1dabb4292aaccd1a2195f5b348276cfee12aed3d96a70  ./artix7/site_type_BSCAN.json`](./artix7/site_type_BSCAN.json)
  * [`64724ba2f8af98df5e1d92e5c2da2e6d5a41eec6580f796405e271dadb4e63be  ./artix7/site_type_BUFGCTRL.json`](./artix7/site_type_BUFGCTRL.json)
@@ -476,8 +476,8 @@ Results have checksums;
  * [`bda848e132cf93158addf5db6e449dd5d79050155bd2ba52ccad7bd3c1607ec4  ./artix7/timings/CMT_TOP_R_LOWER_T.sdf`](./artix7/timings/CMT_TOP_R_LOWER_T.sdf)
  * [`e56222b18e7fabf7473656f7446958e93373a3bf956ca75968d26f9c652fa14e  ./artix7/timings/CMT_TOP_R_UPPER_B.sdf`](./artix7/timings/CMT_TOP_R_UPPER_B.sdf)
  * [`24408756edd72f9c82dc2badb3e94e372916c00c407e86a88db1274f8951d721  ./artix7/timings/CMT_TOP_R_UPPER_T.sdf`](./artix7/timings/CMT_TOP_R_UPPER_T.sdf)
- * [`a1945d3cc9f7a422691d7cad098dc61cf6804bdbb8df8c572576d651e0f44c44  ./artix7/timings/DSP_L.sdf`](./artix7/timings/DSP_L.sdf)
- * [`a1945d3cc9f7a422691d7cad098dc61cf6804bdbb8df8c572576d651e0f44c44  ./artix7/timings/DSP_R.sdf`](./artix7/timings/DSP_R.sdf)
+ * [`3f9923d175379d32f859a8d3e07992c0174cabe3b260c14b69394009fa1d0569  ./artix7/timings/DSP_L.sdf`](./artix7/timings/DSP_L.sdf)
+ * [`3f9923d175379d32f859a8d3e07992c0174cabe3b260c14b69394009fa1d0569  ./artix7/timings/DSP_R.sdf`](./artix7/timings/DSP_R.sdf)
  * [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff  ./artix7/timings/GTP_CHANNEL_0.sdf`](./artix7/timings/GTP_CHANNEL_0.sdf)
  * [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff  ./artix7/timings/GTP_CHANNEL_1.sdf`](./artix7/timings/GTP_CHANNEL_1.sdf)
  * [`fd93513fb5389752c1f1716bf15c2d3d118666e9f968533bb50d845504deb5ff  ./artix7/timings/GTP_CHANNEL_2.sdf`](./artix7/timings/GTP_CHANNEL_2.sdf)
@@ -540,7 +540,7 @@ Results have checksums;
 
 ### Settings
 
-Created using following [settings/kintex7.sh (sha256: 845b1414faf8d98843ae2886a273625000548289cc8f0d3635c94599d38cdb81)](https://github.com/SymbiFlow/prjxray/blob/85ccaa09b464295ed1812008ecb066b475393cb9/settings/kintex7.sh)
+Created using following [settings/kintex7.sh (sha256: 845b1414faf8d98843ae2886a273625000548289cc8f0d3635c94599d38cdb81)](https://github.com/SymbiFlow/prjxray/blob/7ddd5f88e60c9876a6d7171b343c1c855239dc85/settings/kintex7.sh)
 ```shell
 export XRAY_DATABASE="kintex7"
 export XRAY_PART="xc7k70tfbg676-2"
@@ -603,8 +603,8 @@ Results have checksums;
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./kintex7/mask_dsp_l.origin_info.db`](./kintex7/mask_dsp_l.origin_info.db)
  * [`54ce9ba489d62d7ef53b5e234c8e51591f254b707475c176ab0515a09a352f32  ./kintex7/mask_dsp_r.db`](./kintex7/mask_dsp_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./kintex7/mask_dsp_r.origin_info.db`](./kintex7/mask_dsp_r.origin_info.db)
- * [`be757fb834be7ff84a2873c0ac6621c909a5e85362b397667760edde86616f84  ./kintex7/mask_hclk_cmt.db`](./kintex7/mask_hclk_cmt.db)
- * [`be757fb834be7ff84a2873c0ac6621c909a5e85362b397667760edde86616f84  ./kintex7/mask_hclk_cmt_l.db`](./kintex7/mask_hclk_cmt_l.db)
+ * [`c714c25d06cc5d3b7947e638f55c5268b01792cb2d86320a5411d00387ada404  ./kintex7/mask_hclk_cmt.db`](./kintex7/mask_hclk_cmt.db)
+ * [`c714c25d06cc5d3b7947e638f55c5268b01792cb2d86320a5411d00387ada404  ./kintex7/mask_hclk_cmt_l.db`](./kintex7/mask_hclk_cmt_l.db)
  * [`d0914443ac28056e840aee431bd51933a7cdc6504eefb052113d7e33e8b08e83  ./kintex7/mask_hclk_ioi.db`](./kintex7/mask_hclk_ioi.db)
  * [`49f54d634cddc4d58df9b8a0c371364088c73c1eeaaf87b80c871430aae66077  ./kintex7/mask_hclk_ioi3.db`](./kintex7/mask_hclk_ioi3.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./kintex7/mask_hclk_l.db`](./kintex7/mask_hclk_l.db)
@@ -706,10 +706,10 @@ Results have checksums;
  * [`10a6e47f7b26f0d21cf0a011d4a5f2a4266538bb8d028a07fd981323dc1f0da0  ./kintex7/segbits_dsp_l.origin_info.db`](./kintex7/segbits_dsp_l.origin_info.db)
  * [`f81459ae1c84e0e73815c4577a7d0b19b497dd7f16029763c3fc4f3b8410dcc2  ./kintex7/segbits_dsp_r.db`](./kintex7/segbits_dsp_r.db)
  * [`76965c2e6ba2acab8f809a3d947b100fd322ba5b6d88c358bf816699348b07bf  ./kintex7/segbits_dsp_r.origin_info.db`](./kintex7/segbits_dsp_r.origin_info.db)
- * [`b7fc6cf18898ea037285ec9364405cc9adac3338ff7312dcd3de4346bfdf254b  ./kintex7/segbits_hclk_cmt.db`](./kintex7/segbits_hclk_cmt.db)
- * [`999de4e875bda301d678cf84e2706a5412cd1fa0f8750825974f197aabfb431d  ./kintex7/segbits_hclk_cmt.origin_info.db`](./kintex7/segbits_hclk_cmt.origin_info.db)
- * [`171f485e3c1f5e2bd3d9b337907a5168a2ae0aaa085f587c677888aed22a8641  ./kintex7/segbits_hclk_cmt_l.db`](./kintex7/segbits_hclk_cmt_l.db)
- * [`5b220c70eb6a270c6ba14a1db95258f7b7111c6928af6faf6451cfbd58e8f752  ./kintex7/segbits_hclk_cmt_l.origin_info.db`](./kintex7/segbits_hclk_cmt_l.origin_info.db)
+ * [`5d9063c8d4a35b5458573358459ec5e273cf242a97e5d7f1f0c1bf351edf2c63  ./kintex7/segbits_hclk_cmt.db`](./kintex7/segbits_hclk_cmt.db)
+ * [`01b36f7757bee52cd1bdd78ecefed58b8215732678cef9eec629c21e4e89d7c5  ./kintex7/segbits_hclk_cmt.origin_info.db`](./kintex7/segbits_hclk_cmt.origin_info.db)
+ * [`92eab3f79b39609fcd131300a63ddca51200ff4bd23b7b759d1e9bbf99543862  ./kintex7/segbits_hclk_cmt_l.db`](./kintex7/segbits_hclk_cmt_l.db)
+ * [`7f83f0eb6b8d95ab391ab9bdc112de25829fc369c7c11d0ae2911131a6b81e50  ./kintex7/segbits_hclk_cmt_l.origin_info.db`](./kintex7/segbits_hclk_cmt_l.origin_info.db)
  * [`d1dd602c5c9d1280ed8d65630da5f53a1f95aab18a48adfa26bee7c76311d675  ./kintex7/segbits_hclk_ioi3.db`](./kintex7/segbits_hclk_ioi3.db)
  * [`52cf99e3a8d10e7b252907d53f9e1565a3e929fbf778331c17dd81c25a7c00ca  ./kintex7/segbits_hclk_ioi3.origin_info.db`](./kintex7/segbits_hclk_ioi3.origin_info.db)
  * [`1c2c7229781a4a1d51bbbdeea76238b10497c043aaadf2a76de783041a201878  ./kintex7/segbits_hclk_l.db`](./kintex7/segbits_hclk_l.db)
@@ -717,25 +717,25 @@ Results have checksums;
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./kintex7/segbits_hclk_r.db`](./kintex7/segbits_hclk_r.db)
  * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0  ./kintex7/segbits_hclk_r.origin_info.db`](./kintex7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./kintex7/segbits_int_l.db`](./kintex7/segbits_int_l.db)
- * [`e2431950aa46bd756c8beb38541820bd43ba0c18d91ad4567a4f8a6cd26187a9  ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
+ * [`c39c5a5ac18cbabc04214f3d812efc99d3312d58ba8449da7bb63d70c4af41e6  ./kintex7/segbits_int_l.origin_info.db`](./kintex7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./kintex7/segbits_int_r.db`](./kintex7/segbits_int_r.db)
- * [`87bce6fe3bb1228ce6e8dff1f8a4c34735a8818dfc4b7524633cd360c3c21077  ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
- * [`cb6ad1ff288077f7430c25ac016d00daf3b5c36dca3f8d5367ea52cc6501b51d  ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db)
- * [`48b1c11e82e86433446051994d90436b1dba054fe41f8fe43bf18b9a468f6b49  ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db)
- * [`87adc9bb57b446e57722145e6461085763a5f0e690558e96c2581ea623b36071  ./kintex7/segbits_lioi3.db`](./kintex7/segbits_lioi3.db)
- * [`ac3c8c024a554c18f4378cc720f47319d102bb435be35a9cc1809fe5a678d842  ./kintex7/segbits_lioi3.origin_info.db`](./kintex7/segbits_lioi3.origin_info.db)
- * [`5ce44e654b750b72090c2f3f00fbacb5acc338f9647ffb061b336331f812b488  ./kintex7/segbits_lioi3_tbytesrc.db`](./kintex7/segbits_lioi3_tbytesrc.db)
- * [`9112812c7da07f5c5fffa01a773484bfe592af9021d871be0c0e5ba4901f69fd  ./kintex7/segbits_lioi3_tbytesrc.origin_info.db`](./kintex7/segbits_lioi3_tbytesrc.origin_info.db)
- * [`23ee01e24c5831233c4213234eec53e5f0b55a291a8205e8954275d0da1363ae  ./kintex7/segbits_lioi3_tbyteterm.db`](./kintex7/segbits_lioi3_tbyteterm.db)
- * [`ced0bcac7d938f4231fb2c6653e86e02932fb2994830d128892889fc3b63bef4  ./kintex7/segbits_lioi3_tbyteterm.origin_info.db`](./kintex7/segbits_lioi3_tbyteterm.origin_info.db)
- * [`39042dad94143ea5c97eafd34c7c0a72039bc5cf3e70c20dad60de2402ace923  ./kintex7/segbits_riob33.db`](./kintex7/segbits_riob33.db)
- * [`f7b69a660831ad69cf119bc91dc15acc6e862b822e3821149285a9b0da9539e7  ./kintex7/segbits_riob33.origin_info.db`](./kintex7/segbits_riob33.origin_info.db)
- * [`4210f9eb79cffe057f850a853b49e3cf18f7378e7e9e081d4a05afa534be9bf2  ./kintex7/segbits_rioi3.db`](./kintex7/segbits_rioi3.db)
- * [`8e046515cca08233bc3c6e5642452f8cb1242d31b1ddf2cfd34d723f00500f01  ./kintex7/segbits_rioi3.origin_info.db`](./kintex7/segbits_rioi3.origin_info.db)
- * [`d4d3718a5759779146849fd66e663409d5a20b9ec045350933722292f67e6c4a  ./kintex7/segbits_rioi3_tbytesrc.db`](./kintex7/segbits_rioi3_tbytesrc.db)
- * [`aaee1f08defd391778cea437ffac6cefbdead130d4d64ee6b481fe194ee2a539  ./kintex7/segbits_rioi3_tbytesrc.origin_info.db`](./kintex7/segbits_rioi3_tbytesrc.origin_info.db)
- * [`45c407baa67d748fecc3b8609f4ad83e2e0a3aef32b68acbce93f91b781d655d  ./kintex7/segbits_rioi3_tbyteterm.db`](./kintex7/segbits_rioi3_tbyteterm.db)
- * [`b8150654811974b56090027a31843887a9d805baf1caee789d5c4bde8654e7a8  ./kintex7/segbits_rioi3_tbyteterm.origin_info.db`](./kintex7/segbits_rioi3_tbyteterm.origin_info.db)
+ * [`ff35290c25f59a62cb25016b2c601a78cd9a4f139cb0bcc9840895fafef585a7  ./kintex7/segbits_int_r.origin_info.db`](./kintex7/segbits_int_r.origin_info.db)
+ * [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23  ./kintex7/segbits_liob33.db`](./kintex7/segbits_liob33.db)
+ * [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e  ./kintex7/segbits_liob33.origin_info.db`](./kintex7/segbits_liob33.origin_info.db)
+ * [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8  ./kintex7/segbits_lioi3.db`](./kintex7/segbits_lioi3.db)
+ * [`868eb3fb1066b2658e9786925f11569dc2d3e4a5ab1395d9a371737b085d0b24  ./kintex7/segbits_lioi3.origin_info.db`](./kintex7/segbits_lioi3.origin_info.db)
+ * [`8222fc98a6a9bc6dd50e5178600dddecc3145a51109795b6f0b7e7f85bd8470a  ./kintex7/segbits_lioi3_tbytesrc.db`](./kintex7/segbits_lioi3_tbytesrc.db)
+ * [`61983925ee089c501fab2e1d7ab0b0efe3fd014436421fe351719a86e477fc09  ./kintex7/segbits_lioi3_tbytesrc.origin_info.db`](./kintex7/segbits_lioi3_tbytesrc.origin_info.db)
+ * [`796197b351063cada8564de43931ecc657a018a6405e3e497a12946aafea8910  ./kintex7/segbits_lioi3_tbyteterm.db`](./kintex7/segbits_lioi3_tbyteterm.db)
+ * [`098379913510473b58ff901108835ea64f469dc88f4667f39804c20b4a9b10c2  ./kintex7/segbits_lioi3_tbyteterm.origin_info.db`](./kintex7/segbits_lioi3_tbyteterm.origin_info.db)
+ * [`ded5f7b0cdadb7558470dbca9102d7293e4237ecb563b5f69821e01b41e4aad1  ./kintex7/segbits_riob33.db`](./kintex7/segbits_riob33.db)
+ * [`3a62e9a5ca328fd2a6838656759116ab186cb1c50bf4d4e7e3037424bc77903c  ./kintex7/segbits_riob33.origin_info.db`](./kintex7/segbits_riob33.origin_info.db)
+ * [`874b7f7587a09c22e8514915465ea3c9176e8a6f4c30347bbea02aac073d00b2  ./kintex7/segbits_rioi3.db`](./kintex7/segbits_rioi3.db)
+ * [`f568eb959ffa1ce070acab8208626b5cba2dcee6bb7ec086232790ceb5508bb8  ./kintex7/segbits_rioi3.origin_info.db`](./kintex7/segbits_rioi3.origin_info.db)
+ * [`02657f7f1c3b938911a62d88e1719c0936f82c07cd716593608393d44aa283a0  ./kintex7/segbits_rioi3_tbytesrc.db`](./kintex7/segbits_rioi3_tbytesrc.db)
+ * [`ccb8cf4caf7c3c6260e39142d2ed8650af182ee2406bf83b144be88a25cc65cc  ./kintex7/segbits_rioi3_tbytesrc.origin_info.db`](./kintex7/segbits_rioi3_tbytesrc.origin_info.db)
+ * [`7eec366b66a06c783ee115f5adba19644b241b8e122885fb845bee8b7850e4ab  ./kintex7/segbits_rioi3_tbyteterm.db`](./kintex7/segbits_rioi3_tbyteterm.db)
+ * [`8954da61509613655d7641c0e3ebcef5c9a0dd4c0390362cf41752912fd19bff  ./kintex7/segbits_rioi3_tbyteterm.origin_info.db`](./kintex7/segbits_rioi3_tbyteterm.origin_info.db)
  * [`c4fe49753a5ba6b4abc688337d5df26f2101ccfca3dd4270ca77e39e5221bfe9  ./kintex7/settings.sh`](./kintex7/settings.sh)
  * [`ac6ba9ad814503f0fdc1dabb4292aaccd1a2195f5b348276cfee12aed3d96a70  ./kintex7/site_type_BSCAN.json`](./kintex7/site_type_BSCAN.json)
  * [`64724ba2f8af98df5e1d92e5c2da2e6d5a41eec6580f796405e271dadb4e63be  ./kintex7/site_type_BUFGCTRL.json`](./kintex7/site_type_BUFGCTRL.json)
@@ -912,7 +912,7 @@ Results have checksums;
 
 ### Settings
 
-Created using following [settings/zynq7.sh (sha256: b2055ef65885124f2f229a181100b6b73852464aa260b38691a4d84aa351475b)](https://github.com/SymbiFlow/prjxray/blob/85ccaa09b464295ed1812008ecb066b475393cb9/settings/zynq7.sh)
+Created using following [settings/zynq7.sh (sha256: b2055ef65885124f2f229a181100b6b73852464aa260b38691a4d84aa351475b)](https://github.com/SymbiFlow/prjxray/blob/7ddd5f88e60c9876a6d7171b343c1c855239dc85/settings/zynq7.sh)
 ```shell
 export XRAY_DATABASE="zynq7"
 export XRAY_PART="xc7z020clg484-1"
@@ -978,8 +978,8 @@ Results have checksums;
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/mask_dsp_l.origin_info.db`](./zynq7/mask_dsp_l.origin_info.db)
  * [`737dd6a42bad544ae596da9e5be353e4cc39f20dff304f524c1c9ae4d62b9fb5  ./zynq7/mask_dsp_r.db`](./zynq7/mask_dsp_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/mask_dsp_r.origin_info.db`](./zynq7/mask_dsp_r.origin_info.db)
- * [`be757fb834be7ff84a2873c0ac6621c909a5e85362b397667760edde86616f84  ./zynq7/mask_hclk_cmt.db`](./zynq7/mask_hclk_cmt.db)
- * [`be757fb834be7ff84a2873c0ac6621c909a5e85362b397667760edde86616f84  ./zynq7/mask_hclk_cmt_l.db`](./zynq7/mask_hclk_cmt_l.db)
+ * [`c714c25d06cc5d3b7947e638f55c5268b01792cb2d86320a5411d00387ada404  ./zynq7/mask_hclk_cmt.db`](./zynq7/mask_hclk_cmt.db)
+ * [`c714c25d06cc5d3b7947e638f55c5268b01792cb2d86320a5411d00387ada404  ./zynq7/mask_hclk_cmt_l.db`](./zynq7/mask_hclk_cmt_l.db)
  * [`d0914443ac28056e840aee431bd51933a7cdc6504eefb052113d7e33e8b08e83  ./zynq7/mask_hclk_ioi.db`](./zynq7/mask_hclk_ioi.db)
  * [`49f54d634cddc4d58df9b8a0c371364088c73c1eeaaf87b80c871430aae66077  ./zynq7/mask_hclk_ioi3.db`](./zynq7/mask_hclk_ioi3.db)
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./zynq7/mask_hclk_l.db`](./zynq7/mask_hclk_l.db)
@@ -987,13 +987,13 @@ Results have checksums;
  * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd  ./zynq7/mask_hclk_r.db`](./zynq7/mask_hclk_r.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/mask_hclk_r.origin_info.db`](./zynq7/mask_hclk_r.origin_info.db)
  * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db)
- * [`51684d38978e8b8c21661d5c8c43af6630cdd3bcb9b5b5db86022ba4ea689453  ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db)
- * [`51684d38978e8b8c21661d5c8c43af6630cdd3bcb9b5b5db86022ba4ea689453  ./zynq7/mask_lioi3_tbytesrc.db`](./zynq7/mask_lioi3_tbytesrc.db)
- * [`51684d38978e8b8c21661d5c8c43af6630cdd3bcb9b5b5db86022ba4ea689453  ./zynq7/mask_lioi3_tbyteterm.db`](./zynq7/mask_lioi3_tbyteterm.db)
+ * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576  ./zynq7/mask_lioi3.db`](./zynq7/mask_lioi3.db)
+ * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576  ./zynq7/mask_lioi3_tbytesrc.db`](./zynq7/mask_lioi3_tbytesrc.db)
+ * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576  ./zynq7/mask_lioi3_tbyteterm.db`](./zynq7/mask_lioi3_tbyteterm.db)
  * [`a0777dc0808e70052a6f6b2e1056f6e9dd225032c01195919d927be7ba1b97d6  ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db)
- * [`51684d38978e8b8c21661d5c8c43af6630cdd3bcb9b5b5db86022ba4ea689453  ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db)
- * [`51684d38978e8b8c21661d5c8c43af6630cdd3bcb9b5b5db86022ba4ea689453  ./zynq7/mask_rioi3_tbytesrc.db`](./zynq7/mask_rioi3_tbytesrc.db)
- * [`51684d38978e8b8c21661d5c8c43af6630cdd3bcb9b5b5db86022ba4ea689453  ./zynq7/mask_rioi3_tbyteterm.db`](./zynq7/mask_rioi3_tbyteterm.db)
+ * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576  ./zynq7/mask_rioi3.db`](./zynq7/mask_rioi3.db)
+ * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576  ./zynq7/mask_rioi3_tbytesrc.db`](./zynq7/mask_rioi3_tbytesrc.db)
+ * [`e189322ecc5395aaff1b7100fc3ef5f259b7f1425a05a4464835eacc509a2576  ./zynq7/mask_rioi3_tbyteterm.db`](./zynq7/mask_rioi3_tbyteterm.db)
  * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf  ./zynq7/ppips_bram_int_interface_l.db`](./zynq7/ppips_bram_int_interface_l.db)
  * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855  ./zynq7/ppips_bram_int_interface_l.origin_info.db`](./zynq7/ppips_bram_int_interface_l.origin_info.db)
  * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae  ./zynq7/ppips_bram_int_interface_r.db`](./zynq7/ppips_bram_int_interface_r.db)
@@ -1092,10 +1092,10 @@ Results have checksums;
  * [`10a6e47f7b26f0d21cf0a011d4a5f2a4266538bb8d028a07fd981323dc1f0da0  ./zynq7/segbits_dsp_l.origin_info.db`](./zynq7/segbits_dsp_l.origin_info.db)
  * [`f81459ae1c84e0e73815c4577a7d0b19b497dd7f16029763c3fc4f3b8410dcc2  ./zynq7/segbits_dsp_r.db`](./zynq7/segbits_dsp_r.db)
  * [`76965c2e6ba2acab8f809a3d947b100fd322ba5b6d88c358bf816699348b07bf  ./zynq7/segbits_dsp_r.origin_info.db`](./zynq7/segbits_dsp_r.origin_info.db)
- * [`b7fc6cf18898ea037285ec9364405cc9adac3338ff7312dcd3de4346bfdf254b  ./zynq7/segbits_hclk_cmt.db`](./zynq7/segbits_hclk_cmt.db)
- * [`999de4e875bda301d678cf84e2706a5412cd1fa0f8750825974f197aabfb431d  ./zynq7/segbits_hclk_cmt.origin_info.db`](./zynq7/segbits_hclk_cmt.origin_info.db)
- * [`171f485e3c1f5e2bd3d9b337907a5168a2ae0aaa085f587c677888aed22a8641  ./zynq7/segbits_hclk_cmt_l.db`](./zynq7/segbits_hclk_cmt_l.db)
- * [`5b220c70eb6a270c6ba14a1db95258f7b7111c6928af6faf6451cfbd58e8f752  ./zynq7/segbits_hclk_cmt_l.origin_info.db`](./zynq7/segbits_hclk_cmt_l.origin_info.db)
+ * [`5d9063c8d4a35b5458573358459ec5e273cf242a97e5d7f1f0c1bf351edf2c63  ./zynq7/segbits_hclk_cmt.db`](./zynq7/segbits_hclk_cmt.db)
+ * [`01b36f7757bee52cd1bdd78ecefed58b8215732678cef9eec629c21e4e89d7c5  ./zynq7/segbits_hclk_cmt.origin_info.db`](./zynq7/segbits_hclk_cmt.origin_info.db)
+ * [`92eab3f79b39609fcd131300a63ddca51200ff4bd23b7b759d1e9bbf99543862  ./zynq7/segbits_hclk_cmt_l.db`](./zynq7/segbits_hclk_cmt_l.db)
+ * [`7f83f0eb6b8d95ab391ab9bdc112de25829fc369c7c11d0ae2911131a6b81e50  ./zynq7/segbits_hclk_cmt_l.origin_info.db`](./zynq7/segbits_hclk_cmt_l.origin_info.db)
  * [`d1dd602c5c9d1280ed8d65630da5f53a1f95aab18a48adfa26bee7c76311d675  ./zynq7/segbits_hclk_ioi3.db`](./zynq7/segbits_hclk_ioi3.db)
  * [`52cf99e3a8d10e7b252907d53f9e1565a3e929fbf778331c17dd81c25a7c00ca  ./zynq7/segbits_hclk_ioi3.origin_info.db`](./zynq7/segbits_hclk_ioi3.origin_info.db)
  * [`1c2c7229781a4a1d51bbbdeea76238b10497c043aaadf2a76de783041a201878  ./zynq7/segbits_hclk_l.db`](./zynq7/segbits_hclk_l.db)
@@ -1103,19 +1103,19 @@ Results have checksums;
  * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9  ./zynq7/segbits_hclk_r.db`](./zynq7/segbits_hclk_r.db)
  * [`61d05145f3613042e8f0c1d97d63f6c185cfb66df609b621b44422ebb27c77a0  ./zynq7/segbits_hclk_r.origin_info.db`](./zynq7/segbits_hclk_r.origin_info.db)
  * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520  ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db)
- * [`6bbd7f59ec50e0617c7c470240e89e2dde66122a5fa6b6f20967e74abe960836  ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
+ * [`64548d858388d8f6f6e20a316d850abe54fbb273f893aebdd73f53f7081a5372  ./zynq7/segbits_int_l.origin_info.db`](./zynq7/segbits_int_l.origin_info.db)
  * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556  ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db)
- * [`818d62fe6c24003ccc47edaf01bb2b4f17cc2ccefb8d0d871db7418537a6857a  ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
- * [`cb6ad1ff288077f7430c25ac016d00daf3b5c36dca3f8d5367ea52cc6501b51d  ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db)
- * [`48b1c11e82e86433446051994d90436b1dba054fe41f8fe43bf18b9a468f6b49  ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db)
+ * [`14d19389a75ae50f8a6b6608a4ca90513de4c5ba844f6d9ac08900544cd25880  ./zynq7/segbits_int_r.origin_info.db`](./zynq7/segbits_int_r.origin_info.db)
+ * [`392e91def4df6eebb3ce5ed15570c01f6090be793a79054e1880549082eb6f23  ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db)
+ * [`0fca9c6530589b14c77b738e68c63ed4246713e44e1e699e153b69907e77e09e  ./zynq7/segbits_liob33.origin_info.db`](./zynq7/segbits_liob33.origin_info.db)
  * [`c9dfa75f8b565b3c47813cdf7f1df2aa7c59402f41396e939dd97ec68f7638d8  ./zynq7/segbits_lioi3.db`](./zynq7/segbits_lioi3.db)
  * [`868eb3fb1066b2658e9786925f11569dc2d3e4a5ab1395d9a371737b085d0b24  ./zynq7/segbits_lioi3.origin_info.db`](./zynq7/segbits_lioi3.origin_info.db)
  * [`8222fc98a6a9bc6dd50e5178600dddecc3145a51109795b6f0b7e7f85bd8470a  ./zynq7/segbits_lioi3_tbytesrc.db`](./zynq7/segbits_lioi3_tbytesrc.db)
  * [`61983925ee089c501fab2e1d7ab0b0efe3fd014436421fe351719a86e477fc09  ./zynq7/segbits_lioi3_tbytesrc.origin_info.db`](./zynq7/segbits_lioi3_tbytesrc.origin_info.db)
  * [`796197b351063cada8564de43931ecc657a018a6405e3e497a12946aafea8910  ./zynq7/segbits_lioi3_tbyteterm.db`](./zynq7/segbits_lioi3_tbyteterm.db)
  * [`098379913510473b58ff901108835ea64f469dc88f4667f39804c20b4a9b10c2  ./zynq7/segbits_lioi3_tbyteterm.origin_info.db`](./zynq7/segbits_lioi3_tbyteterm.origin_info.db)
- * [`39042dad94143ea5c97eafd34c7c0a72039bc5cf3e70c20dad60de2402ace923  ./zynq7/segbits_riob33.db`](./zynq7/segbits_riob33.db)
- * [`f7b69a660831ad69cf119bc91dc15acc6e862b822e3821149285a9b0da9539e7  ./zynq7/segbits_riob33.origin_info.db`](./zynq7/segbits_riob33.origin_info.db)
+ * [`ded5f7b0cdadb7558470dbca9102d7293e4237ecb563b5f69821e01b41e4aad1  ./zynq7/segbits_riob33.db`](./zynq7/segbits_riob33.db)
+ * [`3a62e9a5ca328fd2a6838656759116ab186cb1c50bf4d4e7e3037424bc77903c  ./zynq7/segbits_riob33.origin_info.db`](./zynq7/segbits_riob33.origin_info.db)
  * [`874b7f7587a09c22e8514915465ea3c9176e8a6f4c30347bbea02aac073d00b2  ./zynq7/segbits_rioi3.db`](./zynq7/segbits_rioi3.db)
  * [`f568eb959ffa1ce070acab8208626b5cba2dcee6bb7ec086232790ceb5508bb8  ./zynq7/segbits_rioi3.origin_info.db`](./zynq7/segbits_rioi3.origin_info.db)
  * [`02657f7f1c3b938911a62d88e1719c0936f82c07cd716593608393d44aa283a0  ./zynq7/segbits_rioi3_tbytesrc.db`](./zynq7/segbits_rioi3_tbytesrc.db)
@@ -1293,12 +1293,12 @@ Results have checksums;
  * [`bda848e132cf93158addf5db6e449dd5d79050155bd2ba52ccad7bd3c1607ec4  ./zynq7/timings/CMT_TOP_R_LOWER_T.sdf`](./zynq7/timings/CMT_TOP_R_LOWER_T.sdf)
  * [`e56222b18e7fabf7473656f7446958e93373a3bf956ca75968d26f9c652fa14e  ./zynq7/timings/CMT_TOP_R_UPPER_B.sdf`](./zynq7/timings/CMT_TOP_R_UPPER_B.sdf)
  * [`24408756edd72f9c82dc2badb3e94e372916c00c407e86a88db1274f8951d721  ./zynq7/timings/CMT_TOP_R_UPPER_T.sdf`](./zynq7/timings/CMT_TOP_R_UPPER_T.sdf)
- * [`f9dc790354ec061813a023ae9e01a80d6db8f0800d7550e86966aea5be26f903  ./zynq7/timings/DSP_L.sdf`](./zynq7/timings/DSP_L.sdf)
- * [`f9dc790354ec061813a023ae9e01a80d6db8f0800d7550e86966aea5be26f903  ./zynq7/timings/DSP_R.sdf`](./zynq7/timings/DSP_R.sdf)
+ * [`a1945d3cc9f7a422691d7cad098dc61cf6804bdbb8df8c572576d651e0f44c44  ./zynq7/timings/DSP_L.sdf`](./zynq7/timings/DSP_L.sdf)
+ * [`a1945d3cc9f7a422691d7cad098dc61cf6804bdbb8df8c572576d651e0f44c44  ./zynq7/timings/DSP_R.sdf`](./zynq7/timings/DSP_R.sdf)
  * [`5afccb72fdc7e9a452988e5db5dd7517ab38792ba21af020f9f1885f686ae5a3  ./zynq7/timings/HCLK_CMT.sdf`](./zynq7/timings/HCLK_CMT.sdf)
  * [`5afccb72fdc7e9a452988e5db5dd7517ab38792ba21af020f9f1885f686ae5a3  ./zynq7/timings/HCLK_CMT_L.sdf`](./zynq7/timings/HCLK_CMT_L.sdf)
  * [`b5d5ca72d453879fca2bf2470fb0a670ebfb38d6e85cdbfdb3967e2e4f59ee73  ./zynq7/timings/HCLK_IOI3.sdf`](./zynq7/timings/HCLK_IOI3.sdf)
- * [`9313a012de7cbb7120baf15fe30bf8d44b238cad6226ece1a9776746e2857863  ./zynq7/timings/LIOB33.sdf`](./zynq7/timings/LIOB33.sdf)
+ * [`a64ba6e07bedc352898bc06d44b3677111739e9c0ecdf989fa57f1a200547b14  ./zynq7/timings/LIOB33.sdf`](./zynq7/timings/LIOB33.sdf)
  * [`0fdaf6a593346b5cac8899eebf4f62d1732d6d6fb0a17c9f4b6a4e54e03c3523  ./zynq7/timings/LIOB33_SING.sdf`](./zynq7/timings/LIOB33_SING.sdf)
  * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1  ./zynq7/timings/LIOI3.sdf`](./zynq7/timings/LIOI3.sdf)
  * [`3bb5a39c36bcd83a540200072baa4c36057960fa1e35f5fcba875f2a755c34a1  ./zynq7/timings/LIOI3_SING.sdf`](./zynq7/timings/LIOI3_SING.sdf)
diff --git a/artix7/harness/arty-a7/pmod/design.json b/artix7/harness/arty-a7/pmod/design.json
index 55d4152..d9168e7 100644
--- a/artix7/harness/arty-a7/pmod/design.json
+++ b/artix7/harness/arty-a7/pmod/design.json
@@ -1062,44 +1062,44 @@
         "INT_R_X23Y46.IMUX24.SE2END0",
         "LIOB33_SING_X0Y99.IOB_Y1.IN_TERM.NONE",
         "LIOB33_SING_X0Y99.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_SING_X0Y99.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_SING_X0Y99.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_SING_X0Y99.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_SING_X0Y99.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y3.IOB_Y0.IN_TERM.NONE",
-        "LIOB33_X0Y3.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y3.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y3.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y3.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y3.IOB_Y1.IN_TERM.NONE",
-        "LIOB33_X0Y3.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y3.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y3.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y3.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y5.IOB_Y0.IN_TERM.NONE",
-        "LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y5.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y5.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y5.IOB_Y1.IN_TERM.NONE",
-        "LIOB33_X0Y5.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y5.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y5.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y5.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y7.IOB_Y0.IN_TERM.NONE",
-        "LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y7.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y7.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y7.IOB_Y1.IN_TERM.NONE",
-        "LIOB33_X0Y7.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y7.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y7.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y7.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y9.IOB_Y0.IN_TERM.NONE",
-        "LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y9.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y9.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y9.IOB_Y1.IN_TERM.NONE",
-        "LIOB33_X0Y9.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y9.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y9.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y9.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y43.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
         "LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE",
@@ -1107,42 +1107,42 @@
         "LIOB33_X0Y43.IOB_Y1.PULLTYPE.PULLDOWN",
         "LIOB33_X0Y51.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y51.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y51.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y51.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y51.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y51.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y51.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y51.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y51.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y51.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y51.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y51.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y53.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y53.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y53.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y53.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y53.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y53.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y53.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y53.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y53.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y53.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y53.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y53.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y75.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y75.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y75.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y75.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y75.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y75.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y77.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y77.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y77.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y77.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y77.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y77.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y77.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y77.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y77.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y77.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y77.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y77.IOB_Y1.PULLTYPE.NONE",
         "LIOI3_SING_X0Y99.IDELAY_Y1.IDELAY_TYPE_FIXED",
diff --git a/artix7/harness/arty-a7/swbut/design.json b/artix7/harness/arty-a7/swbut/design.json
index 0115b14..aece7d5 100644
--- a/artix7/harness/arty-a7/swbut/design.json
+++ b/artix7/harness/arty-a7/swbut/design.json
@@ -846,16 +846,16 @@
         "INT_R_X43Y61.SR1BEG_S0.WW4END_S0_0",
         "INT_R_X43Y63.SS6BEG0.SE6END0",
         "LIOB33_X0Y1.IOB_Y0.IN_TERM.NONE",
-        "LIOB33_X0Y1.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y1.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y1.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y1.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y1.IOB_Y1.IN_TERM.NONE",
-        "LIOB33_X0Y1.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y1.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y1.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y1.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y43.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
         "LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE",
@@ -863,7 +863,7 @@
         "LIOB33_X0Y43.IOB_Y1.PULLTYPE.PULLDOWN",
         "LIOB33_X0Y121.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y121.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y121.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y121.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y121.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y121.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y121.IOB_Y1.IN_TERM.NONE",
@@ -871,32 +871,32 @@
         "LIOB33_X0Y121.IOB_Y1.PULLTYPE.PULLDOWN",
         "LIOB33_X0Y123.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y123.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y123.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y123.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y123.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y123.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y123.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y123.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y123.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y123.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y123.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y123.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y125.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y125.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y125.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y125.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y125.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y125.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y125.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y125.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y125.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y125.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y125.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y125.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y127.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y127.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y127.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y127.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y127.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y127.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y127.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y127.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y127.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y127.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y127.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y127.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y137.IOB_Y0.IN_TERM.NONE",
@@ -904,7 +904,7 @@
         "LIOB33_X0Y137.IOB_Y0.PULLTYPE.PULLDOWN",
         "LIOB33_X0Y137.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y137.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y137.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y137.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y137.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y137.IOB_Y1.PULLTYPE.NONE",
         "LIOI3_TBYTETERM_X0Y137.IDELAY_Y0.IDELAY_TYPE_FIXED",
@@ -934,26 +934,26 @@
         "LIOI3_X0Y127.ILOGIC_Y0.ZINV_D",
         "LIOI3_X0Y127.ILOGIC_Y1.ZINV_D",
         "RIOB33_SING_X43Y50.IOB_Y0.IN_TERM.NONE",
-        "RIOB33_SING_X43Y50.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "RIOB33_SING_X43Y50.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "RIOB33_SING_X43Y50.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "RIOB33_SING_X43Y50.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y51.IOB_Y0.IN_TERM.NONE",
-        "RIOB33_X43Y51.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "RIOB33_X43Y51.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "RIOB33_X43Y51.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "RIOB33_X43Y51.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y51.IOB_Y1.IN_TERM.NONE",
-        "RIOB33_X43Y51.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "RIOB33_X43Y51.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "RIOB33_X43Y51.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "RIOB33_X43Y51.IOB_Y1.PULLTYPE.NONE",
         "RIOB33_X43Y55.IOB_Y0.IN_TERM.NONE",
         "RIOB33_X43Y55.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "RIOB33_X43Y55.IOB_Y0.PULLTYPE.PULLDOWN",
         "RIOB33_X43Y55.IOB_Y1.IN_TERM.NONE",
-        "RIOB33_X43Y55.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "RIOB33_X43Y55.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "RIOB33_X43Y55.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "RIOB33_X43Y55.IOB_Y1.PULLTYPE.NONE",
         "RIOB33_X43Y57.IOB_Y0.IN_TERM.NONE",
-        "RIOB33_X43Y57.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "RIOB33_X43Y57.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "RIOB33_X43Y57.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "RIOB33_X43Y57.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y57.IOB_Y1.IN_TERM.NONE",
@@ -963,12 +963,12 @@
         "RIOB33_X43Y61.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "RIOB33_X43Y61.IOB_Y0.PULLTYPE.PULLDOWN",
         "RIOB33_X43Y61.IOB_Y1.IN_TERM.NONE",
-        "RIOB33_X43Y61.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "RIOB33_X43Y61.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "RIOB33_X43Y61.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "RIOB33_X43Y61.IOB_Y1.PULLTYPE.NONE",
         "RIOB33_X43Y75.IOB_Y0.IN_TERM.NONE",
         "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y75.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "RIOB33_X43Y75.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y75.IOB_Y1.IN_TERM.NONE",
diff --git a/artix7/harness/arty-a7/uart/design.json b/artix7/harness/arty-a7/uart/design.json
index eb899da..1e978d7 100644
--- a/artix7/harness/arty-a7/uart/design.json
+++ b/artix7/harness/arty-a7/uart/design.json
@@ -344,12 +344,12 @@
         "LIOB33_X0Y1.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y1.IOB_Y0.PULLTYPE.PULLDOWN",
         "LIOB33_X0Y1.IOB_Y1.IN_TERM.NONE",
-        "LIOB33_X0Y1.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y1.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y1.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y1.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y43.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
         "LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE",
@@ -359,7 +359,7 @@
         "LIOB33_X0Y111.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y111.IOB_Y0.PULLTYPE.PULLDOWN",
         "LIOB33_X0Y111.IOB_Y1.IN_TERM.NONE",
-        "LIOB33_X0Y111.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y111.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y111.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y111.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y121.IOB_Y0.IN_TERM.NONE",
@@ -367,7 +367,7 @@
         "LIOB33_X0Y121.IOB_Y0.PULLTYPE.PULLDOWN",
         "LIOB33_X0Y121.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y121.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y121.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y121.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y121.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y121.IOB_Y1.PULLTYPE.NONE",
         "LIOI3_X0Y1.IDELAY_Y0.IDELAY_TYPE_FIXED",
@@ -385,7 +385,7 @@
         "LIOI3_X0Y121.ILOGIC_Y1.ZINV_D",
         "RIOB33_X43Y67.IOB_Y0.IN_TERM.NONE",
         "RIOB33_X43Y67.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "RIOB33_X43Y67.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "RIOB33_X43Y67.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y67.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "RIOB33_X43Y67.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y67.IOB_Y1.IN_TERM.NONE",
@@ -393,7 +393,7 @@
         "RIOB33_X43Y67.IOB_Y1.PULLTYPE.PULLDOWN",
         "RIOB33_X43Y75.IOB_Y0.IN_TERM.NONE",
         "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y75.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "RIOB33_X43Y75.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y75.IOB_Y1.IN_TERM.NONE",
diff --git a/artix7/harness/basys3/swbut/design.json b/artix7/harness/basys3/swbut/design.json
index 93807a3..f570518 100644
--- a/artix7/harness/basys3/swbut/design.json
+++ b/artix7/harness/basys3/swbut/design.json
@@ -3472,96 +3472,96 @@
         "INT_R_X43Y87.ER1BEG1.SE6END0",
         "INT_R_X43Y87.IMUX34.WR1END1",
         "LIOB33_SING_X0Y0.IOB_Y0.IN_TERM.NONE",
-        "LIOB33_SING_X0Y0.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_SING_X0Y0.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_SING_X0Y0.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_SING_X0Y0.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y1.IOB_Y0.IN_TERM.NONE",
-        "LIOB33_X0Y1.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y1.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y1.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y1.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y1.IOB_Y1.IN_TERM.NONE",
-        "LIOB33_X0Y1.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y1.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y1.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y1.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y3.IOB_Y0.IN_TERM.NONE",
-        "LIOB33_X0Y3.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y3.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y3.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y3.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y3.IOB_Y1.IN_TERM.NONE",
-        "LIOB33_X0Y3.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y3.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y3.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y3.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y5.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y5.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y5.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y5.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y5.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y5.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y5.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y5.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y5.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y5.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y7.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y7.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y7.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y7.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y7.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y7.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y7.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y7.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y7.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y7.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y9.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y9.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y9.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y9.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y9.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y9.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y9.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y9.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y9.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y9.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y11.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y11.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y11.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y11.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y11.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y11.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y11.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y11.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y11.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y11.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y11.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y11.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y17.IOB_Y0.IN_TERM.NONE",
-        "LIOB33_X0Y17.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y17.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y17.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y17.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y17.IOB_Y1.IN_TERM.NONE",
         "LIOB33_X0Y17.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "LIOB33_X0Y17.IOB_Y1.PULLTYPE.PULLDOWN",
         "LIOB33_X0Y19.IOB_Y0.IN_TERM.NONE",
-        "LIOB33_X0Y19.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y19.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y19.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y19.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y19.IOB_Y1.IN_TERM.NONE",
-        "LIOB33_X0Y19.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y19.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y19.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y19.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y43.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y43.IOB_Y0.PULLTYPE.PULLUP",
         "LIOB33_X0Y43.IOB_Y1.IN_TERM.NONE",
-        "LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y43.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y43.IOB_Y1.PULLTYPE.NONE",
         "LIOB33_X0Y111.IOB_Y0.IN_TERM.NONE",
         "LIOB33_X0Y111.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "LIOB33_X0Y111.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "LIOB33_X0Y111.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "LIOB33_X0Y111.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "LIOB33_X0Y111.IOB_Y0.PULLTYPE.NONE",
         "LIOB33_X0Y111.IOB_Y1.IN_TERM.NONE",
-        "LIOB33_X0Y111.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "LIOB33_X0Y111.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "LIOB33_X0Y111.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "LIOB33_X0Y111.IOB_Y1.PULLTYPE.NONE",
         "LIOI3_SING_X0Y0.IDELAY_Y0.IDELAY_TYPE_FIXED",
@@ -3626,87 +3626,87 @@
         "LIOI3_X0Y111.OLOGIC_Y1.OSERDES.DATA_RATE_TQ.BUF",
         "RIOB33_X43Y25.IOB_Y0.IN_TERM.NONE",
         "RIOB33_X43Y25.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "RIOB33_X43Y25.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "RIOB33_X43Y25.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y25.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "RIOB33_X43Y25.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y25.IOB_Y1.IN_TERM.NONE",
         "RIOB33_X43Y25.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "RIOB33_X43Y25.IOB_Y1.PULLTYPE.PULLDOWN",
         "RIOB33_X43Y31.IOB_Y0.IN_TERM.NONE",
-        "RIOB33_X43Y31.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "RIOB33_X43Y31.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "RIOB33_X43Y31.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "RIOB33_X43Y31.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y31.IOB_Y1.IN_TERM.NONE",
         "RIOB33_X43Y31.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "RIOB33_X43Y31.IOB_Y1.PULLTYPE.PULLDOWN",
         "RIOB33_X43Y37.IOB_Y0.IN_TERM.NONE",
-        "RIOB33_X43Y37.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "RIOB33_X43Y37.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "RIOB33_X43Y37.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "RIOB33_X43Y37.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y37.IOB_Y1.IN_TERM.NONE",
-        "RIOB33_X43Y37.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "RIOB33_X43Y37.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "RIOB33_X43Y37.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "RIOB33_X43Y37.IOB_Y1.PULLTYPE.NONE",
         "RIOB33_X43Y39.IOB_Y0.IN_TERM.NONE",
         "RIOB33_X43Y39.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "RIOB33_X43Y39.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "RIOB33_X43Y39.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y39.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "RIOB33_X43Y39.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y39.IOB_Y1.IN_TERM.NONE",
         "RIOB33_X43Y39.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "RIOB33_X43Y39.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "RIOB33_X43Y39.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y39.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "RIOB33_X43Y39.IOB_Y1.PULLTYPE.NONE",
         "RIOB33_X43Y43.IOB_Y0.IN_TERM.NONE",
         "RIOB33_X43Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "RIOB33_X43Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "RIOB33_X43Y43.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y43.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "RIOB33_X43Y43.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y43.IOB_Y1.IN_TERM.NONE",
         "RIOB33_X43Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "RIOB33_X43Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "RIOB33_X43Y43.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y43.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "RIOB33_X43Y43.IOB_Y1.PULLTYPE.NONE",
         "RIOB33_X43Y45.IOB_Y0.IN_TERM.NONE",
         "RIOB33_X43Y45.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "RIOB33_X43Y45.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "RIOB33_X43Y45.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y45.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "RIOB33_X43Y45.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y45.IOB_Y1.IN_TERM.NONE",
         "RIOB33_X43Y45.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "RIOB33_X43Y45.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "RIOB33_X43Y45.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y45.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "RIOB33_X43Y45.IOB_Y1.PULLTYPE.NONE",
         "RIOB33_X43Y47.IOB_Y0.IN_TERM.NONE",
         "RIOB33_X43Y47.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "RIOB33_X43Y47.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "RIOB33_X43Y47.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y47.IOB_Y0.LVCMOS25_LVCMOS33_LVTTL.IN",
         "RIOB33_X43Y47.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y47.IOB_Y1.IN_TERM.NONE",
         "RIOB33_X43Y47.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
-        "RIOB33_X43Y47.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY",
+        "RIOB33_X43Y47.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY",
         "RIOB33_X43Y47.IOB_Y1.LVCMOS25_LVCMOS33_LVTTL.IN",
         "RIOB33_X43Y47.IOB_Y1.PULLTYPE.NONE",
         "RIOB33_X43Y61.IOB_Y0.IN_TERM.NONE",
         "RIOB33_X43Y61.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "RIOB33_X43Y61.IOB_Y0.PULLTYPE.PULLDOWN",
         "RIOB33_X43Y61.IOB_Y1.IN_TERM.NONE",
-        "RIOB33_X43Y61.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "RIOB33_X43Y61.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "RIOB33_X43Y61.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "RIOB33_X43Y61.IOB_Y1.PULLTYPE.NONE",
         "RIOB33_X43Y75.IOB_Y0.IN_TERM.NONE",
-        "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "RIOB33_X43Y75.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "RIOB33_X43Y75.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "RIOB33_X43Y75.IOB_Y0.PULLTYPE.NONE",
         "RIOB33_X43Y75.IOB_Y1.IN_TERM.NONE",
-        "RIOB33_X43Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "RIOB33_X43Y75.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "RIOB33_X43Y75.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "RIOB33_X43Y75.IOB_Y1.PULLTYPE.NONE",
         "RIOB33_X43Y87.IOB_Y0.IN_TERM.NONE",
         "RIOB33_X43Y87.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST",
         "RIOB33_X43Y87.IOB_Y0.PULLTYPE.PULLDOWN",
         "RIOB33_X43Y87.IOB_Y1.IN_TERM.NONE",
-        "RIOB33_X43Y87.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW",
+        "RIOB33_X43Y87.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW",
         "RIOB33_X43Y87.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16",
         "RIOB33_X43Y87.IOB_Y1.PULLTYPE.NONE",
         "RIOI3_TBYTESRC_X43Y31.IDELAY_Y0.IDELAY_TYPE_FIXED",
diff --git a/artix7/mask_hclk_cmt.db b/artix7/mask_hclk_cmt.db
index 9407e7c..da45b85 100644
--- a/artix7/mask_hclk_cmt.db
+++ b/artix7/mask_hclk_cmt.db
@@ -39,11 +39,14 @@ bit 26_155
 bit 26_156
 bit 26_158
 bit 26_159
+bit 26_174
+bit 26_175
 bit 26_181
 bit 26_182
 bit 26_183
 bit 26_184
 bit 26_185
+bit 26_195
 bit 26_196
 bit 26_197
 bit 26_198
@@ -115,11 +118,14 @@ bit 27_155
 bit 27_157
 bit 27_158
 bit 27_159
+bit 27_174
+bit 27_175
 bit 27_181
 bit 27_182
 bit 27_183
 bit 27_184
 bit 27_185
+bit 27_195
 bit 27_196
 bit 27_197
 bit 27_198
@@ -184,9 +190,16 @@ bit 28_152
 bit 28_153
 bit 28_154
 bit 28_155
+bit 28_156
+bit 28_157
+bit 28_158
+bit 28_159
 bit 28_174
 bit 28_175
 bit 28_186
+bit 28_192
+bit 28_193
+bit 28_195
 bit 28_196
 bit 28_197
 bit 28_198
@@ -234,9 +247,16 @@ bit 29_151
 bit 29_153
 bit 29_154
 bit 29_155
+bit 29_156
+bit 29_157
+bit 29_158
+bit 29_159
 bit 29_174
 bit 29_175
 bit 29_186
+bit 29_192
+bit 29_193
+bit 29_195
 bit 29_196
 bit 29_197
 bit 29_198
diff --git a/artix7/mask_hclk_cmt_l.db b/artix7/mask_hclk_cmt_l.db
index 9407e7c..da45b85 100644
--- a/artix7/mask_hclk_cmt_l.db
+++ b/artix7/mask_hclk_cmt_l.db
@@ -39,11 +39,14 @@ bit 26_155
 bit 26_156
 bit 26_158
 bit 26_159
+bit 26_174
+bit 26_175
 bit 26_181
 bit 26_182
 bit 26_183
 bit 26_184
 bit 26_185
+bit 26_195
 bit 26_196
 bit 26_197
 bit 26_198
@@ -115,11 +118,14 @@ bit 27_155
 bit 27_157
 bit 27_158
 bit 27_159
+bit 27_174
+bit 27_175
 bit 27_181
 bit 27_182
 bit 27_183
 bit 27_184
 bit 27_185
+bit 27_195
 bit 27_196
 bit 27_197
 bit 27_198
@@ -184,9 +190,16 @@ bit 28_152
 bit 28_153
 bit 28_154
 bit 28_155
+bit 28_156
+bit 28_157
+bit 28_158
+bit 28_159
 bit 28_174
 bit 28_175
 bit 28_186
+bit 28_192
+bit 28_193
+bit 28_195
 bit 28_196
 bit 28_197
 bit 28_198
@@ -234,9 +247,16 @@ bit 29_151
 bit 29_153
 bit 29_154
 bit 29_155
+bit 29_156
+bit 29_157
+bit 29_158
+bit 29_159
 bit 29_174
 bit 29_175
 bit 29_186
+bit 29_192
+bit 29_193
+bit 29_195
 bit 29_196
 bit 29_197
 bit 29_198
diff --git a/artix7/mask_lioi3.db b/artix7/mask_lioi3.db
index 1c35129..22def1d 100644
--- a/artix7/mask_lioi3.db
+++ b/artix7/mask_lioi3.db
@@ -1,6 +1,7 @@
 bit 25_07
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_31
 bit 25_32
 bit 25_34
@@ -15,6 +16,7 @@ bit 25_71
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
 bit 25_111
diff --git a/artix7/mask_lioi3_tbytesrc.db b/artix7/mask_lioi3_tbytesrc.db
index 1c35129..22def1d 100644
--- a/artix7/mask_lioi3_tbytesrc.db
+++ b/artix7/mask_lioi3_tbytesrc.db
@@ -1,6 +1,7 @@
 bit 25_07
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_31
 bit 25_32
 bit 25_34
@@ -15,6 +16,7 @@ bit 25_71
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
 bit 25_111
diff --git a/artix7/mask_lioi3_tbyteterm.db b/artix7/mask_lioi3_tbyteterm.db
index 1c35129..22def1d 100644
--- a/artix7/mask_lioi3_tbyteterm.db
+++ b/artix7/mask_lioi3_tbyteterm.db
@@ -1,6 +1,7 @@
 bit 25_07
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_31
 bit 25_32
 bit 25_34
@@ -15,6 +16,7 @@ bit 25_71
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
 bit 25_111
diff --git a/artix7/mask_rioi3.db b/artix7/mask_rioi3.db
index 1c35129..22def1d 100644
--- a/artix7/mask_rioi3.db
+++ b/artix7/mask_rioi3.db
@@ -1,6 +1,7 @@
 bit 25_07
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_31
 bit 25_32
 bit 25_34
@@ -15,6 +16,7 @@ bit 25_71
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
 bit 25_111
diff --git a/artix7/mask_rioi3_tbytesrc.db b/artix7/mask_rioi3_tbytesrc.db
index 1c35129..22def1d 100644
--- a/artix7/mask_rioi3_tbytesrc.db
+++ b/artix7/mask_rioi3_tbytesrc.db
@@ -1,6 +1,7 @@
 bit 25_07
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_31
 bit 25_32
 bit 25_34
@@ -15,6 +16,7 @@ bit 25_71
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
 bit 25_111
diff --git a/artix7/mask_rioi3_tbyteterm.db b/artix7/mask_rioi3_tbyteterm.db
index 1c35129..22def1d 100644
--- a/artix7/mask_rioi3_tbyteterm.db
+++ b/artix7/mask_rioi3_tbyteterm.db
@@ -1,6 +1,7 @@
 bit 25_07
 bit 25_20
 bit 25_21
+bit 25_23
 bit 25_31
 bit 25_32
 bit 25_34
@@ -15,6 +16,7 @@ bit 25_71
 bit 25_84
 bit 25_85
 bit 25_95
+bit 25_96
 bit 25_98
 bit 25_99
 bit 25_111
diff --git a/artix7/segbits_hclk_cmt.db b/artix7/segbits_hclk_cmt.db
index 746a48e..21675ed 100644
--- a/artix7/segbits_hclk_cmt.db
+++ b/artix7/segbits_hclk_cmt.db
@@ -14,6 +14,10 @@ HCLK_CMT.HCLK_CMT_CK_BUFRCLK0_USED 28_174
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK1_USED 29_174
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK2_USED 28_175
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK3_USED 29_175
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS0.HCLK_CMT_MUX_OUT_FREQ_REF0 29_157 29_159
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS1.HCLK_CMT_MUX_OUT_FREQ_REF1 28_157 28_159
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS2.HCLK_CMT_MUX_OUT_FREQ_REF2 29_156 29_158
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS3.HCLK_CMT_MUX_OUT_FREQ_REF3 28_156 28_158
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK0 27_150 27_155
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK1 26_155 27_150
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK2 27_150 27_154
@@ -578,6 +582,14 @@ HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 26_118 26_120
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 26_118 27_119
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 26_120 27_118
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 27_118 27_119
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_MUX_CLKINT_0 26_174 29_157 29_159 29_195
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_CCIO0 28_195 29_157 29_159
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_MUX_CLKINT_1 27_174 28_157 28_159 29_193
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_CCIO1 28_157 28_159 28_193
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_MUX_CLKINT_2 26_175 29_156 29_158 29_192
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_CCIO2 28_192 29_156 29_158
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_MUX_CLKINT_3 27_175 27_195 28_156 28_158
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_CCIO3 26_195 28_156 28_158
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 26_224 26_229
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 26_229 27_224
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 26_225 26_229
diff --git a/artix7/segbits_hclk_cmt.origin_info.db b/artix7/segbits_hclk_cmt.origin_info.db
index fe55be7..563fbe4 100644
--- a/artix7/segbits_hclk_cmt.origin_info.db
+++ b/artix7/segbits_hclk_cmt.origin_info.db
@@ -14,6 +14,10 @@ HCLK_CMT.HCLK_CMT_CK_BUFRCLK0_USED origin:045-hclk-cmt-pips 28_174
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK1_USED origin:045-hclk-cmt-pips 29_174
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK2_USED origin:045-hclk-cmt-pips 28_175
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK3_USED origin:045-hclk-cmt-pips 29_175
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS0.HCLK_CMT_MUX_OUT_FREQ_REF0 origin:045-hclk-cmt-pips 29_157 29_159
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS1.HCLK_CMT_MUX_OUT_FREQ_REF1 origin:045-hclk-cmt-pips 28_157 28_159
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS2.HCLK_CMT_MUX_OUT_FREQ_REF2 origin:045-hclk-cmt-pips 29_156 29_158
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS3.HCLK_CMT_MUX_OUT_FREQ_REF3 origin:045-hclk-cmt-pips 28_156 28_158
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_150 27_155
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_155 27_150
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_150 27_154
@@ -578,6 +582,14 @@ HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_118
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_118 27_119
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_120 27_118
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_118 27_119
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_MUX_CLKINT_0 origin:045-hclk-cmt-pips 26_174 29_157 29_159 29_195
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_195 29_157 29_159
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_MUX_CLKINT_1 origin:045-hclk-cmt-pips 27_174 28_157 28_159 29_193
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_157 28_159 28_193
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_MUX_CLKINT_2 origin:045-hclk-cmt-pips 26_175 29_156 29_158 29_192
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_192 29_156 29_158
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_MUX_CLKINT_3 origin:045-hclk-cmt-pips 27_175 27_195 28_156 28_158
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_195 28_156 28_158
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_224 26_229
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_229 27_224
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_225 26_229
diff --git a/artix7/segbits_hclk_cmt_l.db b/artix7/segbits_hclk_cmt_l.db
index 3115de0..926b9d8 100644
--- a/artix7/segbits_hclk_cmt_l.db
+++ b/artix7/segbits_hclk_cmt_l.db
@@ -518,6 +518,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO0 26_219 26_221
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO1 26_221 27_219
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO2 26_219 27_220
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO3 27_219 27_220
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS0.HCLK_CMT_MUX_OUT_FREQ_REF0 29_157 29_159
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS1.HCLK_CMT_MUX_OUT_FREQ_REF1 28_157 28_159
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS2.HCLK_CMT_MUX_OUT_FREQ_REF2 29_156 29_158
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS3.HCLK_CMT_MUX_OUT_FREQ_REF3 28_156 28_158
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 27_122 27_127
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 26_127 27_122
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 27_122 27_126
@@ -578,6 +582,14 @@ HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 26_118 26_120
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 26_118 27_119
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 26_120 27_118
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 27_118 27_119
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_MUX_CLKINT_0 26_174 29_157 29_159 29_195
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_CCIO0 28_195 29_157 29_159
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_MUX_CLKINT_1 27_174 28_157 28_159 29_193
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_CCIO1 28_157 28_159 28_193
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_MUX_CLKINT_2 26_175 29_156 29_158 29_192
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_CCIO2 28_192 29_156 29_158
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_MUX_CLKINT_3 27_175 27_195 28_156 28_158
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_CCIO3 26_195 28_156 28_158
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 26_224 26_229
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 26_229 27_224
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 26_225 26_229
diff --git a/artix7/segbits_hclk_cmt_l.origin_info.db b/artix7/segbits_hclk_cmt_l.origin_info.db
index 86c7134..fb37a25 100644
--- a/artix7/segbits_hclk_cmt_l.origin_info.db
+++ b/artix7/segbits_hclk_cmt_l.origin_info.db
@@ -518,6 +518,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_219 26_22
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_221 27_219
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_219 27_220
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_219 27_220
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS0.HCLK_CMT_MUX_OUT_FREQ_REF0 origin:045-hclk-cmt-pips 29_157 29_159
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS1.HCLK_CMT_MUX_OUT_FREQ_REF1 origin:045-hclk-cmt-pips 28_157 28_159
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS2.HCLK_CMT_MUX_OUT_FREQ_REF2 origin:045-hclk-cmt-pips 29_156 29_158
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS3.HCLK_CMT_MUX_OUT_FREQ_REF3 origin:045-hclk-cmt-pips 28_156 28_158
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_122 27_127
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_127 27_122
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_122 27_126
@@ -578,6 +582,14 @@ HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_1
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_118 27_119
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_120 27_118
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_118 27_119
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_MUX_CLKINT_0 origin:045-hclk-cmt-pips 26_174 29_157 29_159 29_195
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_195 29_157 29_159
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_MUX_CLKINT_1 origin:045-hclk-cmt-pips 27_174 28_157 28_159 29_193
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_157 28_159 28_193
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_MUX_CLKINT_2 origin:045-hclk-cmt-pips 26_175 29_156 29_158 29_192
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_192 29_156 29_158
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_MUX_CLKINT_3 origin:045-hclk-cmt-pips 27_175 27_195 28_156 28_158
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_195 28_156 28_158
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_224 26_229
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_229 27_224
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_225 26_229
diff --git a/artix7/segbits_int_l.origin_info.db b/artix7/segbits_int_l.origin_info.db
index 97c5938..b7a7345 100644
--- a/artix7/segbits_int_l.origin_info.db
+++ b/artix7/segbits_int_l.origin_info.db
@@ -301,7 +301,7 @@ INT_L.FAN_ALT0.FAN_BOUNCE4 origin:050-pip-seed !22_00 20_00 23_00 24_00 25_00
 INT_L.FAN_ALT0.FAN_BOUNCE6 origin:050-pip-seed !23_00 20_00 22_00 24_00 25_00
 INT_L.FAN_ALT0.LOGIC_OUTS_L0 origin:050-pip-seed !23_00 21_00 22_00 24_00 25_00
 INT_L.FAN_ALT0.LOGIC_OUTS_L12 origin:050-pip-seed !22_00 21_00 23_00 24_00 25_00
-INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:050-pip-seed !22_00 !23_00 !25_00 21_00 24_00
+INT_L.FAN_ALT0.LOGIC_OUTS_L22 origin:056-pip-rem !22_00 !23_00 !25_00 21_00 24_00
 INT_L.FAN_ALT0.SR1END_N3_3 origin:050-pip-seed !23_00 19_01 22_00 24_00 25_00
 INT_L.FAN_ALT0.SS2END_N0_3 origin:050-pip-seed !22_00 !23_00 !24_00 17_00 25_00
 INT_L.FAN_ALT0.SW2END_N0_3 origin:050-pip-seed !22_00 !23_00 !25_00 17_00 24_00
@@ -396,7 +396,7 @@ INT_L.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
 INT_L.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_L.FAN_ALT4.LOGIC_OUTS_L8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
-INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
+INT_L.FAN_ALT4.LOGIC_OUTS_L18 origin:056-pip-rem !22_08 !23_08 !25_08 21_08 24_08
 INT_L.FAN_ALT4.SR1BEG_S0 origin:050-pip-seed !23_08 19_09 22_08 24_08 25_08
 INT_L.FAN_ALT4.EE2END0 origin:050-pip-seed !22_08 !23_08 !24_08 16_08 25_08
 INT_L.FAN_ALT4.EL1END0 origin:050-pip-seed !22_08 16_08 23_08 24_08 25_08
@@ -1917,7 +1917,7 @@ INT_L.EE4BEG2.SE6END2 origin:050-pip-seed 03_41 06_40
 INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
 INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
 INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
-INT_L.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
+INT_L.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43
 INT_L.EE4BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_57 07_57
 INT_L.EE4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_57 04_58
 INT_L.EE4BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_56 04_58
@@ -3282,7 +3282,7 @@ INT_L.SW6BEG0.LOGIC_OUTS_L18 origin:050-pip-seed 04_14 06_12
 INT_L.SW6BEG0.LOGIC_OUTS_L22 origin:050-pip-seed 06_12 07_13
 INT_L.SW6BEG0.LV_L0 origin:056-pip-rem 04_14 05_12
 INT_L.SW6BEG0.EE2END0 origin:050-pip-seed 03_12 04_13
-INT_L.SW6BEG0.EE4END0 origin:056-pip-rem 04_13 05_12
+INT_L.SW6BEG0.EE4END0 origin:050-pip-seed 04_13 05_12
 INT_L.SW6BEG0.LH12 origin:056-pip-rem 05_12 07_13
 INT_L.SW6BEG0.NW2END1 origin:050-pip-seed 02_13 05_15
 INT_L.SW6BEG0.NW6END1 origin:050-pip-seed 05_15 06_12
@@ -3323,7 +3323,7 @@ INT_L.SW6BEG2.LOGIC_OUTS_L20 origin:050-pip-seed 06_44 07_45
 INT_L.SW6BEG2.LVB_L0 origin:056-pip-rem 04_46 05_44
 INT_L.SW6BEG2.LVB_L12 origin:056-pip-rem 05_44 07_45
 INT_L.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
-INT_L.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
+INT_L.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
 INT_L.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
 INT_L.SW6BEG2.NW6END3 origin:050-pip-seed 05_47 06_44
 INT_L.SW6BEG2.SE2END2 origin:050-pip-seed 02_45 04_45
@@ -3603,7 +3603,7 @@ INT_L.WW4BEG2.LOGIC_OUTS_L20 origin:050-pip-seed 04_34 06_32
 INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32
 INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33
 INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
+INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
 INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
diff --git a/artix7/segbits_int_r.origin_info.db b/artix7/segbits_int_r.origin_info.db
index 8b7a4f3..b001449 100644
--- a/artix7/segbits_int_r.origin_info.db
+++ b/artix7/segbits_int_r.origin_info.db
@@ -170,7 +170,7 @@ INT_R.BYP_ALT7.BYP_BOUNCE2 origin:050-pip-seed !22_63 !23_63 !24_63 21_63 25_63
 INT_R.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63
 INT_R.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
 INT_R.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
-INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
+INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
 INT_R.BYP_ALT7.LOGIC_OUTS3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63
 INT_R.BYP_ALT7.LOGIC_OUTS15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
 INT_R.BYP_ALT7.LOGIC_OUTS21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@@ -328,8 +328,8 @@ INT_R.FAN_ALT3.WR1END3 origin:050-pip-seed !23_56 16_56 22_56 24_56 25_56
 INT_R.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56
 INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
 INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
-INT_R.FAN_ALT4.FAN_BOUNCE2 origin:056-pip-rem !23_08 20_08 22_08 24_08 25_08
-INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
+INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
+INT_R.FAN_ALT4.FAN_BOUNCE7 origin:050-pip-seed !22_08 20_08 23_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS18 origin:050-pip-seed !22_08 !23_08 !25_08 21_08 24_08
@@ -2271,7 +2271,7 @@ INT_R.NE6BEG3.NN6END3 origin:050-pip-seed 03_53 06_52
 INT_R.NE6BEG3.NW2END3 origin:050-pip-seed 02_53 04_53
 INT_R.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
 INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
-INT_R.NE6BEG3.SE6END3 origin:056-pip-rem 05_55 06_52
+INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
 INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
 INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
 INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17
@@ -2491,7 +2491,7 @@ INT_R.NN6BEG3.NN6END3 origin:050-pip-seed 02_54 07_55
 INT_R.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
 INT_R.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
 INT_R.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
-INT_R.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
+INT_R.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55
 INT_R.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
 INT_R.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
 INT_R.NR1BEG0.LOGIC_OUTS0 origin:050-pip-seed 11_07 14_07
@@ -2887,7 +2887,7 @@ INT_R.SE6BEG3.LV18 origin:056-pip-rem 04_59 05_57
 INT_R.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56
 INT_R.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59
 INT_R.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56
-INT_R.SE6BEG3.NN6END3 origin:050-pip-seed 04_56 07_59
+INT_R.SE6BEG3.NN6END3 origin:056-pip-rem 04_56 07_59
 INT_R.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58
 INT_R.SE6BEG3.SE6END3 origin:050-pip-seed 02_58 07_59
 INT_R.SE6BEG3.SS2END3 origin:050-pip-seed 02_59 05_58
@@ -3603,7 +3603,7 @@ INT_R.WW4BEG2.LOGIC_OUTS20 origin:050-pip-seed 04_34 06_32
 INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32
 INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33
 INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
+INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
 INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
diff --git a/artix7/segbits_liob33.db b/artix7/segbits_liob33.db
index 37effb8..d9ad4de 100644
--- a/artix7/segbits_liob33.db
+++ b/artix7/segbits_liob33.db
@@ -14,14 +14,14 @@ LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_86 39_85 !39_87
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_106 !38_110 !39_105 !39_107 !39_109 !39_111
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 39_95
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 39_95
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 39_119 !39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 39_127
 LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
-LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127
 LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 39_113 !39_117 !39_119 39_125 39_127
+LIOB33.IOB_Y0.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 39_127
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_113 39_117 39_119 !39_125 !39_127
@@ -33,9 +33,9 @@ LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 38_64 !38_112 38_118 !38_126 39_65 !39_117
 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 38_64 !38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 38_64 !38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127
 LIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 39_119 !39_125 39_127
-LIOB33.IOB_Y0.SSTL135.IN !38_86 !39_85 39_87
-LIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 !39_85 39_87
-LIOB33.IOB_Y0.SSTL135.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111
+LIOB33.IOB_Y0.SSTL135_SSTL15.IN !38_86 !39_85 39_87
+LIOB33.IOB_Y0.SSTL135_SSTL15.IN_DIFF 38_86 !39_85 39_87
+LIOB33.IOB_Y0.SSTL135_SSTL15.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111
 LIOB33.IOB_Y1.IBUFDISABLE.I 39_45
 LIOB33.IOB_Y1.IN_TERM.NONE !38_04 !38_06 !39_05 !39_07
 LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 38_04 38_06 39_05 39_07
@@ -52,14 +52,14 @@ LIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 !38_00 38_02 !38_08 !38_10 38_14 38_62 39_01 39_
 LIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN !38_40 38_42 39_41
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 38_32
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 38_32
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 !38_00 !38_02 38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 38_00 38_02 38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
-LIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 38_00 !38_02 !38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_14 38_62 !39_01 39_09 39_15 39_63
+LIOB33.IOB_Y1.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED 38_00 !38_02 !38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 38_00 38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 !38_00 !38_02 38_08 38_10 38_14 38_62 39_01 !39_09 39_15 39_63
@@ -71,6 +71,7 @@ LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_62 !39_01 39_
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 38_00 38_02 !38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
 LIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED 38_00 !38_02 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
-LIOB33.IOB_Y1.SSTL135.IN 38_40 !38_42 !39_41
-LIOB33.IOB_Y1.SSTL135.SLEW.FAST 38_16 38_18 38_20 38_22 39_17 !39_21
+LIOB33.IOB_Y1.SSTL135_SSTL15.IN 38_40 !38_42 !39_41
+LIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF 38_40 !38_42 39_41
+LIOB33.IOB_Y1.SSTL135_SSTL15.SLEW.FAST 38_16 38_18 38_20 38_22 39_17 !39_21
 LIOB33.OUT_DIFF 39_59 39_61
diff --git a/artix7/segbits_liob33.origin_info.db b/artix7/segbits_liob33.origin_info.db
index 1b3e6f7..c0a134f 100644
--- a/artix7/segbits_liob33.origin_info.db
+++ b/artix7/segbits_liob33.origin_info.db
@@ -14,14 +14,14 @@ LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !39_87 38_86 39_85
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_106 !38_110 !39_105 !39_107 !39_109 !39_111
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 39_95
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 39_95
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_113 39_119 39_65
 LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_113 39_127 39_65
-LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_113 39_125 39_127 39_65
+LIOB33.IOB_Y0.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_113 39_119 39_125 39_65
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_113 39_125 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_113 39_117 39_119 39_65
@@ -33,9 +33,9 @@ LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_112 !38_126 !39_117 !39
 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_112 !38_118 !39_117 !39_127 38_126 38_64 39_119 39_125 39_65
 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_112 !38_118 !39_117 !39_119 38_126 38_64 39_125 39_127 39_65
 LIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_119 39_127 39_65
-LIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87
-LIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87
-LIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
+LIOB33.IOB_Y0.SSTL135_SSTL15.IN origin:030-iob !38_86 !39_85 39_87
+LIOB33.IOB_Y0.SSTL135_SSTL15.IN_DIFF origin:030-iob !39_85 38_86 39_87
+LIOB33.IOB_Y0.SSTL135_SSTL15.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
 LIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45
 LIOB33.IOB_Y1.IN_TERM.NONE origin:030-iob !38_4 !38_6 !39_5 !39_7
 LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_4 38_6 39_5 39_7
@@ -52,14 +52,14 @@ LIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 origin:030-iob !38_00 !38_08 !38_10 38_02 38_14
 LIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_09 38_00 38_14 38_62 39_01 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !38_40 38_42 39_41
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 38_32
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 38_32
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_00 !38_02 !38_10 !39_01 !39_09 38_08 38_14 38_62 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 origin:030-iob !38_10 !39_09 38_00 38_02 38_08 38_14 38_62 39_01 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_01 !39_09 38_00 38_14 38_62 39_15 39_63
-LIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 origin:030-iob !38_02 !38_08 38_00 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 38_00 38_02 38_14 38_62 39_09 39_15 39_63
+LIOB33.IOB_Y1.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED origin:030-iob !38_02 !38_08 38_00 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 38_02 38_08 38_14 38_62 39_01 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 origin:030-iob !38_08 !38_10 !39_09 38_00 38_02 38_14 38_62 39_01 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 38_08 38_10 38_14 38_62 39_01 39_15 39_63
@@ -71,6 +71,7 @@ LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 !39_15
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 !39_15 38_02 38_08 38_62 39_01 39_63
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_08 !38_10 !39_09 !39_15 38_00 38_02 38_62 39_01 39_63
 LIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED origin:030-iob !38_02 38_00 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
-LIOB33.IOB_Y1.SSTL135.IN origin:030-iob !38_42 !39_41 38_40
-LIOB33.IOB_Y1.SSTL135.SLEW.FAST origin:030-iob !39_21 38_16 38_18 38_20 38_22 39_17
+LIOB33.IOB_Y1.SSTL135_SSTL15.IN origin:030-iob !38_42 !39_41 38_40
+LIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF origin:030-iob !38_42 38_40 39_41
+LIOB33.IOB_Y1.SSTL135_SSTL15.SLEW.FAST origin:030-iob !39_21 38_16 38_18 38_20 38_22 39_17
 LIOB33.OUT_DIFF origin:030-iob 39_59 39_61
diff --git a/artix7/segbits_lioi3.db b/artix7/segbits_lioi3.db
index 840afa5..ad18897 100644
--- a/artix7/segbits_lioi3.db
+++ b/artix7/segbits_lioi3.db
@@ -187,6 +187,7 @@ LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
 LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
 LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
+LIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
diff --git a/artix7/segbits_lioi3.origin_info.db b/artix7/segbits_lioi3.origin_info.db
index a5d630f..ab8dd75 100644
--- a/artix7/segbits_lioi3.origin_info.db
+++ b/artix7/segbits_lioi3.origin_info.db
@@ -187,6 +187,7 @@ LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
 LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
 LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
+LIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob-pips 30_78 31_67 31_77
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
diff --git a/artix7/segbits_lioi3_tbytesrc.db b/artix7/segbits_lioi3_tbytesrc.db
index c95b8a0..eadd7b2 100644
--- a/artix7/segbits_lioi3_tbytesrc.db
+++ b/artix7/segbits_lioi3_tbytesrc.db
@@ -187,6 +187,7 @@ LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
+LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
diff --git a/artix7/segbits_lioi3_tbytesrc.origin_info.db b/artix7/segbits_lioi3_tbytesrc.origin_info.db
index 876f044..2ce8aed 100644
--- a/artix7/segbits_lioi3_tbytesrc.origin_info.db
+++ b/artix7/segbits_lioi3_tbytesrc.origin_info.db
@@ -187,6 +187,7 @@ LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
+LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob-pips 30_78 31_67 31_77
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
diff --git a/artix7/segbits_lioi3_tbyteterm.db b/artix7/segbits_lioi3_tbyteterm.db
index f78c131..e4b3cb0 100644
--- a/artix7/segbits_lioi3_tbyteterm.db
+++ b/artix7/segbits_lioi3_tbyteterm.db
@@ -187,6 +187,7 @@ LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
+LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
diff --git a/artix7/segbits_lioi3_tbyteterm.origin_info.db b/artix7/segbits_lioi3_tbyteterm.origin_info.db
index 44b165c..85e4f73 100644
--- a/artix7/segbits_lioi3_tbyteterm.origin_info.db
+++ b/artix7/segbits_lioi3_tbyteterm.origin_info.db
@@ -187,6 +187,7 @@ LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
+LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob-pips 30_78 31_67 31_77
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
diff --git a/artix7/segbits_riob33.db b/artix7/segbits_riob33.db
index 88ceb7d..b07295c 100644
--- a/artix7/segbits_riob33.db
+++ b/artix7/segbits_riob33.db
@@ -14,14 +14,14 @@ RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_86 39_85 !39_87
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_106 !38_110 !39_105 !39_107 !39_109 !39_111
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 39_95
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 39_95
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 39_119 !39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 39_127
 RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
-RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127
 RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 39_113 !39_117 !39_119 39_125 39_127
+RIOB33.IOB_Y0.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 39_127
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_113 39_117 39_119 !39_125 !39_127
@@ -33,9 +33,9 @@ RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 38_64 !38_112 38_118 !38_126 39_65 !39_117
 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 38_64 !38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 38_64 !38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127
 RIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 39_119 !39_125 39_127
-RIOB33.IOB_Y0.SSTL135.IN !38_86 !39_85 39_87
-RIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 !39_85 39_87
-RIOB33.IOB_Y0.SSTL135.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111
+RIOB33.IOB_Y0.SSTL135_SSTL15.IN !38_86 !39_85 39_87
+RIOB33.IOB_Y0.SSTL135_SSTL15.IN_DIFF 38_86 !39_85 39_87
+RIOB33.IOB_Y0.SSTL135_SSTL15.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111
 RIOB33.IOB_Y1.IBUFDISABLE.I 39_45
 RIOB33.IOB_Y1.IN_TERM.NONE !38_04 !38_06 !39_05 !39_07
 RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 38_04 38_06 39_05 39_07
@@ -52,14 +52,14 @@ RIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 !38_00 38_02 !38_08 !38_10 38_14 38_62 39_01 39_
 RIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN !38_40 38_42 39_41
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 38_32
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 38_32
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 !38_00 !38_02 38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 38_00 38_02 38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
-RIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 38_00 !38_02 !38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_14 38_62 !39_01 39_09 39_15 39_63
+RIOB33.IOB_Y1.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED 38_00 !38_02 !38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 38_00 38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 !38_00 !38_02 38_08 38_10 38_14 38_62 39_01 !39_09 39_15 39_63
@@ -71,6 +71,7 @@ RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_62 !39_01 39_
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 38_00 38_02 !38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
 RIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED 38_00 !38_02 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
-RIOB33.IOB_Y1.SSTL135.IN 38_40 !38_42 !39_41
-RIOB33.IOB_Y1.SSTL135.SLEW.FAST 38_16 38_18 38_20 38_22 39_17 !39_21
+RIOB33.IOB_Y1.SSTL135_SSTL15.IN 38_40 !38_42 !39_41
+RIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF 38_40 !38_42 39_41
+RIOB33.IOB_Y1.SSTL135_SSTL15.SLEW.FAST 38_16 38_18 38_20 38_22 39_17 !39_21
 RIOB33.OUT_DIFF 39_59 39_61
diff --git a/artix7/segbits_riob33.origin_info.db b/artix7/segbits_riob33.origin_info.db
index a87b92b..a6d64c5 100644
--- a/artix7/segbits_riob33.origin_info.db
+++ b/artix7/segbits_riob33.origin_info.db
@@ -14,14 +14,14 @@ RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !39_87 38_86 39_85
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_106 !38_110 !39_105 !39_107 !39_109 !39_111
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 39_95
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 39_95
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_113 39_119 39_65
 RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_113 39_127 39_65
-RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_113 39_125 39_127 39_65
+RIOB33.IOB_Y0.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_113 39_119 39_125 39_65
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_113 39_125 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_113 39_117 39_119 39_65
@@ -33,9 +33,9 @@ RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_112 !38_126 !39_117 !39
 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_112 !38_118 !39_117 !39_127 38_126 38_64 39_119 39_125 39_65
 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_112 !38_118 !39_117 !39_119 38_126 38_64 39_125 39_127 39_65
 RIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_119 39_127 39_65
-RIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87
-RIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87
-RIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
+RIOB33.IOB_Y0.SSTL135_SSTL15.IN origin:030-iob !38_86 !39_85 39_87
+RIOB33.IOB_Y0.SSTL135_SSTL15.IN_DIFF origin:030-iob !39_85 38_86 39_87
+RIOB33.IOB_Y0.SSTL135_SSTL15.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
 RIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45
 RIOB33.IOB_Y1.IN_TERM.NONE origin:030-iob !38_4 !38_6 !39_5 !39_7
 RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_4 38_6 39_5 39_7
@@ -52,14 +52,14 @@ RIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 origin:030-iob !38_00 !38_08 !38_10 38_02 38_14
 RIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_09 38_00 38_14 38_62 39_01 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !38_40 38_42 39_41
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 38_32
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 38_32
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_00 !38_02 !38_10 !39_01 !39_09 38_08 38_14 38_62 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 origin:030-iob !38_10 !39_09 38_00 38_02 38_08 38_14 38_62 39_01 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_01 !39_09 38_00 38_14 38_62 39_15 39_63
-RIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 origin:030-iob !38_02 !38_08 38_00 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 38_00 38_02 38_14 38_62 39_09 39_15 39_63
+RIOB33.IOB_Y1.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED origin:030-iob !38_02 !38_08 38_00 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 38_02 38_08 38_14 38_62 39_01 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 origin:030-iob !38_08 !38_10 !39_09 38_00 38_02 38_14 38_62 39_01 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 38_08 38_10 38_14 38_62 39_01 39_15 39_63
@@ -71,6 +71,7 @@ RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 !39_15
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 !39_15 38_02 38_08 38_62 39_01 39_63
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_08 !38_10 !39_09 !39_15 38_00 38_02 38_62 39_01 39_63
 RIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED origin:030-iob !38_02 38_00 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
-RIOB33.IOB_Y1.SSTL135.IN origin:030-iob !38_42 !39_41 38_40
-RIOB33.IOB_Y1.SSTL135.SLEW.FAST origin:030-iob !39_21 38_16 38_18 38_20 38_22 39_17
+RIOB33.IOB_Y1.SSTL135_SSTL15.IN origin:030-iob !38_42 !39_41 38_40
+RIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF origin:030-iob !38_42 38_40 39_41
+RIOB33.IOB_Y1.SSTL135_SSTL15.SLEW.FAST origin:030-iob !39_21 38_16 38_18 38_20 38_22 39_17
 RIOB33.OUT_DIFF origin:030-iob 39_59 39_61
diff --git a/artix7/segbits_rioi3.db b/artix7/segbits_rioi3.db
index 0f7d7f8..4f69fd1 100644
--- a/artix7/segbits_rioi3.db
+++ b/artix7/segbits_rioi3.db
@@ -187,6 +187,7 @@ RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
 RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
 RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
+RIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
diff --git a/artix7/segbits_rioi3.origin_info.db b/artix7/segbits_rioi3.origin_info.db
index 9ecfc20..499ad4e 100644
--- a/artix7/segbits_rioi3.origin_info.db
+++ b/artix7/segbits_rioi3.origin_info.db
@@ -187,6 +187,7 @@ RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
 RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
 RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
+RIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob-pips 30_78 31_67 31_77
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
diff --git a/artix7/segbits_rioi3_tbytesrc.db b/artix7/segbits_rioi3_tbytesrc.db
index 389c03f..9b381ec 100644
--- a/artix7/segbits_rioi3_tbytesrc.db
+++ b/artix7/segbits_rioi3_tbytesrc.db
@@ -187,6 +187,7 @@ RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
+RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
diff --git a/artix7/segbits_rioi3_tbytesrc.origin_info.db b/artix7/segbits_rioi3_tbytesrc.origin_info.db
index 0d0d0e1..3f4c532 100644
--- a/artix7/segbits_rioi3_tbytesrc.origin_info.db
+++ b/artix7/segbits_rioi3_tbytesrc.origin_info.db
@@ -187,6 +187,7 @@ RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
+RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob-pips 30_78 31_67 31_77
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
diff --git a/artix7/segbits_rioi3_tbyteterm.db b/artix7/segbits_rioi3_tbyteterm.db
index 9f24b9a..824bf6e 100644
--- a/artix7/segbits_rioi3_tbyteterm.db
+++ b/artix7/segbits_rioi3_tbyteterm.db
@@ -187,6 +187,7 @@ RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
+RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
diff --git a/artix7/segbits_rioi3_tbyteterm.origin_info.db b/artix7/segbits_rioi3_tbyteterm.origin_info.db
index abdb074..011ead8 100644
--- a/artix7/segbits_rioi3_tbyteterm.origin_info.db
+++ b/artix7/segbits_rioi3_tbyteterm.origin_info.db
@@ -187,6 +187,7 @@ RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
+RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob-pips 30_78 31_67 31_77
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
diff --git a/artix7/timings/DSP_L.sdf b/artix7/timings/DSP_L.sdf
index e23a6ff..4eb87d8 100644
--- a/artix7/timings/DSP_L.sdf
+++ b/artix7/timings/DSP_L.sdf
@@ -260,13 +260,13 @@
         (INSTANCE DSP48E1)
         (DELAY
             (ABSOLUTE
-                (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400))
-                (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046))
-                (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029))
-                (IOPATH A P (0.587::2.142)(1.346::5.070))
-                (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH A PCOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400))
+                (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029))
+                (IOPATH D P (0.587::2.142)(1.346::5.070))
+                (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH D PCOUT (0.580::2.133)(1.334::5.046))
             )
         )
     )
@@ -275,13 +275,13 @@
         (INSTANCE DSP48E1)
         (DELAY
             (ABSOLUTE
-                (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400))
-                (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046))
-                (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029))
-                (IOPATH A P (0.587::2.142)(1.346::5.070))
-                (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH A PCOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400))
+                (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029))
+                (IOPATH D P (0.587::2.142)(1.346::5.070))
+                (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH D PCOUT (0.580::2.133)(1.334::5.046))
             )
         )
     )
@@ -289,48 +289,48 @@
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD A (posedge CLK) (-4.951::-0.994))
-            (SETUP A (posedge CLK) (0.994::4.951))
+            (HOLD D (posedge CLK) (-4.951::-0.994))
+            (SETUP D (posedge CLK) (0.994::4.951))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD A (posedge CLK) (-5.342::-1.063))
-            (SETUP A (posedge CLK) (1.063::5.342))
+            (HOLD D (posedge CLK) (-5.342::-1.063))
+            (SETUP D (posedge CLK) (1.063::5.342))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD A (posedge CLK) (-4.951::-0.994))
-            (SETUP A (posedge CLK) (0.994::4.951))
+            (HOLD D (posedge CLK) (-4.951::-0.994))
+            (SETUP D (posedge CLK) (0.994::4.951))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD A (posedge CLK) (-5.342::-1.063))
-            (SETUP A (posedge CLK) (1.063::5.342))
+            (HOLD D (posedge CLK) (-5.342::-1.063))
+            (SETUP D (posedge CLK) (1.063::5.342))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD A (posedge CLK) (-3.158::-0.249))
-            (SETUP A (posedge CLK) (0.249::3.158))
+            (HOLD D (posedge CLK) (-3.158::-0.249))
+            (SETUP D (posedge CLK) (0.249::3.158))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD A (posedge CLK) (-3.158::-0.249))
-            (SETUP A (posedge CLK) (0.249::3.158))
+            (HOLD D (posedge CLK) (-3.158::-0.249))
+            (SETUP D (posedge CLK) (0.249::3.158))
         )
     )
     (CELL
@@ -1837,8 +1837,12 @@
         (INSTANCE DSP48E1)
         (DELAY
             (ABSOLUTE
+                (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
                 (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297))
+                (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
                 (IOPATH CLK P (0.696::2.251)(1.533::5.320))
+                (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
+                (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
                 (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515))
             )
         )
@@ -1848,34 +1852,14 @@
         (INSTANCE DSP48E1)
         (DELAY
             (ABSOLUTE
+                (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
                 (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297))
+                (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
                 (IOPATH CLK P (0.696::2.251)(1.533::5.320))
+                (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
+                (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
                 (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515))
             )
         )
     )
-    (CELL
-        (CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC")
-        (INSTANCE DSP48E1)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
-                (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
-                (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
-                (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
-            )
-        )
-    )
-    (CELL
-        (CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY")
-        (INSTANCE DSP48E1)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
-                (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
-                (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
-                (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
-            )
-        )
-    )
 )
\ No newline at end of file
diff --git a/artix7/timings/DSP_R.sdf b/artix7/timings/DSP_R.sdf
index e23a6ff..4eb87d8 100644
--- a/artix7/timings/DSP_R.sdf
+++ b/artix7/timings/DSP_R.sdf
@@ -260,13 +260,13 @@
         (INSTANCE DSP48E1)
         (DELAY
             (ABSOLUTE
-                (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400))
-                (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046))
-                (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029))
-                (IOPATH A P (0.587::2.142)(1.346::5.070))
-                (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH A PCOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400))
+                (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029))
+                (IOPATH D P (0.587::2.142)(1.346::5.070))
+                (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH D PCOUT (0.580::2.133)(1.334::5.046))
             )
         )
     )
@@ -275,13 +275,13 @@
         (INSTANCE DSP48E1)
         (DELAY
             (ABSOLUTE
-                (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400))
-                (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046))
-                (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029))
-                (IOPATH A P (0.587::2.142)(1.346::5.070))
-                (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH A PCOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400))
+                (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029))
+                (IOPATH D P (0.587::2.142)(1.346::5.070))
+                (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH D PCOUT (0.580::2.133)(1.334::5.046))
             )
         )
     )
@@ -289,48 +289,48 @@
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD A (posedge CLK) (-4.951::-0.994))
-            (SETUP A (posedge CLK) (0.994::4.951))
+            (HOLD D (posedge CLK) (-4.951::-0.994))
+            (SETUP D (posedge CLK) (0.994::4.951))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD A (posedge CLK) (-5.342::-1.063))
-            (SETUP A (posedge CLK) (1.063::5.342))
+            (HOLD D (posedge CLK) (-5.342::-1.063))
+            (SETUP D (posedge CLK) (1.063::5.342))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD A (posedge CLK) (-4.951::-0.994))
-            (SETUP A (posedge CLK) (0.994::4.951))
+            (HOLD D (posedge CLK) (-4.951::-0.994))
+            (SETUP D (posedge CLK) (0.994::4.951))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD A (posedge CLK) (-5.342::-1.063))
-            (SETUP A (posedge CLK) (1.063::5.342))
+            (HOLD D (posedge CLK) (-5.342::-1.063))
+            (SETUP D (posedge CLK) (1.063::5.342))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD A (posedge CLK) (-3.158::-0.249))
-            (SETUP A (posedge CLK) (0.249::3.158))
+            (HOLD D (posedge CLK) (-3.158::-0.249))
+            (SETUP D (posedge CLK) (0.249::3.158))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD A (posedge CLK) (-3.158::-0.249))
-            (SETUP A (posedge CLK) (0.249::3.158))
+            (HOLD D (posedge CLK) (-3.158::-0.249))
+            (SETUP D (posedge CLK) (0.249::3.158))
         )
     )
     (CELL
@@ -1837,8 +1837,12 @@
         (INSTANCE DSP48E1)
         (DELAY
             (ABSOLUTE
+                (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
                 (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297))
+                (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
                 (IOPATH CLK P (0.696::2.251)(1.533::5.320))
+                (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
+                (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
                 (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515))
             )
         )
@@ -1848,34 +1852,14 @@
         (INSTANCE DSP48E1)
         (DELAY
             (ABSOLUTE
+                (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
                 (IOPATH CLK CARRYOUT (0.688::2.241)(1.522::5.297))
+                (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
                 (IOPATH CLK P (0.696::2.251)(1.533::5.320))
+                (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
+                (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
                 (IOPATH CLK PCOUT (0.717::2.334)(1.575::5.515))
             )
         )
     )
-    (CELL
-        (CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_DYNAMIC")
-        (INSTANCE DSP48E1)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
-                (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
-                (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
-                (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
-            )
-        )
-    )
-    (CELL
-        (CELLTYPE "DSP48E1DREG_1_A_ADREG_0_DREG_0_MREG_0_PREG_0_USE_DPORT_TRUE_USE_MULT_MULTIPLY")
-        (INSTANCE DSP48E1)
-        (DELAY
-            (ABSOLUTE
-                (IOPATH CLK CARRYCASCOUT (0.705::2.375)(1.531::5.650))
-                (IOPATH CLK MULTSIGNOUT (0.700::2.248)(1.510::5.279))
-                (IOPATH CLK PATTERNBDETECT (0.736::2.447)(1.618::5.885))
-                (IOPATH CLK PATTERNDETECT (0.736::2.447)(1.618::5.885))
-            )
-        )
-    )
 )
\ No newline at end of file
diff --git a/kintex7/mask_hclk_cmt.db b/kintex7/mask_hclk_cmt.db
index 9407e7c..da45b85 100644
--- a/kintex7/mask_hclk_cmt.db
+++ b/kintex7/mask_hclk_cmt.db
@@ -39,11 +39,14 @@ bit 26_155
 bit 26_156
 bit 26_158
 bit 26_159
+bit 26_174
+bit 26_175
 bit 26_181
 bit 26_182
 bit 26_183
 bit 26_184
 bit 26_185
+bit 26_195
 bit 26_196
 bit 26_197
 bit 26_198
@@ -115,11 +118,14 @@ bit 27_155
 bit 27_157
 bit 27_158
 bit 27_159
+bit 27_174
+bit 27_175
 bit 27_181
 bit 27_182
 bit 27_183
 bit 27_184
 bit 27_185
+bit 27_195
 bit 27_196
 bit 27_197
 bit 27_198
@@ -184,9 +190,16 @@ bit 28_152
 bit 28_153
 bit 28_154
 bit 28_155
+bit 28_156
+bit 28_157
+bit 28_158
+bit 28_159
 bit 28_174
 bit 28_175
 bit 28_186
+bit 28_192
+bit 28_193
+bit 28_195
 bit 28_196
 bit 28_197
 bit 28_198
@@ -234,9 +247,16 @@ bit 29_151
 bit 29_153
 bit 29_154
 bit 29_155
+bit 29_156
+bit 29_157
+bit 29_158
+bit 29_159
 bit 29_174
 bit 29_175
 bit 29_186
+bit 29_192
+bit 29_193
+bit 29_195
 bit 29_196
 bit 29_197
 bit 29_198
diff --git a/kintex7/mask_hclk_cmt_l.db b/kintex7/mask_hclk_cmt_l.db
index 9407e7c..da45b85 100644
--- a/kintex7/mask_hclk_cmt_l.db
+++ b/kintex7/mask_hclk_cmt_l.db
@@ -39,11 +39,14 @@ bit 26_155
 bit 26_156
 bit 26_158
 bit 26_159
+bit 26_174
+bit 26_175
 bit 26_181
 bit 26_182
 bit 26_183
 bit 26_184
 bit 26_185
+bit 26_195
 bit 26_196
 bit 26_197
 bit 26_198
@@ -115,11 +118,14 @@ bit 27_155
 bit 27_157
 bit 27_158
 bit 27_159
+bit 27_174
+bit 27_175
 bit 27_181
 bit 27_182
 bit 27_183
 bit 27_184
 bit 27_185
+bit 27_195
 bit 27_196
 bit 27_197
 bit 27_198
@@ -184,9 +190,16 @@ bit 28_152
 bit 28_153
 bit 28_154
 bit 28_155
+bit 28_156
+bit 28_157
+bit 28_158
+bit 28_159
 bit 28_174
 bit 28_175
 bit 28_186
+bit 28_192
+bit 28_193
+bit 28_195
 bit 28_196
 bit 28_197
 bit 28_198
@@ -234,9 +247,16 @@ bit 29_151
 bit 29_153
 bit 29_154
 bit 29_155
+bit 29_156
+bit 29_157
+bit 29_158
+bit 29_159
 bit 29_174
 bit 29_175
 bit 29_186
+bit 29_192
+bit 29_193
+bit 29_195
 bit 29_196
 bit 29_197
 bit 29_198
diff --git a/kintex7/segbits_hclk_cmt.db b/kintex7/segbits_hclk_cmt.db
index 746a48e..21675ed 100644
--- a/kintex7/segbits_hclk_cmt.db
+++ b/kintex7/segbits_hclk_cmt.db
@@ -14,6 +14,10 @@ HCLK_CMT.HCLK_CMT_CK_BUFRCLK0_USED 28_174
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK1_USED 29_174
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK2_USED 28_175
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK3_USED 29_175
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS0.HCLK_CMT_MUX_OUT_FREQ_REF0 29_157 29_159
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS1.HCLK_CMT_MUX_OUT_FREQ_REF1 28_157 28_159
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS2.HCLK_CMT_MUX_OUT_FREQ_REF2 29_156 29_158
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS3.HCLK_CMT_MUX_OUT_FREQ_REF3 28_156 28_158
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK0 27_150 27_155
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK1 26_155 27_150
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK2 27_150 27_154
@@ -578,6 +582,14 @@ HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 26_118 26_120
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 26_118 27_119
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 26_120 27_118
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 27_118 27_119
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_MUX_CLKINT_0 26_174 29_157 29_159 29_195
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_CCIO0 28_195 29_157 29_159
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_MUX_CLKINT_1 27_174 28_157 28_159 29_193
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_CCIO1 28_157 28_159 28_193
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_MUX_CLKINT_2 26_175 29_156 29_158 29_192
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_CCIO2 28_192 29_156 29_158
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_MUX_CLKINT_3 27_175 27_195 28_156 28_158
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_CCIO3 26_195 28_156 28_158
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 26_224 26_229
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 26_229 27_224
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 26_225 26_229
diff --git a/kintex7/segbits_hclk_cmt.origin_info.db b/kintex7/segbits_hclk_cmt.origin_info.db
index fe55be7..563fbe4 100644
--- a/kintex7/segbits_hclk_cmt.origin_info.db
+++ b/kintex7/segbits_hclk_cmt.origin_info.db
@@ -14,6 +14,10 @@ HCLK_CMT.HCLK_CMT_CK_BUFRCLK0_USED origin:045-hclk-cmt-pips 28_174
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK1_USED origin:045-hclk-cmt-pips 29_174
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK2_USED origin:045-hclk-cmt-pips 28_175
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK3_USED origin:045-hclk-cmt-pips 29_175
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS0.HCLK_CMT_MUX_OUT_FREQ_REF0 origin:045-hclk-cmt-pips 29_157 29_159
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS1.HCLK_CMT_MUX_OUT_FREQ_REF1 origin:045-hclk-cmt-pips 28_157 28_159
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS2.HCLK_CMT_MUX_OUT_FREQ_REF2 origin:045-hclk-cmt-pips 29_156 29_158
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS3.HCLK_CMT_MUX_OUT_FREQ_REF3 origin:045-hclk-cmt-pips 28_156 28_158
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_150 27_155
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_155 27_150
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_150 27_154
@@ -578,6 +582,14 @@ HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_118
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_118 27_119
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_120 27_118
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_118 27_119
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_MUX_CLKINT_0 origin:045-hclk-cmt-pips 26_174 29_157 29_159 29_195
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_195 29_157 29_159
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_MUX_CLKINT_1 origin:045-hclk-cmt-pips 27_174 28_157 28_159 29_193
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_157 28_159 28_193
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_MUX_CLKINT_2 origin:045-hclk-cmt-pips 26_175 29_156 29_158 29_192
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_192 29_156 29_158
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_MUX_CLKINT_3 origin:045-hclk-cmt-pips 27_175 27_195 28_156 28_158
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_195 28_156 28_158
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_224 26_229
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_229 27_224
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_225 26_229
diff --git a/kintex7/segbits_hclk_cmt_l.db b/kintex7/segbits_hclk_cmt_l.db
index 3115de0..926b9d8 100644
--- a/kintex7/segbits_hclk_cmt_l.db
+++ b/kintex7/segbits_hclk_cmt_l.db
@@ -518,6 +518,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO0 26_219 26_221
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO1 26_221 27_219
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO2 26_219 27_220
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO3 27_219 27_220
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS0.HCLK_CMT_MUX_OUT_FREQ_REF0 29_157 29_159
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS1.HCLK_CMT_MUX_OUT_FREQ_REF1 28_157 28_159
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS2.HCLK_CMT_MUX_OUT_FREQ_REF2 29_156 29_158
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS3.HCLK_CMT_MUX_OUT_FREQ_REF3 28_156 28_158
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 27_122 27_127
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 26_127 27_122
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 27_122 27_126
@@ -578,6 +582,14 @@ HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 26_118 26_120
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 26_118 27_119
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 26_120 27_118
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 27_118 27_119
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_MUX_CLKINT_0 26_174 29_157 29_159 29_195
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_CCIO0 28_195 29_157 29_159
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_MUX_CLKINT_1 27_174 28_157 28_159 29_193
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_CCIO1 28_157 28_159 28_193
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_MUX_CLKINT_2 26_175 29_156 29_158 29_192
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_CCIO2 28_192 29_156 29_158
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_MUX_CLKINT_3 27_175 27_195 28_156 28_158
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_CCIO3 26_195 28_156 28_158
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 26_224 26_229
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 26_229 27_224
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 26_225 26_229
diff --git a/kintex7/segbits_hclk_cmt_l.origin_info.db b/kintex7/segbits_hclk_cmt_l.origin_info.db
index 86c7134..fb37a25 100644
--- a/kintex7/segbits_hclk_cmt_l.origin_info.db
+++ b/kintex7/segbits_hclk_cmt_l.origin_info.db
@@ -518,6 +518,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_219 26_22
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_221 27_219
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_219 27_220
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_219 27_220
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS0.HCLK_CMT_MUX_OUT_FREQ_REF0 origin:045-hclk-cmt-pips 29_157 29_159
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS1.HCLK_CMT_MUX_OUT_FREQ_REF1 origin:045-hclk-cmt-pips 28_157 28_159
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS2.HCLK_CMT_MUX_OUT_FREQ_REF2 origin:045-hclk-cmt-pips 29_156 29_158
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS3.HCLK_CMT_MUX_OUT_FREQ_REF3 origin:045-hclk-cmt-pips 28_156 28_158
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_122 27_127
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_127 27_122
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_122 27_126
@@ -578,6 +582,14 @@ HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_1
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_118 27_119
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_120 27_118
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_118 27_119
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_MUX_CLKINT_0 origin:045-hclk-cmt-pips 26_174 29_157 29_159 29_195
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_195 29_157 29_159
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_MUX_CLKINT_1 origin:045-hclk-cmt-pips 27_174 28_157 28_159 29_193
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_157 28_159 28_193
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_MUX_CLKINT_2 origin:045-hclk-cmt-pips 26_175 29_156 29_158 29_192
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_192 29_156 29_158
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_MUX_CLKINT_3 origin:045-hclk-cmt-pips 27_175 27_195 28_156 28_158
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_195 28_156 28_158
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_224 26_229
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_229 27_224
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_225 26_229
diff --git a/kintex7/segbits_int_l.origin_info.db b/kintex7/segbits_int_l.origin_info.db
index 939789b..b78635d 100644
--- a/kintex7/segbits_int_l.origin_info.db
+++ b/kintex7/segbits_int_l.origin_info.db
@@ -170,7 +170,7 @@ INT_L.BYP_ALT7.BYP_BOUNCE2 origin:050-pip-seed !22_63 !23_63 !24_63 21_63 25_63
 INT_L.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63
 INT_L.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
-INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
+INT_L.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
 INT_L.BYP_ALT7.LOGIC_OUTS_L21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@@ -1897,7 +1897,7 @@ INT_L.EE4BEG1.SE6END1 origin:050-pip-seed 03_25 06_24
 INT_L.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
 INT_L.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
 INT_L.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
-INT_L.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
+INT_L.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
 INT_L.EE4BEG2.LOGIC_OUTS_L2 origin:050-pip-seed 02_41 04_42
 INT_L.EE4BEG2.LOGIC_OUTS_L6 origin:050-pip-seed 02_41 07_41
 INT_L.EE4BEG2.LOGIC_OUTS_L10 origin:050-pip-seed 03_40 07_41
@@ -1917,7 +1917,7 @@ INT_L.EE4BEG2.SE6END2 origin:050-pip-seed 03_41 06_40
 INT_L.EE4BEG2.SS2END2 origin:050-pip-seed 03_40 05_43
 INT_L.EE4BEG2.SS6END2 origin:050-pip-seed 05_43 06_40
 INT_L.EE4BEG2.SW2END2 origin:050-pip-seed 02_41 05_43
-INT_L.EE4BEG2.SW6END2 origin:056-pip-rem 05_40 05_43
+INT_L.EE4BEG2.SW6END2 origin:050-pip-seed 05_40 05_43
 INT_L.EE4BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_57 07_57
 INT_L.EE4BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_57 04_58
 INT_L.EE4BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_56 04_58
@@ -2271,9 +2271,9 @@ INT_L.NE6BEG3.NN6END3 origin:050-pip-seed 03_53 06_52
 INT_L.NE6BEG3.NW2END3 origin:050-pip-seed 02_53 04_53
 INT_L.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
 INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
-INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
+INT_L.NE6BEG3.SE6END3 origin:056-pip-rem 05_55 06_52
 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
-INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
+INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17
@@ -3345,7 +3345,7 @@ INT_L.SW6BEG3.NW2END_S0_0 origin:050-pip-seed 02_61 05_63
 INT_L.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60
 INT_L.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63
 INT_L.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
-INT_L.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
+INT_L.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
 INT_L.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
 INT_L.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61
 INT_L.SW6BEG3.SE6END3 origin:050-pip-seed 04_61 06_60
@@ -3603,7 +3603,7 @@ INT_L.WW4BEG2.LOGIC_OUTS_L20 origin:050-pip-seed 04_34 06_32
 INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32
 INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33
 INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
+INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
 INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
diff --git a/kintex7/segbits_int_r.origin_info.db b/kintex7/segbits_int_r.origin_info.db
index 9964270..9697a37 100644
--- a/kintex7/segbits_int_r.origin_info.db
+++ b/kintex7/segbits_int_r.origin_info.db
@@ -685,7 +685,7 @@ INT_R.EE4BEG1.SE6END1 origin:050-pip-seed 03_25 06_24
 INT_R.EE4BEG1.SS2END1 origin:050-pip-seed 03_24 05_27
 INT_R.EE4BEG1.SS6END1 origin:050-pip-seed 05_27 06_24
 INT_R.EE4BEG1.SW2END1 origin:050-pip-seed 02_25 05_27
-INT_R.EE4BEG1.SW6END1 origin:056-pip-rem 05_24 05_27
+INT_R.EE4BEG1.SW6END1 origin:050-pip-seed 05_24 05_27
 INT_R.EE4BEG2.LOGIC_OUTS2 origin:050-pip-seed 02_41 04_42
 INT_R.EE4BEG2.LOGIC_OUTS6 origin:050-pip-seed 02_41 07_41
 INT_R.EE4BEG2.LOGIC_OUTS10 origin:050-pip-seed 03_40 07_41
@@ -3321,7 +3321,7 @@ INT_R.SW6BEG2.LOGIC_OUTS14 origin:050-pip-seed 03_44 07_45
 INT_R.SW6BEG2.LOGIC_OUTS16 origin:050-pip-seed 04_46 06_44
 INT_R.SW6BEG2.LOGIC_OUTS20 origin:050-pip-seed 06_44 07_45
 INT_R.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
-INT_R.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
+INT_R.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
 INT_R.SW6BEG2.LVB0 origin:056-pip-rem 04_46 05_44
 INT_R.SW6BEG2.LVB12 origin:056-pip-rem 05_44 07_45
 INT_R.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
@@ -3344,7 +3344,7 @@ INT_R.SW6BEG3.NW2END_S0_0 origin:050-pip-seed 02_61 05_63
 INT_R.SW6BEG3.NW6END_S0_0 origin:050-pip-seed 05_63 06_60
 INT_R.SW6BEG3.WW4END_S0_0 origin:050-pip-seed 05_60 05_63
 INT_R.SW6BEG3.EE2END3 origin:050-pip-seed 03_60 04_61
-INT_R.SW6BEG3.EE4END3 origin:050-pip-seed 04_61 05_60
+INT_R.SW6BEG3.EE4END3 origin:056-pip-rem 04_61 05_60
 INT_R.SW6BEG3.LH0 origin:056-pip-rem 04_62 05_60
 INT_R.SW6BEG3.LV18 origin:056-pip-rem 05_60 07_61
 INT_R.SW6BEG3.SE2END3 origin:050-pip-seed 02_61 04_61
@@ -3603,7 +3603,7 @@ INT_R.WW4BEG2.LOGIC_OUTS20 origin:050-pip-seed 04_34 06_32
 INT_R.WW4BEG2.LVB0 origin:056-pip-rem 04_34 05_32
 INT_R.WW4BEG2.LVB12 origin:056-pip-rem 05_32 07_33
 INT_R.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_R.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
+INT_R.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
 INT_R.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_R.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_R.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
diff --git a/kintex7/segbits_liob33.db b/kintex7/segbits_liob33.db
index 37effb8..d9ad4de 100644
--- a/kintex7/segbits_liob33.db
+++ b/kintex7/segbits_liob33.db
@@ -14,14 +14,14 @@ LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_86 39_85 !39_87
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_106 !38_110 !39_105 !39_107 !39_109 !39_111
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 39_95
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 39_95
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 39_119 !39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 39_127
 LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
-LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127
 LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 39_113 !39_117 !39_119 39_125 39_127
+LIOB33.IOB_Y0.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 39_127
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_113 39_117 39_119 !39_125 !39_127
@@ -33,9 +33,9 @@ LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 38_64 !38_112 38_118 !38_126 39_65 !39_117
 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 38_64 !38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 38_64 !38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127
 LIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 39_119 !39_125 39_127
-LIOB33.IOB_Y0.SSTL135.IN !38_86 !39_85 39_87
-LIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 !39_85 39_87
-LIOB33.IOB_Y0.SSTL135.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111
+LIOB33.IOB_Y0.SSTL135_SSTL15.IN !38_86 !39_85 39_87
+LIOB33.IOB_Y0.SSTL135_SSTL15.IN_DIFF 38_86 !39_85 39_87
+LIOB33.IOB_Y0.SSTL135_SSTL15.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111
 LIOB33.IOB_Y1.IBUFDISABLE.I 39_45
 LIOB33.IOB_Y1.IN_TERM.NONE !38_04 !38_06 !39_05 !39_07
 LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 38_04 38_06 39_05 39_07
@@ -52,14 +52,14 @@ LIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 !38_00 38_02 !38_08 !38_10 38_14 38_62 39_01 39_
 LIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN !38_40 38_42 39_41
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 38_32
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 38_32
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 !38_00 !38_02 38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 38_00 38_02 38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
-LIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 38_00 !38_02 !38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_14 38_62 !39_01 39_09 39_15 39_63
+LIOB33.IOB_Y1.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED 38_00 !38_02 !38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 38_00 38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 !38_00 !38_02 38_08 38_10 38_14 38_62 39_01 !39_09 39_15 39_63
@@ -71,6 +71,7 @@ LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_62 !39_01 39_
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 38_00 38_02 !38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
 LIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED 38_00 !38_02 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
-LIOB33.IOB_Y1.SSTL135.IN 38_40 !38_42 !39_41
-LIOB33.IOB_Y1.SSTL135.SLEW.FAST 38_16 38_18 38_20 38_22 39_17 !39_21
+LIOB33.IOB_Y1.SSTL135_SSTL15.IN 38_40 !38_42 !39_41
+LIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF 38_40 !38_42 39_41
+LIOB33.IOB_Y1.SSTL135_SSTL15.SLEW.FAST 38_16 38_18 38_20 38_22 39_17 !39_21
 LIOB33.OUT_DIFF 39_59 39_61
diff --git a/kintex7/segbits_liob33.origin_info.db b/kintex7/segbits_liob33.origin_info.db
index 1b3e6f7..c0a134f 100644
--- a/kintex7/segbits_liob33.origin_info.db
+++ b/kintex7/segbits_liob33.origin_info.db
@@ -14,14 +14,14 @@ LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !39_87 38_86 39_85
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_106 !38_110 !39_105 !39_107 !39_109 !39_111
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 39_95
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 39_95
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_113 39_119 39_65
 LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_113 39_127 39_65
-LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_113 39_125 39_127 39_65
+LIOB33.IOB_Y0.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_113 39_119 39_125 39_65
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_113 39_125 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_113 39_117 39_119 39_65
@@ -33,9 +33,9 @@ LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_112 !38_126 !39_117 !39
 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_112 !38_118 !39_117 !39_127 38_126 38_64 39_119 39_125 39_65
 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_112 !38_118 !39_117 !39_119 38_126 38_64 39_125 39_127 39_65
 LIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_119 39_127 39_65
-LIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87
-LIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87
-LIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
+LIOB33.IOB_Y0.SSTL135_SSTL15.IN origin:030-iob !38_86 !39_85 39_87
+LIOB33.IOB_Y0.SSTL135_SSTL15.IN_DIFF origin:030-iob !39_85 38_86 39_87
+LIOB33.IOB_Y0.SSTL135_SSTL15.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
 LIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45
 LIOB33.IOB_Y1.IN_TERM.NONE origin:030-iob !38_4 !38_6 !39_5 !39_7
 LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_4 38_6 39_5 39_7
@@ -52,14 +52,14 @@ LIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 origin:030-iob !38_00 !38_08 !38_10 38_02 38_14
 LIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_09 38_00 38_14 38_62 39_01 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !38_40 38_42 39_41
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 38_32
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 38_32
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_00 !38_02 !38_10 !39_01 !39_09 38_08 38_14 38_62 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 origin:030-iob !38_10 !39_09 38_00 38_02 38_08 38_14 38_62 39_01 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_01 !39_09 38_00 38_14 38_62 39_15 39_63
-LIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 origin:030-iob !38_02 !38_08 38_00 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 38_00 38_02 38_14 38_62 39_09 39_15 39_63
+LIOB33.IOB_Y1.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED origin:030-iob !38_02 !38_08 38_00 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 38_02 38_08 38_14 38_62 39_01 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 origin:030-iob !38_08 !38_10 !39_09 38_00 38_02 38_14 38_62 39_01 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 38_08 38_10 38_14 38_62 39_01 39_15 39_63
@@ -71,6 +71,7 @@ LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 !39_15
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 !39_15 38_02 38_08 38_62 39_01 39_63
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_08 !38_10 !39_09 !39_15 38_00 38_02 38_62 39_01 39_63
 LIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED origin:030-iob !38_02 38_00 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
-LIOB33.IOB_Y1.SSTL135.IN origin:030-iob !38_42 !39_41 38_40
-LIOB33.IOB_Y1.SSTL135.SLEW.FAST origin:030-iob !39_21 38_16 38_18 38_20 38_22 39_17
+LIOB33.IOB_Y1.SSTL135_SSTL15.IN origin:030-iob !38_42 !39_41 38_40
+LIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF origin:030-iob !38_42 38_40 39_41
+LIOB33.IOB_Y1.SSTL135_SSTL15.SLEW.FAST origin:030-iob !39_21 38_16 38_18 38_20 38_22 39_17
 LIOB33.OUT_DIFF origin:030-iob 39_59 39_61
diff --git a/kintex7/segbits_lioi3.db b/kintex7/segbits_lioi3.db
index 7090fcc..ad18897 100644
--- a/kintex7/segbits_lioi3.db
+++ b/kintex7/segbits_lioi3.db
@@ -187,6 +187,7 @@ LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
 LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
 LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
+LIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
@@ -218,6 +219,7 @@ LIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 30_52 30_60 31_47
 LIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 30_48 30_60 31_51
 LIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 30_46 30_60 31_51
 LIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 30_50 30_60 31_47
+LIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 30_50 30_60 31_49
 LIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK0 30_60 31_49 31_51
 LIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK1 30_60 31_47 31_51
 LIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK2 30_48 30_50 30_60
diff --git a/kintex7/segbits_lioi3.origin_info.db b/kintex7/segbits_lioi3.origin_info.db
index 22472de..ab8dd75 100644
--- a/kintex7/segbits_lioi3.origin_info.db
+++ b/kintex7/segbits_lioi3.origin_info.db
@@ -187,6 +187,7 @@ LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
 LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
 LIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
+LIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob-pips 30_78 31_67 31_77
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
 LIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
@@ -218,6 +219,7 @@ LIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60 31_47
 LIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
 LIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
 LIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
+LIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
 LIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
 LIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
 LIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
diff --git a/kintex7/segbits_lioi3_tbytesrc.db b/kintex7/segbits_lioi3_tbytesrc.db
index a8c9058..eadd7b2 100644
--- a/kintex7/segbits_lioi3_tbytesrc.db
+++ b/kintex7/segbits_lioi3_tbytesrc.db
@@ -187,6 +187,7 @@ LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
+LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
@@ -218,6 +219,7 @@ LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 30_52 30_60 31_47
 LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 30_48 30_60 31_51
 LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 30_46 30_60 31_51
 LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 30_50 30_60 31_47
+LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 30_50 30_60 31_49
 LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK0 30_60 31_49 31_51
 LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK1 30_60 31_47 31_51
 LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK2 30_48 30_50 30_60
diff --git a/kintex7/segbits_lioi3_tbytesrc.origin_info.db b/kintex7/segbits_lioi3_tbytesrc.origin_info.db
index 005bb7e..2ce8aed 100644
--- a/kintex7/segbits_lioi3_tbytesrc.origin_info.db
+++ b/kintex7/segbits_lioi3_tbytesrc.origin_info.db
@@ -187,6 +187,7 @@ LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
+LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob-pips 30_78 31_67 31_77
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
 LIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
@@ -218,6 +219,7 @@ LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60
 LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
 LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
 LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
+LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
 LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
 LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
 LIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
diff --git a/kintex7/segbits_lioi3_tbyteterm.db b/kintex7/segbits_lioi3_tbyteterm.db
index 99d3232..e4b3cb0 100644
--- a/kintex7/segbits_lioi3_tbyteterm.db
+++ b/kintex7/segbits_lioi3_tbyteterm.db
@@ -187,6 +187,7 @@ LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
+LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
@@ -218,6 +219,7 @@ LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 30_52 30_60 31_47
 LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 30_48 30_60 31_51
 LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 30_46 30_60 31_51
 LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 30_50 30_60 31_47
+LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 30_50 30_60 31_49
 LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK0 30_60 31_49 31_51
 LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK1 30_60 31_47 31_51
 LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK2 30_48 30_50 30_60
diff --git a/kintex7/segbits_lioi3_tbyteterm.origin_info.db b/kintex7/segbits_lioi3_tbyteterm.origin_info.db
index 3643c92..85e4f73 100644
--- a/kintex7/segbits_lioi3_tbyteterm.origin_info.db
+++ b/kintex7/segbits_lioi3_tbyteterm.origin_info.db
@@ -187,6 +187,7 @@ LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
+LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob-pips 30_78 31_67 31_77
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
 LIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
@@ -218,6 +219,7 @@ LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60
 LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
 LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
 LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
+LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
 LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
 LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
 LIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
diff --git a/kintex7/segbits_riob33.db b/kintex7/segbits_riob33.db
index 88ceb7d..b07295c 100644
--- a/kintex7/segbits_riob33.db
+++ b/kintex7/segbits_riob33.db
@@ -14,14 +14,14 @@ RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_86 39_85 !39_87
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_106 !38_110 !39_105 !39_107 !39_109 !39_111
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 39_95
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 39_95
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 39_119 !39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 39_127
 RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
-RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127
 RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 39_113 !39_117 !39_119 39_125 39_127
+RIOB33.IOB_Y0.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 39_127
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_113 39_117 39_119 !39_125 !39_127
@@ -33,9 +33,9 @@ RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 38_64 !38_112 38_118 !38_126 39_65 !39_117
 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 38_64 !38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 38_64 !38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127
 RIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 39_119 !39_125 39_127
-RIOB33.IOB_Y0.SSTL135.IN !38_86 !39_85 39_87
-RIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 !39_85 39_87
-RIOB33.IOB_Y0.SSTL135.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111
+RIOB33.IOB_Y0.SSTL135_SSTL15.IN !38_86 !39_85 39_87
+RIOB33.IOB_Y0.SSTL135_SSTL15.IN_DIFF 38_86 !39_85 39_87
+RIOB33.IOB_Y0.SSTL135_SSTL15.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111
 RIOB33.IOB_Y1.IBUFDISABLE.I 39_45
 RIOB33.IOB_Y1.IN_TERM.NONE !38_04 !38_06 !39_05 !39_07
 RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 38_04 38_06 39_05 39_07
@@ -52,14 +52,14 @@ RIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 !38_00 38_02 !38_08 !38_10 38_14 38_62 39_01 39_
 RIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN !38_40 38_42 39_41
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 38_32
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 38_32
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 !38_00 !38_02 38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 38_00 38_02 38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
-RIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 38_00 !38_02 !38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_14 38_62 !39_01 39_09 39_15 39_63
+RIOB33.IOB_Y1.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED 38_00 !38_02 !38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 38_00 38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 !38_00 !38_02 38_08 38_10 38_14 38_62 39_01 !39_09 39_15 39_63
@@ -71,6 +71,7 @@ RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_62 !39_01 39_
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 38_00 38_02 !38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
 RIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED 38_00 !38_02 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
-RIOB33.IOB_Y1.SSTL135.IN 38_40 !38_42 !39_41
-RIOB33.IOB_Y1.SSTL135.SLEW.FAST 38_16 38_18 38_20 38_22 39_17 !39_21
+RIOB33.IOB_Y1.SSTL135_SSTL15.IN 38_40 !38_42 !39_41
+RIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF 38_40 !38_42 39_41
+RIOB33.IOB_Y1.SSTL135_SSTL15.SLEW.FAST 38_16 38_18 38_20 38_22 39_17 !39_21
 RIOB33.OUT_DIFF 39_59 39_61
diff --git a/kintex7/segbits_riob33.origin_info.db b/kintex7/segbits_riob33.origin_info.db
index a87b92b..a6d64c5 100644
--- a/kintex7/segbits_riob33.origin_info.db
+++ b/kintex7/segbits_riob33.origin_info.db
@@ -14,14 +14,14 @@ RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !39_87 38_86 39_85
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_106 !38_110 !39_105 !39_107 !39_109 !39_111
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 39_95
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 39_95
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_113 39_119 39_65
 RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_113 39_127 39_65
-RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_113 39_125 39_127 39_65
+RIOB33.IOB_Y0.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_113 39_119 39_125 39_65
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_113 39_125 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_113 39_117 39_119 39_65
@@ -33,9 +33,9 @@ RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_112 !38_126 !39_117 !39
 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_112 !38_118 !39_117 !39_127 38_126 38_64 39_119 39_125 39_65
 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_112 !38_118 !39_117 !39_119 38_126 38_64 39_125 39_127 39_65
 RIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_119 39_127 39_65
-RIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87
-RIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87
-RIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
+RIOB33.IOB_Y0.SSTL135_SSTL15.IN origin:030-iob !38_86 !39_85 39_87
+RIOB33.IOB_Y0.SSTL135_SSTL15.IN_DIFF origin:030-iob !39_85 38_86 39_87
+RIOB33.IOB_Y0.SSTL135_SSTL15.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
 RIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45
 RIOB33.IOB_Y1.IN_TERM.NONE origin:030-iob !38_4 !38_6 !39_5 !39_7
 RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_4 38_6 39_5 39_7
@@ -52,14 +52,14 @@ RIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 origin:030-iob !38_00 !38_08 !38_10 38_02 38_14
 RIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_09 38_00 38_14 38_62 39_01 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !38_40 38_42 39_41
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 38_32
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 38_32
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_00 !38_02 !38_10 !39_01 !39_09 38_08 38_14 38_62 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 origin:030-iob !38_10 !39_09 38_00 38_02 38_08 38_14 38_62 39_01 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_01 !39_09 38_00 38_14 38_62 39_15 39_63
-RIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 origin:030-iob !38_02 !38_08 38_00 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 38_00 38_02 38_14 38_62 39_09 39_15 39_63
+RIOB33.IOB_Y1.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED origin:030-iob !38_02 !38_08 38_00 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 38_02 38_08 38_14 38_62 39_01 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 origin:030-iob !38_08 !38_10 !39_09 38_00 38_02 38_14 38_62 39_01 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 38_08 38_10 38_14 38_62 39_01 39_15 39_63
@@ -71,6 +71,7 @@ RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 !39_15
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 !39_15 38_02 38_08 38_62 39_01 39_63
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_08 !38_10 !39_09 !39_15 38_00 38_02 38_62 39_01 39_63
 RIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED origin:030-iob !38_02 38_00 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
-RIOB33.IOB_Y1.SSTL135.IN origin:030-iob !38_42 !39_41 38_40
-RIOB33.IOB_Y1.SSTL135.SLEW.FAST origin:030-iob !39_21 38_16 38_18 38_20 38_22 39_17
+RIOB33.IOB_Y1.SSTL135_SSTL15.IN origin:030-iob !38_42 !39_41 38_40
+RIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF origin:030-iob !38_42 38_40 39_41
+RIOB33.IOB_Y1.SSTL135_SSTL15.SLEW.FAST origin:030-iob !39_21 38_16 38_18 38_20 38_22 39_17
 RIOB33.OUT_DIFF origin:030-iob 39_59 39_61
diff --git a/kintex7/segbits_rioi3.db b/kintex7/segbits_rioi3.db
index 27682b2..4f69fd1 100644
--- a/kintex7/segbits_rioi3.db
+++ b/kintex7/segbits_rioi3.db
@@ -187,6 +187,7 @@ RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
 RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
 RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
+RIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
@@ -218,6 +219,7 @@ RIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 30_52 30_60 31_47
 RIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 30_48 30_60 31_51
 RIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 30_46 30_60 31_51
 RIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 30_50 30_60 31_47
+RIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 30_50 30_60 31_49
 RIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK0 30_60 31_49 31_51
 RIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK1 30_60 31_47 31_51
 RIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK2 30_48 30_50 30_60
diff --git a/kintex7/segbits_rioi3.origin_info.db b/kintex7/segbits_rioi3.origin_info.db
index 2c9864c..499ad4e 100644
--- a/kintex7/segbits_rioi3.origin_info.db
+++ b/kintex7/segbits_rioi3.origin_info.db
@@ -187,6 +187,7 @@ RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67 31_75
 RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
 RIOI3.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
+RIOI3.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob-pips 30_78 31_67 31_77
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
 RIOI3.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
@@ -218,6 +219,7 @@ RIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60 31_47
 RIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
 RIOI3.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
 RIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
+RIOI3.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
 RIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
 RIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
 RIOI3.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
diff --git a/kintex7/segbits_rioi3_tbytesrc.db b/kintex7/segbits_rioi3_tbytesrc.db
index d12d64a..9b381ec 100644
--- a/kintex7/segbits_rioi3_tbytesrc.db
+++ b/kintex7/segbits_rioi3_tbytesrc.db
@@ -187,6 +187,7 @@ RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
+RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
@@ -218,6 +219,7 @@ RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 30_52 30_60 31_47
 RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 30_48 30_60 31_51
 RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 30_46 30_60 31_51
 RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 30_50 30_60 31_47
+RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 30_50 30_60 31_49
 RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK0 30_60 31_49 31_51
 RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK1 30_60 31_47 31_51
 RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK2 30_48 30_50 30_60
diff --git a/kintex7/segbits_rioi3_tbytesrc.origin_info.db b/kintex7/segbits_rioi3_tbytesrc.origin_info.db
index 6a4c9b7..3f4c532 100644
--- a/kintex7/segbits_rioi3_tbytesrc.origin_info.db
+++ b/kintex7/segbits_rioi3_tbytesrc.origin_info.db
@@ -187,6 +187,7 @@ RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
+RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob-pips 30_78 31_67 31_77
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
 RIOI3_TBYTESRC.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
@@ -218,6 +219,7 @@ RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60
 RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
 RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
 RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
+RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
 RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
 RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
 RIOI3_TBYTESRC.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
diff --git a/kintex7/segbits_rioi3_tbyteterm.db b/kintex7/segbits_rioi3_tbyteterm.db
index d7f7d2c..824bf6e 100644
--- a/kintex7/segbits_rioi3_tbyteterm.db
+++ b/kintex7/segbits_rioi3_tbyteterm.db
@@ -187,6 +187,7 @@ RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 30_80 31_67 31_75
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 30_76 31_67 31_79
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 30_76 31_67 31_81
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 30_80 31_67 31_77
+RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 30_78 31_67 31_77
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK0 30_76 30_78 31_67
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK1 30_76 30_80 31_67
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK2 31_67 31_77 31_79
@@ -218,6 +219,7 @@ RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 30_52 30_60 31_47
 RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 30_48 30_60 31_51
 RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 30_46 30_60 31_51
 RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 30_50 30_60 31_47
+RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 30_50 30_60 31_49
 RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK0 30_60 31_49 31_51
 RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK1 30_60 31_47 31_51
 RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK2 30_48 30_50 30_60
diff --git a/kintex7/segbits_rioi3_tbyteterm.origin_info.db b/kintex7/segbits_rioi3_tbyteterm.origin_info.db
index f0a7ecd..011ead8 100644
--- a/kintex7/segbits_rioi3_tbyteterm.origin_info.db
+++ b/kintex7/segbits_rioi3_tbyteterm.origin_info.db
@@ -187,6 +187,7 @@ RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_80 31_67
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_76 31_67 31_79
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_76 31_67 31_81
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX20_1 origin:037-iob-pips 30_80 31_67 31_77
+RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IMUX22_1 origin:037-iob-pips 30_78 31_67 31_77
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_76 30_78 31_67
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_76 30_80 31_67
 RIOI3_TBYTETERM.IOI_ILOGIC0_CLKB.IOI_IOCLK2 origin:037-iob-pips 31_67 31_77 31_79
@@ -218,6 +219,7 @@ RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO1 origin:037-iob-pips 30_52 30_60
 RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO2 origin:037-iob-pips 30_48 30_60 31_51
 RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_RCLK_FORIO3 origin:037-iob-pips 30_46 30_60 31_51
 RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX20_0 origin:037-iob-pips 30_50 30_60 31_47
+RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IMUX22_0 origin:037-iob-pips 30_50 30_60 31_49
 RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK0 origin:037-iob-pips 30_60 31_49 31_51
 RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK1 origin:037-iob-pips 30_60 31_47 31_51
 RIOI3_TBYTETERM.IOI_ILOGIC1_CLKB.IOI_IOCLK2 origin:037-iob-pips 30_48 30_50 30_60
diff --git a/zynq7/mask_hclk_cmt.db b/zynq7/mask_hclk_cmt.db
index 9407e7c..da45b85 100644
--- a/zynq7/mask_hclk_cmt.db
+++ b/zynq7/mask_hclk_cmt.db
@@ -39,11 +39,14 @@ bit 26_155
 bit 26_156
 bit 26_158
 bit 26_159
+bit 26_174
+bit 26_175
 bit 26_181
 bit 26_182
 bit 26_183
 bit 26_184
 bit 26_185
+bit 26_195
 bit 26_196
 bit 26_197
 bit 26_198
@@ -115,11 +118,14 @@ bit 27_155
 bit 27_157
 bit 27_158
 bit 27_159
+bit 27_174
+bit 27_175
 bit 27_181
 bit 27_182
 bit 27_183
 bit 27_184
 bit 27_185
+bit 27_195
 bit 27_196
 bit 27_197
 bit 27_198
@@ -184,9 +190,16 @@ bit 28_152
 bit 28_153
 bit 28_154
 bit 28_155
+bit 28_156
+bit 28_157
+bit 28_158
+bit 28_159
 bit 28_174
 bit 28_175
 bit 28_186
+bit 28_192
+bit 28_193
+bit 28_195
 bit 28_196
 bit 28_197
 bit 28_198
@@ -234,9 +247,16 @@ bit 29_151
 bit 29_153
 bit 29_154
 bit 29_155
+bit 29_156
+bit 29_157
+bit 29_158
+bit 29_159
 bit 29_174
 bit 29_175
 bit 29_186
+bit 29_192
+bit 29_193
+bit 29_195
 bit 29_196
 bit 29_197
 bit 29_198
diff --git a/zynq7/mask_hclk_cmt_l.db b/zynq7/mask_hclk_cmt_l.db
index 9407e7c..da45b85 100644
--- a/zynq7/mask_hclk_cmt_l.db
+++ b/zynq7/mask_hclk_cmt_l.db
@@ -39,11 +39,14 @@ bit 26_155
 bit 26_156
 bit 26_158
 bit 26_159
+bit 26_174
+bit 26_175
 bit 26_181
 bit 26_182
 bit 26_183
 bit 26_184
 bit 26_185
+bit 26_195
 bit 26_196
 bit 26_197
 bit 26_198
@@ -115,11 +118,14 @@ bit 27_155
 bit 27_157
 bit 27_158
 bit 27_159
+bit 27_174
+bit 27_175
 bit 27_181
 bit 27_182
 bit 27_183
 bit 27_184
 bit 27_185
+bit 27_195
 bit 27_196
 bit 27_197
 bit 27_198
@@ -184,9 +190,16 @@ bit 28_152
 bit 28_153
 bit 28_154
 bit 28_155
+bit 28_156
+bit 28_157
+bit 28_158
+bit 28_159
 bit 28_174
 bit 28_175
 bit 28_186
+bit 28_192
+bit 28_193
+bit 28_195
 bit 28_196
 bit 28_197
 bit 28_198
@@ -234,9 +247,16 @@ bit 29_151
 bit 29_153
 bit 29_154
 bit 29_155
+bit 29_156
+bit 29_157
+bit 29_158
+bit 29_159
 bit 29_174
 bit 29_175
 bit 29_186
+bit 29_192
+bit 29_193
+bit 29_195
 bit 29_196
 bit 29_197
 bit 29_198
diff --git a/zynq7/mask_lioi3.db b/zynq7/mask_lioi3.db
index 919251a..4a5f68d 100644
--- a/zynq7/mask_lioi3.db
+++ b/zynq7/mask_lioi3.db
@@ -7,7 +7,6 @@ bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35
-bit 25_39
 bit 25_47
 bit 25_48
 bit 25_51
@@ -21,6 +20,7 @@ bit 25_95
 bit 25_96
 bit 25_98
 bit 25_99
+bit 25_111
 bit 25_112
 bit 25_115
 bit 25_116
diff --git a/zynq7/mask_lioi3_tbytesrc.db b/zynq7/mask_lioi3_tbytesrc.db
index 919251a..4a5f68d 100644
--- a/zynq7/mask_lioi3_tbytesrc.db
+++ b/zynq7/mask_lioi3_tbytesrc.db
@@ -7,7 +7,6 @@ bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35
-bit 25_39
 bit 25_47
 bit 25_48
 bit 25_51
@@ -21,6 +20,7 @@ bit 25_95
 bit 25_96
 bit 25_98
 bit 25_99
+bit 25_111
 bit 25_112
 bit 25_115
 bit 25_116
diff --git a/zynq7/mask_lioi3_tbyteterm.db b/zynq7/mask_lioi3_tbyteterm.db
index 919251a..4a5f68d 100644
--- a/zynq7/mask_lioi3_tbyteterm.db
+++ b/zynq7/mask_lioi3_tbyteterm.db
@@ -7,7 +7,6 @@ bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35
-bit 25_39
 bit 25_47
 bit 25_48
 bit 25_51
@@ -21,6 +20,7 @@ bit 25_95
 bit 25_96
 bit 25_98
 bit 25_99
+bit 25_111
 bit 25_112
 bit 25_115
 bit 25_116
diff --git a/zynq7/mask_rioi3.db b/zynq7/mask_rioi3.db
index 919251a..4a5f68d 100644
--- a/zynq7/mask_rioi3.db
+++ b/zynq7/mask_rioi3.db
@@ -7,7 +7,6 @@ bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35
-bit 25_39
 bit 25_47
 bit 25_48
 bit 25_51
@@ -21,6 +20,7 @@ bit 25_95
 bit 25_96
 bit 25_98
 bit 25_99
+bit 25_111
 bit 25_112
 bit 25_115
 bit 25_116
diff --git a/zynq7/mask_rioi3_tbytesrc.db b/zynq7/mask_rioi3_tbytesrc.db
index 919251a..4a5f68d 100644
--- a/zynq7/mask_rioi3_tbytesrc.db
+++ b/zynq7/mask_rioi3_tbytesrc.db
@@ -7,7 +7,6 @@ bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35
-bit 25_39
 bit 25_47
 bit 25_48
 bit 25_51
@@ -21,6 +20,7 @@ bit 25_95
 bit 25_96
 bit 25_98
 bit 25_99
+bit 25_111
 bit 25_112
 bit 25_115
 bit 25_116
diff --git a/zynq7/mask_rioi3_tbyteterm.db b/zynq7/mask_rioi3_tbyteterm.db
index 919251a..4a5f68d 100644
--- a/zynq7/mask_rioi3_tbyteterm.db
+++ b/zynq7/mask_rioi3_tbyteterm.db
@@ -7,7 +7,6 @@ bit 25_31
 bit 25_32
 bit 25_34
 bit 25_35
-bit 25_39
 bit 25_47
 bit 25_48
 bit 25_51
@@ -21,6 +20,7 @@ bit 25_95
 bit 25_96
 bit 25_98
 bit 25_99
+bit 25_111
 bit 25_112
 bit 25_115
 bit 25_116
diff --git a/zynq7/segbits_hclk_cmt.db b/zynq7/segbits_hclk_cmt.db
index 746a48e..21675ed 100644
--- a/zynq7/segbits_hclk_cmt.db
+++ b/zynq7/segbits_hclk_cmt.db
@@ -14,6 +14,10 @@ HCLK_CMT.HCLK_CMT_CK_BUFRCLK0_USED 28_174
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK1_USED 29_174
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK2_USED 28_175
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK3_USED 29_175
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS0.HCLK_CMT_MUX_OUT_FREQ_REF0 29_157 29_159
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS1.HCLK_CMT_MUX_OUT_FREQ_REF1 28_157 28_159
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS2.HCLK_CMT_MUX_OUT_FREQ_REF2 29_156 29_158
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS3.HCLK_CMT_MUX_OUT_FREQ_REF3 28_156 28_158
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK0 27_150 27_155
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK1 26_155 27_150
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK2 27_150 27_154
@@ -578,6 +582,14 @@ HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 26_118 26_120
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 26_118 27_119
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 26_120 27_118
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 27_118 27_119
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_MUX_CLKINT_0 26_174 29_157 29_159 29_195
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_CCIO0 28_195 29_157 29_159
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_MUX_CLKINT_1 27_174 28_157 28_159 29_193
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_CCIO1 28_157 28_159 28_193
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_MUX_CLKINT_2 26_175 29_156 29_158 29_192
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_CCIO2 28_192 29_156 29_158
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_MUX_CLKINT_3 27_175 27_195 28_156 28_158
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_CCIO3 26_195 28_156 28_158
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 26_224 26_229
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 26_229 27_224
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 26_225 26_229
diff --git a/zynq7/segbits_hclk_cmt.origin_info.db b/zynq7/segbits_hclk_cmt.origin_info.db
index fe55be7..563fbe4 100644
--- a/zynq7/segbits_hclk_cmt.origin_info.db
+++ b/zynq7/segbits_hclk_cmt.origin_info.db
@@ -14,6 +14,10 @@ HCLK_CMT.HCLK_CMT_CK_BUFRCLK0_USED origin:045-hclk-cmt-pips 28_174
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK1_USED origin:045-hclk-cmt-pips 29_174
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK2_USED origin:045-hclk-cmt-pips 28_175
 HCLK_CMT.HCLK_CMT_CK_BUFRCLK3_USED origin:045-hclk-cmt-pips 29_175
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS0.HCLK_CMT_MUX_OUT_FREQ_REF0 origin:045-hclk-cmt-pips 29_157 29_159
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS1.HCLK_CMT_MUX_OUT_FREQ_REF1 origin:045-hclk-cmt-pips 28_157 28_159
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS2.HCLK_CMT_MUX_OUT_FREQ_REF2 origin:045-hclk-cmt-pips 29_156 29_158
+HCLK_CMT.HCLK_CMT_FREQ_REF_NS3.HCLK_CMT_MUX_OUT_FREQ_REF3 origin:045-hclk-cmt-pips 28_156 28_158
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_150 27_155
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_155 27_150
 HCLK_CMT.HCLK_CMT_MUX_CLK_0.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_150 27_154
@@ -578,6 +582,14 @@ HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_118
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_118 27_119
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_120 27_118
 HCLK_CMT.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_118 27_119
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_MUX_CLKINT_0 origin:045-hclk-cmt-pips 26_174 29_157 29_159 29_195
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_195 29_157 29_159
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_MUX_CLKINT_1 origin:045-hclk-cmt-pips 27_174 28_157 28_159 29_193
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_157 28_159 28_193
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_MUX_CLKINT_2 origin:045-hclk-cmt-pips 26_175 29_156 29_158 29_192
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_192 29_156 29_158
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_MUX_CLKINT_3 origin:045-hclk-cmt-pips 27_175 27_195 28_156 28_158
+HCLK_CMT.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_195 28_156 28_158
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_224 26_229
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_229 27_224
 HCLK_CMT.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_225 26_229
diff --git a/zynq7/segbits_hclk_cmt_l.db b/zynq7/segbits_hclk_cmt_l.db
index 3115de0..926b9d8 100644
--- a/zynq7/segbits_hclk_cmt_l.db
+++ b/zynq7/segbits_hclk_cmt_l.db
@@ -518,6 +518,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO0 26_219 26_221
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO1 26_221 27_219
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO2 26_219 27_220
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO3 27_219 27_220
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS0.HCLK_CMT_MUX_OUT_FREQ_REF0 29_157 29_159
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS1.HCLK_CMT_MUX_OUT_FREQ_REF1 28_157 28_159
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS2.HCLK_CMT_MUX_OUT_FREQ_REF2 29_156 29_158
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS3.HCLK_CMT_MUX_OUT_FREQ_REF3 28_156 28_158
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 27_122 27_127
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 26_127 27_122
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 27_122 27_126
@@ -578,6 +582,14 @@ HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 26_118 26_120
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 26_118 27_119
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 26_120 27_118
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 27_118 27_119
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_MUX_CLKINT_0 26_174 29_157 29_159 29_195
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_CCIO0 28_195 29_157 29_159
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_MUX_CLKINT_1 27_174 28_157 28_159 29_193
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_CCIO1 28_157 28_159 28_193
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_MUX_CLKINT_2 26_175 29_156 29_158 29_192
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_CCIO2 28_192 29_156 29_158
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_MUX_CLKINT_3 27_175 27_195 28_156 28_158
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_CCIO3 26_195 28_156 28_158
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 26_224 26_229
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 26_229 27_224
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 26_225 26_229
diff --git a/zynq7/segbits_hclk_cmt_l.origin_info.db b/zynq7/segbits_hclk_cmt_l.origin_info.db
index 86c7134..fb37a25 100644
--- a/zynq7/segbits_hclk_cmt_l.origin_info.db
+++ b/zynq7/segbits_hclk_cmt_l.origin_info.db
@@ -518,6 +518,10 @@ HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_219 26_22
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_221 27_219
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_219 27_220
 HCLK_CMT_L.HCLK_CMT_CK_IN13.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_219 27_220
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS0.HCLK_CMT_MUX_OUT_FREQ_REF0 origin:045-hclk-cmt-pips 29_157 29_159
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS1.HCLK_CMT_MUX_OUT_FREQ_REF1 origin:045-hclk-cmt-pips 28_157 28_159
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS2.HCLK_CMT_MUX_OUT_FREQ_REF2 origin:045-hclk-cmt-pips 29_156 29_158
+HCLK_CMT_L.HCLK_CMT_FREQ_REF_NS3.HCLK_CMT_MUX_OUT_FREQ_REF3 origin:045-hclk-cmt-pips 28_156 28_158
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 27_122 27_127
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_127 27_122
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 27_122 27_126
@@ -578,6 +582,14 @@ HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 26_1
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 26_118 27_119
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 26_120 27_118
 HCLK_CMT_L.HCLK_CMT_MUX_MMCM_CLKIN2.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 27_118 27_119
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_MUX_CLKINT_0 origin:045-hclk-cmt-pips 26_174 29_157 29_159 29_195
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF0.HCLK_CMT_CCIO0 origin:045-hclk-cmt-pips 28_195 29_157 29_159
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_MUX_CLKINT_1 origin:045-hclk-cmt-pips 27_174 28_157 28_159 29_193
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF1.HCLK_CMT_CCIO1 origin:045-hclk-cmt-pips 28_157 28_159 28_193
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_MUX_CLKINT_2 origin:045-hclk-cmt-pips 26_175 29_156 29_158 29_192
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF2.HCLK_CMT_CCIO2 origin:045-hclk-cmt-pips 28_192 29_156 29_158
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_MUX_CLKINT_3 origin:045-hclk-cmt-pips 27_175 27_195 28_156 28_158
+HCLK_CMT_L.HCLK_CMT_MUX_OUT_FREQ_REF3.HCLK_CMT_CCIO3 origin:045-hclk-cmt-pips 26_195 28_156 28_158
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK0 origin:045-hclk-cmt-pips 26_224 26_229
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK1 origin:045-hclk-cmt-pips 26_229 27_224
 HCLK_CMT_L.HCLK_CMT_MUX_PLLE2_CLKFBIN.HCLK_CMT_CK_BUFHCLK2 origin:045-hclk-cmt-pips 26_225 26_229
diff --git a/zynq7/segbits_int_l.origin_info.db b/zynq7/segbits_int_l.origin_info.db
index e1925b4..d6d514d 100644
--- a/zynq7/segbits_int_l.origin_info.db
+++ b/zynq7/segbits_int_l.origin_info.db
@@ -2253,7 +2253,7 @@ INT_L.NE6BEG2.NW6END2 origin:050-pip-seed 04_37 06_36
 INT_L.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39
 INT_L.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36
 INT_L.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37
-INT_L.NE6BEG2.WW4END2 origin:050-pip-seed 04_37 05_36
+INT_L.NE6BEG2.WW4END2 origin:056-pip-rem 04_37 05_36
 INT_L.NE6BEG3.LOGIC_OUTS_L3 origin:050-pip-seed 02_53 04_54
 INT_L.NE6BEG3.LOGIC_OUTS_L7 origin:050-pip-seed 02_53 07_53
 INT_L.NE6BEG3.LOGIC_OUTS_L11 origin:050-pip-seed 03_52 07_53
@@ -2273,7 +2273,7 @@ INT_L.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
 INT_L.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
 INT_L.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
 INT_L.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
-INT_L.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
+INT_L.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
 INT_L.NL1BEG0.LOGIC_OUTS_L1 origin:050-pip-seed 07_16 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L5 origin:050-pip-seed 11_17 14_17
 INT_L.NL1BEG0.LOGIC_OUTS_L9 origin:050-pip-seed 10_17 13_17
@@ -2491,7 +2491,7 @@ INT_L.NN6BEG3.NN6END3 origin:050-pip-seed 02_54 07_55
 INT_L.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
 INT_L.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
 INT_L.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
-INT_L.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55
+INT_L.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
 INT_L.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
 INT_L.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
 INT_L.NR1BEG0.LOGIC_OUTS_L0 origin:050-pip-seed 11_07 14_07
@@ -2662,7 +2662,7 @@ INT_L.NW6BEG0.LOGIC_OUTS_L18 origin:050-pip-seed 05_01 07_03
 INT_L.NW6BEG0.LOGIC_OUTS_L22 origin:050-pip-seed 06_02 07_03
 INT_L.NW6BEG0.LV_L0 origin:056-pip-rem 04_03 06_02
 INT_L.NW6BEG0.SS2END_N0_3 origin:050-pip-seed 02_03 04_00
-INT_L.NW6BEG0.SS6END_N0_3 origin:056-pip-rem 04_00 07_03
+INT_L.NW6BEG0.SS6END_N0_3 origin:050-pip-seed 04_00 07_03
 INT_L.NW6BEG0.SW2END_N0_3 origin:050-pip-seed 03_02 04_00
 INT_L.NW6BEG0.SW6END_N0_3 origin:050-pip-seed 04_00 04_03
 INT_L.NW6BEG0.WW2END_N0_3 origin:050-pip-seed 02_02 02_03
@@ -3323,7 +3323,7 @@ INT_L.SW6BEG2.LOGIC_OUTS_L20 origin:050-pip-seed 06_44 07_45
 INT_L.SW6BEG2.LVB_L0 origin:056-pip-rem 04_46 05_44
 INT_L.SW6BEG2.LVB_L12 origin:056-pip-rem 05_44 07_45
 INT_L.SW6BEG2.EE2END2 origin:050-pip-seed 03_44 04_45
-INT_L.SW6BEG2.EE4END2 origin:050-pip-seed 04_45 05_44
+INT_L.SW6BEG2.EE4END2 origin:056-pip-rem 04_45 05_44
 INT_L.SW6BEG2.NW2END3 origin:050-pip-seed 02_45 05_47
 INT_L.SW6BEG2.NW6END3 origin:050-pip-seed 05_47 06_44
 INT_L.SW6BEG2.SE2END2 origin:050-pip-seed 02_45 04_45
@@ -3603,7 +3603,7 @@ INT_L.WW4BEG2.LOGIC_OUTS_L20 origin:050-pip-seed 04_34 06_32
 INT_L.WW4BEG2.LVB_L0 origin:056-pip-rem 04_34 05_32
 INT_L.WW4BEG2.LVB_L12 origin:056-pip-rem 05_32 07_33
 INT_L.WW4BEG2.NE2END2 origin:050-pip-seed 02_33 05_35
-INT_L.WW4BEG2.NE6END2 origin:056-pip-rem 05_32 05_35
+INT_L.WW4BEG2.NE6END2 origin:050-pip-seed 05_32 05_35
 INT_L.WW4BEG2.NN2END2 origin:050-pip-seed 03_32 05_35
 INT_L.WW4BEG2.NN6END2 origin:050-pip-seed 05_35 06_32
 INT_L.WW4BEG2.NW2END2 origin:050-pip-seed 02_33 03_33
diff --git a/zynq7/segbits_int_r.origin_info.db b/zynq7/segbits_int_r.origin_info.db
index f175394..78bf6ea 100644
--- a/zynq7/segbits_int_r.origin_info.db
+++ b/zynq7/segbits_int_r.origin_info.db
@@ -170,7 +170,7 @@ INT_R.BYP_ALT7.BYP_BOUNCE2 origin:050-pip-seed !22_63 !23_63 !24_63 21_63 25_63
 INT_R.BYP_ALT7.BYP_BOUNCE6 origin:050-pip-seed !22_63 !23_63 !25_63 21_63 24_63
 INT_R.BYP_ALT7.EL1END_S3_0 origin:050-pip-seed !23_63 17_63 22_63 24_63 25_63
 INT_R.BYP_ALT7.FAN_BOUNCE_S3_4 origin:050-pip-seed !23_63 21_63 22_63 24_63 25_63
-INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:056-pip-rem !22_63 21_63 23_63 24_63 25_63
+INT_R.BYP_ALT7.FAN_BOUNCE_S3_6 origin:050-pip-seed !22_63 21_63 23_63 24_63 25_63
 INT_R.BYP_ALT7.LOGIC_OUTS3 origin:051-pip-imuxlout-bypalts !22_63 20_63 23_63 24_63 25_63
 INT_R.BYP_ALT7.LOGIC_OUTS15 origin:051-pip-imuxlout-bypalts !23_63 20_63 22_63 24_63 25_63
 INT_R.BYP_ALT7.LOGIC_OUTS21 origin:051-pip-imuxlout-bypalts !22_63 !23_63 !24_63 20_63 25_63
@@ -328,7 +328,7 @@ INT_R.FAN_ALT3.WR1END3 origin:050-pip-seed !23_56 16_56 22_56 24_56 25_56
 INT_R.FAN_ALT3.WW2END3 origin:050-pip-seed !22_56 !23_56 !24_56 19_57 25_56
 INT_R.FAN_ALT4.BYP_BOUNCE_N3_3 origin:059-pip-byp-bounce !22_08 !23_08 !24_08 20_08 25_08
 INT_R.FAN_ALT4.BYP_BOUNCE_N3_7 origin:059-pip-byp-bounce !22_08 !23_08 !25_08 20_08 24_08
-INT_R.FAN_ALT4.FAN_BOUNCE2 origin:050-pip-seed !23_08 20_08 22_08 24_08 25_08
+INT_R.FAN_ALT4.FAN_BOUNCE2 origin:056-pip-rem !23_08 20_08 22_08 24_08 25_08
 INT_R.FAN_ALT4.FAN_BOUNCE7 origin:056-pip-rem !22_08 20_08 23_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS4 origin:050-pip-seed !23_08 21_08 22_08 24_08 25_08
 INT_R.FAN_ALT4.LOGIC_OUTS8 origin:050-pip-seed !22_08 21_08 23_08 24_08 25_08
@@ -2253,7 +2253,7 @@ INT_R.NE6BEG2.NW6END2 origin:050-pip-seed 04_37 06_36
 INT_R.NE6BEG2.SE2END2 origin:050-pip-seed 02_37 05_39
 INT_R.NE6BEG2.SE6END2 origin:050-pip-seed 05_39 06_36
 INT_R.NE6BEG2.WW2END1 origin:050-pip-seed 03_36 04_37
-INT_R.NE6BEG2.WW4END2 origin:056-pip-rem 04_37 05_36
+INT_R.NE6BEG2.WW4END2 origin:050-pip-seed 04_37 05_36
 INT_R.NE6BEG3.LOGIC_OUTS3 origin:050-pip-seed 02_53 04_54
 INT_R.NE6BEG3.LOGIC_OUTS7 origin:050-pip-seed 02_53 07_53
 INT_R.NE6BEG3.LOGIC_OUTS11 origin:050-pip-seed 03_52 07_53
@@ -2273,7 +2273,7 @@ INT_R.NE6BEG3.NW6END3 origin:050-pip-seed 04_53 06_52
 INT_R.NE6BEG3.SE2END3 origin:050-pip-seed 02_53 05_55
 INT_R.NE6BEG3.SE6END3 origin:050-pip-seed 05_55 06_52
 INT_R.NE6BEG3.WW2END2 origin:050-pip-seed 03_52 04_53
-INT_R.NE6BEG3.WW4END3 origin:050-pip-seed 04_53 05_52
+INT_R.NE6BEG3.WW4END3 origin:056-pip-rem 04_53 05_52
 INT_R.NL1BEG0.LOGIC_OUTS1 origin:050-pip-seed 07_16 14_17
 INT_R.NL1BEG0.LOGIC_OUTS5 origin:050-pip-seed 11_17 14_17
 INT_R.NL1BEG0.LOGIC_OUTS9 origin:050-pip-seed 10_17 13_17
@@ -2471,7 +2471,7 @@ INT_R.NN6BEG2.NN6END2 origin:050-pip-seed 02_38 07_39
 INT_R.NN6BEG2.NW2END2 origin:050-pip-seed 03_38 04_36
 INT_R.NN6BEG2.NW6END2 origin:050-pip-seed 04_36 07_39
 INT_R.NN6BEG2.SE2END2 origin:050-pip-seed 03_38 05_38
-INT_R.NN6BEG2.SE6END2 origin:050-pip-seed 05_38 07_39
+INT_R.NN6BEG2.SE6END2 origin:056-pip-rem 05_38 07_39
 INT_R.NN6BEG2.WW2END1 origin:050-pip-seed 02_39 04_36
 INT_R.NN6BEG2.WW4END2 origin:050-pip-seed 04_36 04_39
 INT_R.NN6BEG3.LOGIC_OUTS3 origin:050-pip-seed 03_54 06_54
@@ -2491,7 +2491,7 @@ INT_R.NN6BEG3.NN6END3 origin:050-pip-seed 02_54 07_55
 INT_R.NN6BEG3.NW2END3 origin:050-pip-seed 03_54 04_52
 INT_R.NN6BEG3.NW6END3 origin:050-pip-seed 04_52 07_55
 INT_R.NN6BEG3.SE2END3 origin:050-pip-seed 03_54 05_54
-INT_R.NN6BEG3.SE6END3 origin:056-pip-rem 05_54 07_55
+INT_R.NN6BEG3.SE6END3 origin:050-pip-seed 05_54 07_55
 INT_R.NN6BEG3.WW2END2 origin:050-pip-seed 02_55 04_52
 INT_R.NN6BEG3.WW4END3 origin:050-pip-seed 04_52 04_55
 INT_R.NR1BEG0.LOGIC_OUTS0 origin:050-pip-seed 11_07 14_07
@@ -2887,7 +2887,7 @@ INT_R.SE6BEG3.LV18 origin:056-pip-rem 04_59 05_57
 INT_R.SE6BEG3.NE2END3 origin:050-pip-seed 03_58 04_56
 INT_R.SE6BEG3.NE6END3 origin:050-pip-seed 04_56 04_59
 INT_R.SE6BEG3.NN2END3 origin:050-pip-seed 02_59 04_56
-INT_R.SE6BEG3.NN6END3 origin:056-pip-rem 04_56 07_59
+INT_R.SE6BEG3.NN6END3 origin:050-pip-seed 04_56 07_59
 INT_R.SE6BEG3.SE2END3 origin:050-pip-seed 02_58 03_58
 INT_R.SE6BEG3.SE6END3 origin:050-pip-seed 02_58 07_59
 INT_R.SE6BEG3.SS2END3 origin:050-pip-seed 02_59 05_58
diff --git a/zynq7/segbits_liob33.db b/zynq7/segbits_liob33.db
index 37effb8..d9ad4de 100644
--- a/zynq7/segbits_liob33.db
+++ b/zynq7/segbits_liob33.db
@@ -14,14 +14,14 @@ LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_86 39_85 !39_87
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_106 !38_110 !39_105 !39_107 !39_109 !39_111
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 39_95
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 39_95
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 39_119 !39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 39_127
 LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
-LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127
 LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 39_113 !39_117 !39_119 39_125 39_127
+LIOB33.IOB_Y0.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 39_127
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_113 39_117 39_119 !39_125 !39_127
@@ -33,9 +33,9 @@ LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 38_64 !38_112 38_118 !38_126 39_65 !39_117
 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 38_64 !38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127
 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 38_64 !38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127
 LIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 39_119 !39_125 39_127
-LIOB33.IOB_Y0.SSTL135.IN !38_86 !39_85 39_87
-LIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 !39_85 39_87
-LIOB33.IOB_Y0.SSTL135.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111
+LIOB33.IOB_Y0.SSTL135_SSTL15.IN !38_86 !39_85 39_87
+LIOB33.IOB_Y0.SSTL135_SSTL15.IN_DIFF 38_86 !39_85 39_87
+LIOB33.IOB_Y0.SSTL135_SSTL15.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111
 LIOB33.IOB_Y1.IBUFDISABLE.I 39_45
 LIOB33.IOB_Y1.IN_TERM.NONE !38_04 !38_06 !39_05 !39_07
 LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 38_04 38_06 39_05 39_07
@@ -52,14 +52,14 @@ LIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 !38_00 38_02 !38_08 !38_10 38_14 38_62 39_01 39_
 LIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN !38_40 38_42 39_41
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 38_32
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 38_32
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 !38_00 !38_02 38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 38_00 38_02 38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
-LIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 38_00 !38_02 !38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_14 38_62 !39_01 39_09 39_15 39_63
+LIOB33.IOB_Y1.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED 38_00 !38_02 !38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 38_00 38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 !38_00 !38_02 38_08 38_10 38_14 38_62 39_01 !39_09 39_15 39_63
@@ -71,6 +71,7 @@ LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_62 !39_01 39_
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 38_00 38_02 !38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
 LIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED 38_00 !38_02 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
-LIOB33.IOB_Y1.SSTL135.IN 38_40 !38_42 !39_41
-LIOB33.IOB_Y1.SSTL135.SLEW.FAST 38_16 38_18 38_20 38_22 39_17 !39_21
+LIOB33.IOB_Y1.SSTL135_SSTL15.IN 38_40 !38_42 !39_41
+LIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF 38_40 !38_42 39_41
+LIOB33.IOB_Y1.SSTL135_SSTL15.SLEW.FAST 38_16 38_18 38_20 38_22 39_17 !39_21
 LIOB33.OUT_DIFF 39_59 39_61
diff --git a/zynq7/segbits_liob33.origin_info.db b/zynq7/segbits_liob33.origin_info.db
index 1b3e6f7..c0a134f 100644
--- a/zynq7/segbits_liob33.origin_info.db
+++ b/zynq7/segbits_liob33.origin_info.db
@@ -14,14 +14,14 @@ LIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38
 LIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !39_87 38_86 39_85
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_106 !38_110 !39_105 !39_107 !39_109 !39_111
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
-LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 39_95
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
+LIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 39_95
 LIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_113 39_119 39_65
 LIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_113 39_127 39_65
-LIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_113 39_125 39_127 39_65
+LIOB33.IOB_Y0.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_113 39_119 39_125 39_65
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_113 39_125 39_127 39_65
 LIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_113 39_117 39_119 39_65
@@ -33,9 +33,9 @@ LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_112 !38_126 !39_117 !39
 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_112 !38_118 !39_117 !39_127 38_126 38_64 39_119 39_125 39_65
 LIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_112 !38_118 !39_117 !39_119 38_126 38_64 39_125 39_127 39_65
 LIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_119 39_127 39_65
-LIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87
-LIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87
-LIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
+LIOB33.IOB_Y0.SSTL135_SSTL15.IN origin:030-iob !38_86 !39_85 39_87
+LIOB33.IOB_Y0.SSTL135_SSTL15.IN_DIFF origin:030-iob !39_85 38_86 39_87
+LIOB33.IOB_Y0.SSTL135_SSTL15.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
 LIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45
 LIOB33.IOB_Y1.IN_TERM.NONE origin:030-iob !38_4 !38_6 !39_5 !39_7
 LIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_4 38_6 39_5 39_7
@@ -52,14 +52,14 @@ LIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 origin:030-iob !38_00 !38_08 !38_10 38_02 38_14
 LIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_09 38_00 38_14 38_62 39_01 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !38_40 38_42 39_41
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
-LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 38_32
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
+LIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 38_32
 LIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_00 !38_02 !38_10 !39_01 !39_09 38_08 38_14 38_62 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 origin:030-iob !38_10 !39_09 38_00 38_02 38_08 38_14 38_62 39_01 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_01 !39_09 38_00 38_14 38_62 39_15 39_63
-LIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 origin:030-iob !38_02 !38_08 38_00 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 38_00 38_02 38_14 38_62 39_09 39_15 39_63
+LIOB33.IOB_Y1.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED origin:030-iob !38_02 !38_08 38_00 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 38_02 38_08 38_14 38_62 39_01 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 origin:030-iob !38_08 !38_10 !39_09 38_00 38_02 38_14 38_62 39_01 39_15 39_63
 LIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 38_08 38_10 38_14 38_62 39_01 39_15 39_63
@@ -71,6 +71,7 @@ LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 !39_15
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 !39_15 38_02 38_08 38_62 39_01 39_63
 LIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_08 !38_10 !39_09 !39_15 38_00 38_02 38_62 39_01 39_63
 LIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED origin:030-iob !38_02 38_00 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
-LIOB33.IOB_Y1.SSTL135.IN origin:030-iob !38_42 !39_41 38_40
-LIOB33.IOB_Y1.SSTL135.SLEW.FAST origin:030-iob !39_21 38_16 38_18 38_20 38_22 39_17
+LIOB33.IOB_Y1.SSTL135_SSTL15.IN origin:030-iob !38_42 !39_41 38_40
+LIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF origin:030-iob !38_42 38_40 39_41
+LIOB33.IOB_Y1.SSTL135_SSTL15.SLEW.FAST origin:030-iob !39_21 38_16 38_18 38_20 38_22 39_17
 LIOB33.OUT_DIFF origin:030-iob 39_59 39_61
diff --git a/zynq7/segbits_riob33.db b/zynq7/segbits_riob33.db
index 88ceb7d..b07295c 100644
--- a/zynq7/segbits_riob33.db
+++ b/zynq7/segbits_riob33.db
@@ -14,14 +14,14 @@ RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 38_64 38_112 38_118 38_126 39_65 39_113 !39_117
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN 38_86 39_85 !39_87
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_106 !38_110 !39_105 !39_107 !39_109 !39_111
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 39_95
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_64 !38_112 38_118 !38_126 !39_65 39_113 !39_117 39_119 39_125 !39_127
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW 38_106 38_110 39_105 !39_107 39_109 !39_111
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 39_95
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 39_119 !39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 39_127
 RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 38_64 38_112 !38_118 !38_126 39_65 39_113 !39_117 !39_119 !39_125 39_127
-RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127
 RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_64 38_112 38_118 !38_126 39_65 39_113 !39_117 !39_119 39_125 39_127
+RIOB33.IOB_Y0.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 !39_119 !39_125 39_127
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 39_119 39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 38_64 38_112 !38_118 38_126 39_65 39_113 !39_117 !39_119 39_125 39_127
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 38_64 38_112 !38_118 38_126 39_65 39_113 39_117 39_119 !39_125 !39_127
@@ -33,9 +33,9 @@ RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 38_64 !38_112 38_118 !38_126 39_65 !39_117
 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 38_64 !38_112 !38_118 38_126 39_65 !39_117 39_119 39_125 !39_127
 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 38_64 !38_112 !38_118 38_126 39_65 !39_117 !39_119 39_125 39_127
 RIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED 38_64 38_112 38_118 38_126 39_65 39_113 39_117 39_119 !39_125 39_127
-RIOB33.IOB_Y0.SSTL135.IN !38_86 !39_85 39_87
-RIOB33.IOB_Y0.SSTL135.IN_DIFF 38_86 !39_85 39_87
-RIOB33.IOB_Y0.SSTL135.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111
+RIOB33.IOB_Y0.SSTL135_SSTL15.IN !38_86 !39_85 39_87
+RIOB33.IOB_Y0.SSTL135_SSTL15.IN_DIFF 38_86 !39_85 39_87
+RIOB33.IOB_Y0.SSTL135_SSTL15.SLEW.FAST !38_106 38_110 39_105 39_107 39_109 39_111
 RIOB33.IOB_Y1.IBUFDISABLE.I 39_45
 RIOB33.IOB_Y1.IN_TERM.NONE !38_04 !38_06 !39_05 !39_07
 RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 38_04 38_06 39_05 39_07
@@ -52,14 +52,14 @@ RIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 !38_00 38_02 !38_08 !38_10 38_14 38_62 39_01 39_
 RIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN !38_40 38_42 39_41
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN 38_32
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY !38_00 38_02 38_08 !38_10 38_14 !38_62 !39_01 39_09 !39_15 !39_63
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW !38_16 38_18 !38_20 38_22 39_17 39_21
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN 38_32
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 !38_00 !38_02 38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 38_00 38_02 38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 38_00 !38_02 !38_08 !38_10 38_14 38_62 !39_01 !39_09 39_15 39_63
-RIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 38_00 !38_02 !38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_14 38_62 !39_01 39_09 39_15 39_63
+RIOB33.IOB_Y1.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED 38_00 !38_02 !38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 38_00 38_02 !38_08 !38_10 38_14 38_62 39_01 !39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 !38_00 !38_02 38_08 38_10 38_14 38_62 39_01 !39_09 39_15 39_63
@@ -71,6 +71,7 @@ RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 38_00 38_02 !38_08 !38_10 38_62 !39_01 39_
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 !38_00 38_02 38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 38_00 38_02 !38_08 !38_10 38_62 39_01 !39_09 !39_15 39_63
 RIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED 38_00 !38_02 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
-RIOB33.IOB_Y1.SSTL135.IN 38_40 !38_42 !39_41
-RIOB33.IOB_Y1.SSTL135.SLEW.FAST 38_16 38_18 38_20 38_22 39_17 !39_21
+RIOB33.IOB_Y1.SSTL135_SSTL15.IN 38_40 !38_42 !39_41
+RIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF 38_40 !38_42 39_41
+RIOB33.IOB_Y1.SSTL135_SSTL15.SLEW.FAST 38_16 38_18 38_20 38_22 39_17 !39_21
 RIOB33.OUT_DIFF 39_59 39_61
diff --git a/zynq7/segbits_riob33.origin_info.db b/zynq7/segbits_riob33.origin_info.db
index a87b92b..a6d64c5 100644
--- a/zynq7/segbits_riob33.origin_info.db
+++ b/zynq7/segbits_riob33.origin_info.db
@@ -14,14 +14,14 @@ RIOB33.IOB_Y0.LVCMOS12.DRIVE.I4 origin:030-iob !39_117 !39_119 !39_127 38_112 38
 RIOB33.IOB_Y0.LVCMOS12.DRIVE.I12 origin:030-iob !38_118 !39_117 !39_119 !39_125 38_112 38_126 38_64 39_113 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !39_87 38_86 39_85
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_106 !38_110 !39_105 !39_107 !39_109 !39_111
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
-RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 39_95
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_112 !38_126 !38_64 !39_117 !39_127 !39_65 38_118 39_113 39_119 39_125
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !39_107 !39_111 38_106 38_110 39_105 39_109
+RIOB33.IOB_Y0.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 39_95
 RIOB33.IOB_Y0.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_118 !38_126 !39_117 !39_125 !39_127 38_112 38_64 39_113 39_119 39_65
 RIOB33.IOB_Y0.LVCMOS15.DRIVE.I8 origin:030-iob !38_118 !39_117 38_112 38_126 38_64 39_113 39_119 39_125 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS15.DRIVE.I12 origin:030-iob !38_118 !38_126 !39_117 !39_119 !39_125 38_112 38_64 39_113 39_127 39_65
-RIOB33.IOB_Y0.LVCMOS15.DRIVE.I16 origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_126 !39_117 !39_119 38_112 38_118 38_64 39_113 39_125 39_127 39_65
+RIOB33.IOB_Y0.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED origin:030-iob !39_119 !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_118 !39_117 !39_127 38_112 38_126 38_64 39_113 39_119 39_125 39_65
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I16 origin:030-iob !38_118 !39_117 !39_119 38_112 38_126 38_64 39_113 39_125 39_127 39_65
 RIOB33.IOB_Y0.LVCMOS18.DRIVE.I24 origin:030-iob !38_118 !39_125 !39_127 38_112 38_126 38_64 39_113 39_117 39_119 39_65
@@ -33,9 +33,9 @@ RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_112 !38_126 !39_117 !39
 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_112 !38_118 !39_117 !39_127 38_126 38_64 39_119 39_125 39_65
 RIOB33.IOB_Y0.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_112 !38_118 !39_117 !39_119 38_126 38_64 39_125 39_127 39_65
 RIOB33.IOB_Y0.SSTL135.DRIVE.I_FIXED origin:030-iob !39_125 38_112 38_118 38_126 38_64 39_113 39_117 39_119 39_127 39_65
-RIOB33.IOB_Y0.SSTL135.IN origin:030-iob !38_86 !39_85 39_87
-RIOB33.IOB_Y0.SSTL135.IN_DIFF origin:030-iob !39_85 38_86 39_87
-RIOB33.IOB_Y0.SSTL135.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
+RIOB33.IOB_Y0.SSTL135_SSTL15.IN origin:030-iob !38_86 !39_85 39_87
+RIOB33.IOB_Y0.SSTL135_SSTL15.IN_DIFF origin:030-iob !39_85 38_86 39_87
+RIOB33.IOB_Y0.SSTL135_SSTL15.SLEW.FAST origin:030-iob !38_106 38_110 39_105 39_107 39_109 39_111
 RIOB33.IOB_Y1.IBUFDISABLE.I origin:030-iob 39_45
 RIOB33.IOB_Y1.IN_TERM.NONE origin:030-iob !38_4 !38_6 !39_5 !39_7
 RIOB33.IOB_Y1.IN_TERM.UNTUNED_SPLIT_40 origin:030-iob 38_4 38_6 39_5 39_7
@@ -52,14 +52,14 @@ RIOB33.IOB_Y1.LVCMOS12.DRIVE.I4 origin:030-iob !38_00 !38_08 !38_10 38_02 38_14
 RIOB33.IOB_Y1.LVCMOS12.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_09 38_00 38_14 38_62 39_01 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18.IN origin:030-iob !38_40 38_42 39_41
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL.SLEW.FAST origin:030-iob !38_16 !38_18 !38_20 !38_22 !39_17 !39_21
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
-RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135.STEPDOWN origin:030-iob 38_32
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.IN_ONLY origin:030-iob !38_00 !38_10 !38_62 !39_01 !39_15 !39_63 38_02 38_08 38_14 39_09
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_LVCMOS25_LVCMOS33_LVTTL_SSTL135_SSTL15.SLEW.SLOW origin:030-iob !38_16 !38_20 38_18 38_22 39_17 39_21
+RIOB33.IOB_Y1.LVCMOS12_LVCMOS15_LVCMOS18_SSTL135_SSTL15.STEPDOWN origin:030-iob 38_32
 RIOB33.IOB_Y1.LVCMOS12_LVCMOS25.DRIVE.I8 origin:030-iob !38_00 !38_02 !38_10 !39_01 !39_09 38_08 38_14 38_62 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15.DRIVE.I8 origin:030-iob !38_10 !39_09 38_00 38_02 38_08 38_14 38_62 39_01 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15.DRIVE.I12 origin:030-iob !38_02 !38_08 !38_10 !39_01 !39_09 38_00 38_14 38_62 39_15 39_63
-RIOB33.IOB_Y1.LVCMOS15.DRIVE.I16 origin:030-iob !38_02 !38_08 38_00 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS15_LVCMOS18_LVCMOS25.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 38_00 38_02 38_14 38_62 39_09 39_15 39_63
+RIOB33.IOB_Y1.LVCMOS15_SSTL15.DRIVE.I16_I_FIXED origin:030-iob !38_02 !38_08 38_00 38_10 38_14 38_62 39_01 39_09 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 38_02 38_08 38_14 38_62 39_01 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I16 origin:030-iob !38_08 !38_10 !39_09 38_00 38_02 38_14 38_62 39_01 39_15 39_63
 RIOB33.IOB_Y1.LVCMOS18.DRIVE.I24 origin:030-iob !38_00 !38_02 !39_09 38_08 38_10 38_14 38_62 39_01 39_15 39_63
@@ -71,6 +71,7 @@ RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I4 origin:030-iob !38_08 !38_10 !39_01 !39_15
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I8 origin:030-iob !38_00 !38_10 !39_09 !39_15 38_02 38_08 38_62 39_01 39_63
 RIOB33.IOB_Y1.LVCMOS33_LVTTL.DRIVE.I12_I16 origin:030-iob !38_08 !38_10 !39_09 !39_15 38_00 38_02 38_62 39_01 39_63
 RIOB33.IOB_Y1.SSTL135.DRIVE.I_FIXED origin:030-iob !38_02 38_00 38_08 38_10 38_14 38_62 39_01 39_09 39_15 39_63
-RIOB33.IOB_Y1.SSTL135.IN origin:030-iob !38_42 !39_41 38_40
-RIOB33.IOB_Y1.SSTL135.SLEW.FAST origin:030-iob !39_21 38_16 38_18 38_20 38_22 39_17
+RIOB33.IOB_Y1.SSTL135_SSTL15.IN origin:030-iob !38_42 !39_41 38_40
+RIOB33.IOB_Y1.SSTL135_SSTL15.IN_DIFF origin:030-iob !38_42 38_40 39_41
+RIOB33.IOB_Y1.SSTL135_SSTL15.SLEW.FAST origin:030-iob !39_21 38_16 38_18 38_20 38_22 39_17
 RIOB33.OUT_DIFF origin:030-iob 39_59 39_61
diff --git a/zynq7/timings/DSP_L.sdf b/zynq7/timings/DSP_L.sdf
index 8b64711..e23a6ff 100644
--- a/zynq7/timings/DSP_L.sdf
+++ b/zynq7/timings/DSP_L.sdf
@@ -260,13 +260,13 @@
         (INSTANCE DSP48E1)
         (DELAY
             (ABSOLUTE
-                (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400))
-                (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046))
-                (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029))
-                (IOPATH D P (0.587::2.142)(1.346::5.070))
-                (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH D PCOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400))
+                (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029))
+                (IOPATH A P (0.587::2.142)(1.346::5.070))
+                (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH A PCOUT (0.580::2.133)(1.334::5.046))
             )
         )
     )
@@ -275,13 +275,13 @@
         (INSTANCE DSP48E1)
         (DELAY
             (ABSOLUTE
-                (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400))
-                (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046))
-                (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029))
-                (IOPATH D P (0.587::2.142)(1.346::5.070))
-                (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH D PCOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400))
+                (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029))
+                (IOPATH A P (0.587::2.142)(1.346::5.070))
+                (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH A PCOUT (0.580::2.133)(1.334::5.046))
             )
         )
     )
@@ -289,48 +289,48 @@
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD D (posedge CLK) (-4.951::-0.994))
-            (SETUP D (posedge CLK) (0.994::4.951))
+            (HOLD A (posedge CLK) (-4.951::-0.994))
+            (SETUP A (posedge CLK) (0.994::4.951))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD D (posedge CLK) (-5.342::-1.063))
-            (SETUP D (posedge CLK) (1.063::5.342))
+            (HOLD A (posedge CLK) (-5.342::-1.063))
+            (SETUP A (posedge CLK) (1.063::5.342))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD D (posedge CLK) (-4.951::-0.994))
-            (SETUP D (posedge CLK) (0.994::4.951))
+            (HOLD A (posedge CLK) (-4.951::-0.994))
+            (SETUP A (posedge CLK) (0.994::4.951))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD D (posedge CLK) (-5.342::-1.063))
-            (SETUP D (posedge CLK) (1.063::5.342))
+            (HOLD A (posedge CLK) (-5.342::-1.063))
+            (SETUP A (posedge CLK) (1.063::5.342))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD D (posedge CLK) (-3.158::-0.249))
-            (SETUP D (posedge CLK) (0.249::3.158))
+            (HOLD A (posedge CLK) (-3.158::-0.249))
+            (SETUP A (posedge CLK) (0.249::3.158))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD D (posedge CLK) (-3.158::-0.249))
-            (SETUP D (posedge CLK) (0.249::3.158))
+            (HOLD A (posedge CLK) (-3.158::-0.249))
+            (SETUP A (posedge CLK) (0.249::3.158))
         )
     )
     (CELL
diff --git a/zynq7/timings/DSP_R.sdf b/zynq7/timings/DSP_R.sdf
index 8b64711..e23a6ff 100644
--- a/zynq7/timings/DSP_R.sdf
+++ b/zynq7/timings/DSP_R.sdf
@@ -260,13 +260,13 @@
         (INSTANCE DSP48E1)
         (DELAY
             (ABSOLUTE
-                (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400))
-                (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046))
-                (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029))
-                (IOPATH D P (0.587::2.142)(1.346::5.070))
-                (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH D PCOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400))
+                (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029))
+                (IOPATH A P (0.587::2.142)(1.346::5.070))
+                (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH A PCOUT (0.580::2.133)(1.334::5.046))
             )
         )
     )
@@ -275,13 +275,13 @@
         (INSTANCE DSP48E1)
         (DELAY
             (ABSOLUTE
-                (IOPATH D CARRYCASCOUT (0.596::2.268)(1.345::5.400))
-                (IOPATH D CARRYOUT (0.580::2.133)(1.334::5.046))
-                (IOPATH D MULTSIGNOUT (0.592::2.140)(1.323::5.029))
-                (IOPATH D P (0.587::2.142)(1.346::5.070))
-                (IOPATH D PATTERNBDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH D PATTERNDETECT (0.628::2.339)(1.430::5.636))
-                (IOPATH D PCOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH A CARRYCASCOUT (0.596::2.268)(1.345::5.400))
+                (IOPATH A CARRYOUT (0.580::2.133)(1.334::5.046))
+                (IOPATH A MULTSIGNOUT (0.592::2.140)(1.323::5.029))
+                (IOPATH A P (0.587::2.142)(1.346::5.070))
+                (IOPATH A PATTERNBDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH A PATTERNDETECT (0.628::2.339)(1.430::5.636))
+                (IOPATH A PCOUT (0.580::2.133)(1.334::5.046))
             )
         )
     )
@@ -289,48 +289,48 @@
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_NO_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD D (posedge CLK) (-4.951::-0.994))
-            (SETUP D (posedge CLK) (0.994::4.951))
+            (HOLD A (posedge CLK) (-4.951::-0.994))
+            (SETUP A (posedge CLK) (0.994::4.951))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC_USE_PATTERN_DETECT_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD D (posedge CLK) (-5.342::-1.063))
-            (SETUP D (posedge CLK) (1.063::5.342))
+            (HOLD A (posedge CLK) (-5.342::-1.063))
+            (SETUP A (posedge CLK) (1.063::5.342))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_NO_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD D (posedge CLK) (-4.951::-0.994))
-            (SETUP D (posedge CLK) (0.994::4.951))
+            (HOLD A (posedge CLK) (-4.951::-0.994))
+            (SETUP A (posedge CLK) (0.994::4.951))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_0_PREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY_USE_PATTERN_DETECT_PATDET")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD D (posedge CLK) (-5.342::-1.063))
-            (SETUP D (posedge CLK) (1.063::5.342))
+            (HOLD A (posedge CLK) (-5.342::-1.063))
+            (SETUP A (posedge CLK) (1.063::5.342))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_DYNAMIC")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD D (posedge CLK) (-3.158::-0.249))
-            (SETUP D (posedge CLK) (0.249::3.158))
+            (HOLD A (posedge CLK) (-3.158::-0.249))
+            (SETUP A (posedge CLK) (0.249::3.158))
         )
     )
     (CELL
         (CELLTYPE "DSP48E1_ADREG_0_DREG_0_MREG_1_USE_DPORT_TRUE_USE_MULT_MULTIPLY")
         (INSTANCE DSP48E1)
         (TIMINGCHECK
-            (HOLD D (posedge CLK) (-3.158::-0.249))
-            (SETUP D (posedge CLK) (0.249::3.158))
+            (HOLD A (posedge CLK) (-3.158::-0.249))
+            (SETUP A (posedge CLK) (0.249::3.158))
         )
     )
     (CELL
diff --git a/zynq7/timings/LIOB33.sdf b/zynq7/timings/LIOB33.sdf
index 43ad6e0..bfd9395 100644
--- a/zynq7/timings/LIOB33.sdf
+++ b/zynq7/timings/LIOB33.sdf
@@ -4,11 +4,11 @@
     (TIMESCALE 1ns)
 
     (CELL
-        (CELLTYPE "IOB33M_INBUF_ENIOB33_IOBM_INBUF_EN")
+        (CELLTYPE "IOB33_INBUF_ENIOB33_IOB_INBUF_EN")
         (INSTANCE IOB33M)
         (DELAY
             (ABSOLUTE
-                (IOPATH IBUFDISABLE OUT (0.339::0.390)(1.016::1.169))
+                (IOPATH IBUFDISABLE OUT (0.339::0.390)(1.027::1.182))
             )
         )
     )