From 304ed7589f9a3b996e76b1f844746e4dc7bb8644 Mon Sep 17 00:00:00 2001 From: Tim 'mithro' Ansell Date: Thu, 21 Mar 2019 19:03:51 -0700 Subject: [PATCH] Updating zynq7 based on "Merge pull request #737 from mithro/enable-dsp". See [Info File](Info.md) for details. Signed-off-by: Tim 'mithro' Ansell --- Info.md | 26 +- zynq7/mask_dsp_l.db | 414 ++++++++++++++++++++++++++++++ zynq7/mask_dsp_r.db | 414 ++++++++++++++++++++++++++++++ zynq7/mask_liob33.db | 126 ++++----- zynq7/mask_riob33.db | 126 ++++----- zynq7/ppips_clk_bufg_bot_r.db | 128 +++++++++ zynq7/ppips_clk_bufg_top_r.db | 128 +++++++++ zynq7/ppips_clk_hrow_bot_r.db | 168 ++++++++++++ zynq7/ppips_clk_hrow_top_r.db | 168 ++++++++++++ zynq7/ppips_io_int_interface_r.db | 24 ++ zynq7/ppips_rioi3.db | 165 ++++++++++++ zynq7/ppips_rioi3_sing.db | 72 ++++++ zynq7/ppips_rioi3_tbytesrc.db | 158 ++++++++++++ zynq7/segbits_dsp_l.db | 192 ++++++++++++++ zynq7/segbits_dsp_r.db | 192 ++++++++++++++ zynq7/segbits_int_l.db | 6 +- zynq7/segbits_int_r.db | 2 +- 17 files changed, 2378 insertions(+), 131 deletions(-) create mode 100644 zynq7/ppips_clk_bufg_bot_r.db create mode 100644 zynq7/ppips_clk_bufg_top_r.db create mode 100644 zynq7/ppips_clk_hrow_bot_r.db create mode 100644 zynq7/ppips_clk_hrow_top_r.db create mode 100644 zynq7/ppips_io_int_interface_r.db create mode 100644 zynq7/ppips_rioi3.db create mode 100644 zynq7/ppips_rioi3_sing.db create mode 100644 zynq7/ppips_rioi3_tbytesrc.db diff --git a/Info.md b/Info.md index 11c6736..a5470f9 100644 --- a/Info.md +++ b/Info.md @@ -37,7 +37,7 @@ These files are released under the very permissive [CC0 1.0 Universal](COPYING). # Details -Last updated on Fri Mar 22 02:00:28 UTC 2019 (2019-03-22T02:00:28+00:00). +Last updated on Fri Mar 22 02:03:23 UTC 2019 (2019-03-22T02:03:23+00:00). Created using [Project X-Ray](https://github.com/SymbiFlow/prjxray) version [a7066bb](https://github.com/SymbiFlow/prjxray/commit/a7066bb246ab8c11d3c6313ac25317f2b46d17aa). @@ -672,12 +672,12 @@ Results have checksums; * [`f2932beb245918b0613c2abfad2b6d15c1cf31956d5a9ad9d76faec5e4dc54f7 ./zynq7/mask_clk_bufg_top_r.db`](./zynq7/mask_clk_bufg_top_r.db) * [`54c076cbee2f848e15bc434a531fbe8fd2b73d3d3394c80b66e2b8ffa1a2b5c1 ./zynq7/mask_clk_hrow_bot_r.db`](./zynq7/mask_clk_hrow_bot_r.db) * [`54c076cbee2f848e15bc434a531fbe8fd2b73d3d3394c80b66e2b8ffa1a2b5c1 ./zynq7/mask_clk_hrow_top_r.db`](./zynq7/mask_clk_hrow_top_r.db) - * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/mask_dsp_l.db`](./zynq7/mask_dsp_l.db) - * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/mask_dsp_r.db`](./zynq7/mask_dsp_r.db) + * [`aab2e5f20890d805b6a78db6e6fd68d6024a140ac5e960feb4162d7e49582ca8 ./zynq7/mask_dsp_l.db`](./zynq7/mask_dsp_l.db) + * [`aab2e5f20890d805b6a78db6e6fd68d6024a140ac5e960feb4162d7e49582ca8 ./zynq7/mask_dsp_r.db`](./zynq7/mask_dsp_r.db) * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./zynq7/mask_hclk_l.db`](./zynq7/mask_hclk_l.db) * [`76d1e0bd4b7ad492cf3fe8698b2b5f46f7dcc5fe446984e5dccae373c63edafd ./zynq7/mask_hclk_r.db`](./zynq7/mask_hclk_r.db) - * [`88c90bebca39f40487ea4836e7870fa2e0ffa7b8d5f4bc21a29cb580c1266e22 ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db) - * [`88c90bebca39f40487ea4836e7870fa2e0ffa7b8d5f4bc21a29cb580c1266e22 ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db) + * [`89a87d97a68658b2b9c7e9d6a68806179e82f3dd646d39e458c47d19f33172e9 ./zynq7/mask_liob33.db`](./zynq7/mask_liob33.db) + * [`89a87d97a68658b2b9c7e9d6a68806179e82f3dd646d39e458c47d19f33172e9 ./zynq7/mask_riob33.db`](./zynq7/mask_riob33.db) * [`d94e4d13df16da498224f0e94deaa310fbf471b6f9ec0ec8b2308fe62fa2eeaf ./zynq7/ppips_bram_int_interface_l.db`](./zynq7/ppips_bram_int_interface_l.db) * [`b48d766ac6f9dd0e21280d3a04dd448ea39016143309c0c7867fc00d730a59ae ./zynq7/ppips_bram_int_interface_r.db`](./zynq7/ppips_bram_int_interface_r.db) * [`2c68f8b128aeb79197013c3a1774522143a3507a8fa595a98c22dba2553fd5ce ./zynq7/ppips_bram_l.db`](./zynq7/ppips_bram_l.db) @@ -686,12 +686,20 @@ Results have checksums; * [`bb75573609f56f082544644ecbb39125d023809340f7a30180cb9df823585009 ./zynq7/ppips_clbll_r.db`](./zynq7/ppips_clbll_r.db) * [`a5357b0c018ac9c8c1f8cccf3c36b69f66ffd0e29039dfadb5a829caafd71a73 ./zynq7/ppips_clblm_l.db`](./zynq7/ppips_clblm_l.db) * [`15424ecbd5816143def2dcb20fc9cfae5ec4e11a1a5cfc1848e71b2904a1a713 ./zynq7/ppips_clblm_r.db`](./zynq7/ppips_clblm_r.db) + * [`77fba62caedba6632e55834bbc40ff797181d8825e2f4d55987a04a38a95a6c0 ./zynq7/ppips_clk_bufg_bot_r.db`](./zynq7/ppips_clk_bufg_bot_r.db) + * [`15dba278ba801744b1ed558220334899fc098acd8e8aff20ab9761249a70e839 ./zynq7/ppips_clk_bufg_top_r.db`](./zynq7/ppips_clk_bufg_top_r.db) + * [`0dbef414182c3ef9054f4b9bc15c41c435d4bef2db30850add728d3de93749b8 ./zynq7/ppips_clk_hrow_bot_r.db`](./zynq7/ppips_clk_hrow_bot_r.db) + * [`8774624d8398b6000e80cefbcf5a5bac095e1c8650772c23f9b73448e0df5dbb ./zynq7/ppips_clk_hrow_top_r.db`](./zynq7/ppips_clk_hrow_top_r.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/ppips_dsp_l.db`](./zynq7/ppips_dsp_l.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/ppips_dsp_r.db`](./zynq7/ppips_dsp_r.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/ppips_hclk_l.db`](./zynq7/ppips_hclk_l.db) * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/ppips_hclk_r.db`](./zynq7/ppips_hclk_r.db) * [`d300ad4128a192e416a958471013b7554f141fd1f816715828b1e5a87838f18d ./zynq7/ppips_int_l.db`](./zynq7/ppips_int_l.db) * [`46564e746b8d9e37bf46a68f2915bd1395efb68508d48d336a4dfb9342105285 ./zynq7/ppips_int_r.db`](./zynq7/ppips_int_r.db) + * [`01526db954ab19098931424b8203c98803894b5563b5272fad665f3a75f0bb3b ./zynq7/ppips_io_int_interface_r.db`](./zynq7/ppips_io_int_interface_r.db) + * [`df11ac1c71eefa9c06abe06bc932d36368977543fba9666ee1b36e8417cd9f78 ./zynq7/ppips_rioi3.db`](./zynq7/ppips_rioi3.db) + * [`0c6263c13669085c09a61f25d68786d8f6c9b12b162fe2cd6c9a50114106f739 ./zynq7/ppips_rioi3_sing.db`](./zynq7/ppips_rioi3_sing.db) + * [`76c5978b345f11a9e46733a98875a6c419b75cf863a0e42d05e9ac94f9795bfc ./zynq7/ppips_rioi3_tbytesrc.db`](./zynq7/ppips_rioi3_tbytesrc.db) * [`8a2136e564ac92c06b226ef8715a122050fcabbb063f69eeaf46cfee5c89670f ./zynq7/segbits_bram_l.block_ram.db`](./zynq7/segbits_bram_l.block_ram.db) * [`53d975bf59b763b9f764106db362ee7f6a753e9e72a5e2be334041658a5ea4ba ./zynq7/segbits_bram_l.db`](./zynq7/segbits_bram_l.db) * [`a635577b55878c69df492c16b67a1dfbd1d4b786a695abe3e95a62d9540ecea5 ./zynq7/segbits_bram_r.block_ram.db`](./zynq7/segbits_bram_r.block_ram.db) @@ -705,12 +713,12 @@ Results have checksums; * [`0124518f026fd29ff7d48e9fe12fd9c5b189e8ca9e1257dc9decb714ee45c27b ./zynq7/segbits_clk_bufg_top_r.db`](./zynq7/segbits_clk_bufg_top_r.db) * [`baafdf449690428a45c1ecd6f7b774779cd7485438560f154f18d142663c1770 ./zynq7/segbits_clk_hrow_bot_r.db`](./zynq7/segbits_clk_hrow_bot_r.db) * [`4737c35514cc6acc472db3e06ffe048669a749199392a999dc65f2f0e779d8a3 ./zynq7/segbits_clk_hrow_top_r.db`](./zynq7/segbits_clk_hrow_top_r.db) - * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/segbits_dsp_l.db`](./zynq7/segbits_dsp_l.db) - * [`e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855 ./zynq7/segbits_dsp_r.db`](./zynq7/segbits_dsp_r.db) + * [`0c4a6e4bc385a8b3a43d05a06d8e87c8822cf2cc1742593167244ff194af4a5e ./zynq7/segbits_dsp_l.db`](./zynq7/segbits_dsp_l.db) + * [`b014d7e2b101b0b0540a539cb74a76ccbe3a494e225e8e510bf258a457b18685 ./zynq7/segbits_dsp_r.db`](./zynq7/segbits_dsp_r.db) * [`1c2c7229781a4a1d51bbbdeea76238b10497c043aaadf2a76de783041a201878 ./zynq7/segbits_hclk_l.db`](./zynq7/segbits_hclk_l.db) * [`51288ec0be63172fcb2a12a92853150c62a21e894c2d42a2586046c462bf57a9 ./zynq7/segbits_hclk_r.db`](./zynq7/segbits_hclk_r.db) - * [`0ea44e8dfaf97ed200f30b2afe117e94e1a68bdb26af2e09e69e855414779520 ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db) - * [`1541c7832dd161c5b3b5745d08fe0ee6f92bfbd372b76c12f54afc032c888556 ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db) + * [`39088cc92049e22e4d8a49aa0b7cc2ab468b9994a2e1d1c65388b3df6a0fc290 ./zynq7/segbits_int_l.db`](./zynq7/segbits_int_l.db) + * [`760f9291e1c4ff7c9d0e8a35e9047d4bb157ee9b99ccafbfa1329daa39de48b1 ./zynq7/segbits_int_r.db`](./zynq7/segbits_int_r.db) * [`bed06fc405947c72a47a7fbac7adbc220efd2dc8d73f321ed70b8d2490ab745b ./zynq7/segbits_liob33.db`](./zynq7/segbits_liob33.db) * [`8ec421f8f4ce1bab7e81bcbf0cbdc37fb3f6ed4715bc2fdf75db336805efc53e ./zynq7/segbits_riob33.db`](./zynq7/segbits_riob33.db) * [`ee26e7dbf78c2a37118c49ce7edb5fa44afd51850a24824ba8b68e34366f0787 ./zynq7/settings.sh`](./zynq7/settings.sh) diff --git a/zynq7/mask_dsp_l.db b/zynq7/mask_dsp_l.db index e69de29..ea47238 100644 --- a/zynq7/mask_dsp_l.db +++ b/zynq7/mask_dsp_l.db @@ -0,0 +1,414 @@ +bit 00_11 +bit 00_35 +bit 00_39 +bit 00_42 +bit 00_75 +bit 00_89 +bit 00_90 +bit 00_99 +bit 00_103 +bit 00_106 +bit 00_139 +bit 00_163 +bit 00_167 +bit 00_170 +bit 00_203 +bit 00_209 +bit 00_217 +bit 00_218 +bit 00_227 +bit 00_231 +bit 00_234 +bit 00_273 +bit 00_293 +bit 00_295 +bit 00_298 +bit 01_14 +bit 01_32 +bit 01_36 +bit 01_37 +bit 01_38 +bit 01_41 +bit 01_78 +bit 01_85 +bit 01_88 +bit 01_96 +bit 01_100 +bit 01_101 +bit 01_102 +bit 01_105 +bit 01_142 +bit 01_160 +bit 01_164 +bit 01_165 +bit 01_166 +bit 01_169 +bit 01_205 +bit 01_206 +bit 01_213 +bit 01_216 +bit 01_224 +bit 01_228 +bit 01_229 +bit 01_230 +bit 01_233 +bit 01_269 +bit 01_288 +bit 01_293 +bit 01_294 +bit 01_296 +bit 01_297 +bit 20_65 +bit 20_73 +bit 20_81 +bit 20_89 +bit 20_129 +bit 20_137 +bit 20_195 +bit 20_203 +bit 20_213 +bit 20_219 +bit 20_293 +bit 20_307 +bit 20_315 +bit 21_70 +bit 21_78 +bit 21_86 +bit 21_94 +bit 21_134 +bit 21_142 +bit 21_194 +bit 21_202 +bit 21_212 +bit 21_218 +bit 21_242 +bit 21_244 +bit 21_292 +bit 21_306 +bit 21_314 +bit 24_65 +bit 24_73 +bit 24_81 +bit 24_89 +bit 24_129 +bit 24_137 +bit 24_195 +bit 24_203 +bit 24_213 +bit 24_219 +bit 24_293 +bit 24_307 +bit 24_315 +bit 25_70 +bit 25_78 +bit 25_86 +bit 25_94 +bit 25_134 +bit 25_142 +bit 25_194 +bit 25_202 +bit 25_212 +bit 25_218 +bit 25_242 +bit 25_244 +bit 25_292 +bit 25_306 +bit 25_314 +bit 26_01 +bit 26_03 +bit 26_04 +bit 26_05 +bit 26_07 +bit 26_09 +bit 26_10 +bit 26_12 +bit 26_17 +bit 26_18 +bit 26_20 +bit 26_22 +bit 26_26 +bit 26_28 +bit 26_29 +bit 26_41 +bit 26_43 +bit 26_45 +bit 26_47 +bit 26_49 +bit 26_51 +bit 26_57 +bit 26_58 +bit 26_59 +bit 26_60 +bit 26_61 +bit 26_62 +bit 26_64 +bit 26_65 +bit 26_66 +bit 26_68 +bit 26_69 +bit 26_72 +bit 26_75 +bit 26_82 +bit 26_86 +bit 26_88 +bit 26_89 +bit 26_90 +bit 26_92 +bit 26_94 +bit 26_96 +bit 26_97 +bit 26_98 +bit 26_101 +bit 26_104 +bit 26_105 +bit 26_106 +bit 26_107 +bit 26_108 +bit 26_110 +bit 26_112 +bit 26_118 +bit 26_127 +bit 26_129 +bit 26_130 +bit 26_132 +bit 26_133 +bit 26_134 +bit 26_135 +bit 26_136 +bit 26_138 +bit 26_139 +bit 26_144 +bit 26_145 +bit 26_146 +bit 26_148 +bit 26_149 +bit 26_151 +bit 26_153 +bit 26_154 +bit 26_155 +bit 26_161 +bit 26_163 +bit 26_164 +bit 26_165 +bit 26_167 +bit 26_169 +bit 26_170 +bit 26_172 +bit 26_177 +bit 26_178 +bit 26_180 +bit 26_182 +bit 26_186 +bit 26_188 +bit 26_189 +bit 26_201 +bit 26_203 +bit 26_205 +bit 26_207 +bit 26_209 +bit 26_211 +bit 26_217 +bit 26_218 +bit 26_219 +bit 26_220 +bit 26_221 +bit 26_222 +bit 26_224 +bit 26_225 +bit 26_226 +bit 26_228 +bit 26_229 +bit 26_232 +bit 26_235 +bit 26_242 +bit 26_246 +bit 26_248 +bit 26_249 +bit 26_250 +bit 26_252 +bit 26_254 +bit 26_256 +bit 26_257 +bit 26_258 +bit 26_261 +bit 26_264 +bit 26_265 +bit 26_266 +bit 26_267 +bit 26_268 +bit 26_270 +bit 26_272 +bit 26_278 +bit 26_287 +bit 26_289 +bit 26_290 +bit 26_292 +bit 26_293 +bit 26_294 +bit 26_295 +bit 26_296 +bit 26_298 +bit 26_299 +bit 26_304 +bit 26_305 +bit 26_306 +bit 26_308 +bit 26_309 +bit 26_311 +bit 26_313 +bit 26_314 +bit 26_315 +bit 27_01 +bit 27_06 +bit 27_08 +bit 27_11 +bit 27_12 +bit 27_13 +bit 27_17 +bit 27_19 +bit 27_21 +bit 27_23 +bit 27_24 +bit 27_26 +bit 27_38 +bit 27_40 +bit 27_42 +bit 27_44 +bit 27_46 +bit 27_48 +bit 27_49 +bit 27_50 +bit 27_51 +bit 27_53 +bit 27_54 +bit 27_56 +bit 27_57 +bit 27_60 +bit 27_61 +bit 27_62 +bit 27_63 +bit 27_65 +bit 27_66 +bit 27_67 +bit 27_68 +bit 27_69 +bit 27_71 +bit 27_78 +bit 27_79 +bit 27_80 +bit 27_86 +bit 27_88 +bit 27_90 +bit 27_91 +bit 27_92 +bit 27_93 +bit 27_94 +bit 27_95 +bit 27_96 +bit 27_101 +bit 27_102 +bit 27_104 +bit 27_106 +bit 27_107 +bit 27_108 +bit 27_110 +bit 27_111 +bit 27_112 +bit 27_113 +bit 27_118 +bit 27_119 +bit 27_122 +bit 27_125 +bit 27_127 +bit 27_128 +bit 27_131 +bit 27_133 +bit 27_134 +bit 27_135 +bit 27_137 +bit 27_140 +bit 27_144 +bit 27_146 +bit 27_147 +bit 27_150 +bit 27_151 +bit 27_152 +bit 27_154 +bit 27_158 +bit 27_161 +bit 27_166 +bit 27_168 +bit 27_171 +bit 27_172 +bit 27_173 +bit 27_177 +bit 27_179 +bit 27_181 +bit 27_183 +bit 27_184 +bit 27_186 +bit 27_198 +bit 27_200 +bit 27_202 +bit 27_204 +bit 27_206 +bit 27_208 +bit 27_209 +bit 27_210 +bit 27_211 +bit 27_213 +bit 27_214 +bit 27_216 +bit 27_217 +bit 27_220 +bit 27_221 +bit 27_222 +bit 27_223 +bit 27_225 +bit 27_226 +bit 27_227 +bit 27_228 +bit 27_229 +bit 27_231 +bit 27_238 +bit 27_239 +bit 27_240 +bit 27_246 +bit 27_248 +bit 27_250 +bit 27_251 +bit 27_252 +bit 27_253 +bit 27_254 +bit 27_255 +bit 27_256 +bit 27_261 +bit 27_262 +bit 27_264 +bit 27_266 +bit 27_267 +bit 27_268 +bit 27_270 +bit 27_271 +bit 27_272 +bit 27_273 +bit 27_278 +bit 27_279 +bit 27_282 +bit 27_285 +bit 27_287 +bit 27_288 +bit 27_291 +bit 27_293 +bit 27_294 +bit 27_295 +bit 27_297 +bit 27_300 +bit 27_304 +bit 27_306 +bit 27_307 +bit 27_310 +bit 27_311 +bit 27_312 +bit 27_314 +bit 27_318 diff --git a/zynq7/mask_dsp_r.db b/zynq7/mask_dsp_r.db index e69de29..ea47238 100644 --- a/zynq7/mask_dsp_r.db +++ b/zynq7/mask_dsp_r.db @@ -0,0 +1,414 @@ +bit 00_11 +bit 00_35 +bit 00_39 +bit 00_42 +bit 00_75 +bit 00_89 +bit 00_90 +bit 00_99 +bit 00_103 +bit 00_106 +bit 00_139 +bit 00_163 +bit 00_167 +bit 00_170 +bit 00_203 +bit 00_209 +bit 00_217 +bit 00_218 +bit 00_227 +bit 00_231 +bit 00_234 +bit 00_273 +bit 00_293 +bit 00_295 +bit 00_298 +bit 01_14 +bit 01_32 +bit 01_36 +bit 01_37 +bit 01_38 +bit 01_41 +bit 01_78 +bit 01_85 +bit 01_88 +bit 01_96 +bit 01_100 +bit 01_101 +bit 01_102 +bit 01_105 +bit 01_142 +bit 01_160 +bit 01_164 +bit 01_165 +bit 01_166 +bit 01_169 +bit 01_205 +bit 01_206 +bit 01_213 +bit 01_216 +bit 01_224 +bit 01_228 +bit 01_229 +bit 01_230 +bit 01_233 +bit 01_269 +bit 01_288 +bit 01_293 +bit 01_294 +bit 01_296 +bit 01_297 +bit 20_65 +bit 20_73 +bit 20_81 +bit 20_89 +bit 20_129 +bit 20_137 +bit 20_195 +bit 20_203 +bit 20_213 +bit 20_219 +bit 20_293 +bit 20_307 +bit 20_315 +bit 21_70 +bit 21_78 +bit 21_86 +bit 21_94 +bit 21_134 +bit 21_142 +bit 21_194 +bit 21_202 +bit 21_212 +bit 21_218 +bit 21_242 +bit 21_244 +bit 21_292 +bit 21_306 +bit 21_314 +bit 24_65 +bit 24_73 +bit 24_81 +bit 24_89 +bit 24_129 +bit 24_137 +bit 24_195 +bit 24_203 +bit 24_213 +bit 24_219 +bit 24_293 +bit 24_307 +bit 24_315 +bit 25_70 +bit 25_78 +bit 25_86 +bit 25_94 +bit 25_134 +bit 25_142 +bit 25_194 +bit 25_202 +bit 25_212 +bit 25_218 +bit 25_242 +bit 25_244 +bit 25_292 +bit 25_306 +bit 25_314 +bit 26_01 +bit 26_03 +bit 26_04 +bit 26_05 +bit 26_07 +bit 26_09 +bit 26_10 +bit 26_12 +bit 26_17 +bit 26_18 +bit 26_20 +bit 26_22 +bit 26_26 +bit 26_28 +bit 26_29 +bit 26_41 +bit 26_43 +bit 26_45 +bit 26_47 +bit 26_49 +bit 26_51 +bit 26_57 +bit 26_58 +bit 26_59 +bit 26_60 +bit 26_61 +bit 26_62 +bit 26_64 +bit 26_65 +bit 26_66 +bit 26_68 +bit 26_69 +bit 26_72 +bit 26_75 +bit 26_82 +bit 26_86 +bit 26_88 +bit 26_89 +bit 26_90 +bit 26_92 +bit 26_94 +bit 26_96 +bit 26_97 +bit 26_98 +bit 26_101 +bit 26_104 +bit 26_105 +bit 26_106 +bit 26_107 +bit 26_108 +bit 26_110 +bit 26_112 +bit 26_118 +bit 26_127 +bit 26_129 +bit 26_130 +bit 26_132 +bit 26_133 +bit 26_134 +bit 26_135 +bit 26_136 +bit 26_138 +bit 26_139 +bit 26_144 +bit 26_145 +bit 26_146 +bit 26_148 +bit 26_149 +bit 26_151 +bit 26_153 +bit 26_154 +bit 26_155 +bit 26_161 +bit 26_163 +bit 26_164 +bit 26_165 +bit 26_167 +bit 26_169 +bit 26_170 +bit 26_172 +bit 26_177 +bit 26_178 +bit 26_180 +bit 26_182 +bit 26_186 +bit 26_188 +bit 26_189 +bit 26_201 +bit 26_203 +bit 26_205 +bit 26_207 +bit 26_209 +bit 26_211 +bit 26_217 +bit 26_218 +bit 26_219 +bit 26_220 +bit 26_221 +bit 26_222 +bit 26_224 +bit 26_225 +bit 26_226 +bit 26_228 +bit 26_229 +bit 26_232 +bit 26_235 +bit 26_242 +bit 26_246 +bit 26_248 +bit 26_249 +bit 26_250 +bit 26_252 +bit 26_254 +bit 26_256 +bit 26_257 +bit 26_258 +bit 26_261 +bit 26_264 +bit 26_265 +bit 26_266 +bit 26_267 +bit 26_268 +bit 26_270 +bit 26_272 +bit 26_278 +bit 26_287 +bit 26_289 +bit 26_290 +bit 26_292 +bit 26_293 +bit 26_294 +bit 26_295 +bit 26_296 +bit 26_298 +bit 26_299 +bit 26_304 +bit 26_305 +bit 26_306 +bit 26_308 +bit 26_309 +bit 26_311 +bit 26_313 +bit 26_314 +bit 26_315 +bit 27_01 +bit 27_06 +bit 27_08 +bit 27_11 +bit 27_12 +bit 27_13 +bit 27_17 +bit 27_19 +bit 27_21 +bit 27_23 +bit 27_24 +bit 27_26 +bit 27_38 +bit 27_40 +bit 27_42 +bit 27_44 +bit 27_46 +bit 27_48 +bit 27_49 +bit 27_50 +bit 27_51 +bit 27_53 +bit 27_54 +bit 27_56 +bit 27_57 +bit 27_60 +bit 27_61 +bit 27_62 +bit 27_63 +bit 27_65 +bit 27_66 +bit 27_67 +bit 27_68 +bit 27_69 +bit 27_71 +bit 27_78 +bit 27_79 +bit 27_80 +bit 27_86 +bit 27_88 +bit 27_90 +bit 27_91 +bit 27_92 +bit 27_93 +bit 27_94 +bit 27_95 +bit 27_96 +bit 27_101 +bit 27_102 +bit 27_104 +bit 27_106 +bit 27_107 +bit 27_108 +bit 27_110 +bit 27_111 +bit 27_112 +bit 27_113 +bit 27_118 +bit 27_119 +bit 27_122 +bit 27_125 +bit 27_127 +bit 27_128 +bit 27_131 +bit 27_133 +bit 27_134 +bit 27_135 +bit 27_137 +bit 27_140 +bit 27_144 +bit 27_146 +bit 27_147 +bit 27_150 +bit 27_151 +bit 27_152 +bit 27_154 +bit 27_158 +bit 27_161 +bit 27_166 +bit 27_168 +bit 27_171 +bit 27_172 +bit 27_173 +bit 27_177 +bit 27_179 +bit 27_181 +bit 27_183 +bit 27_184 +bit 27_186 +bit 27_198 +bit 27_200 +bit 27_202 +bit 27_204 +bit 27_206 +bit 27_208 +bit 27_209 +bit 27_210 +bit 27_211 +bit 27_213 +bit 27_214 +bit 27_216 +bit 27_217 +bit 27_220 +bit 27_221 +bit 27_222 +bit 27_223 +bit 27_225 +bit 27_226 +bit 27_227 +bit 27_228 +bit 27_229 +bit 27_231 +bit 27_238 +bit 27_239 +bit 27_240 +bit 27_246 +bit 27_248 +bit 27_250 +bit 27_251 +bit 27_252 +bit 27_253 +bit 27_254 +bit 27_255 +bit 27_256 +bit 27_261 +bit 27_262 +bit 27_264 +bit 27_266 +bit 27_267 +bit 27_268 +bit 27_270 +bit 27_271 +bit 27_272 +bit 27_273 +bit 27_278 +bit 27_279 +bit 27_282 +bit 27_285 +bit 27_287 +bit 27_288 +bit 27_291 +bit 27_293 +bit 27_294 +bit 27_295 +bit 27_297 +bit 27_300 +bit 27_304 +bit 27_306 +bit 27_307 +bit 27_310 +bit 27_311 +bit 27_312 +bit 27_314 +bit 27_318 diff --git a/zynq7/mask_liob33.db b/zynq7/mask_liob33.db index 7fd1091..5149416 100644 --- a/zynq7/mask_liob33.db +++ b/zynq7/mask_liob33.db @@ -1,4 +1,3 @@ -bit 00_01 bit 00_02 bit 00_03 bit 00_06 @@ -14,7 +13,6 @@ bit 00_35 bit 00_38 bit 00_39 bit 00_42 -bit 00_45 bit 00_46 bit 00_65 bit 00_67 @@ -47,7 +45,6 @@ bit 01_41 bit 01_45 bit 01_65 bit 01_70 -bit 01_72 bit 01_73 bit 01_74 bit 01_77 @@ -85,6 +82,7 @@ bit 02_59 bit 02_62 bit 02_63 bit 02_66 +bit 02_67 bit 02_69 bit 02_70 bit 02_71 @@ -103,9 +101,11 @@ bit 02_106 bit 02_110 bit 02_111 bit 02_118 +bit 02_125 bit 02_126 bit 02_127 bit 03_02 +bit 03_04 bit 03_05 bit 03_06 bit 03_10 @@ -117,17 +117,19 @@ bit 03_29 bit 03_44 bit 03_45 bit 03_53 +bit 03_60 bit 03_61 bit 03_62 bit 03_66 bit 03_69 bit 03_70 bit 03_74 +bit 03_76 bit 03_77 bit 03_78 bit 03_93 -bit 03_102 bit 03_110 +bit 03_116 bit 03_125 bit 03_126 bit 04_06 @@ -137,6 +139,7 @@ bit 04_12 bit 04_13 bit 04_14 bit 04_15 +bit 04_19 bit 04_28 bit 04_29 bit 04_30 @@ -148,13 +151,14 @@ bit 04_59 bit 04_60 bit 04_61 bit 04_63 -bit 04_71 +bit 04_70 bit 04_75 bit 04_76 bit 04_77 bit 04_78 bit 04_79 bit 04_83 +bit 04_87 bit 04_92 bit 04_93 bit 04_94 @@ -163,10 +167,12 @@ bit 04_108 bit 04_115 bit 04_119 bit 04_124 +bit 04_125 bit 04_127 bit 05_01 bit 05_02 bit 05_05 +bit 05_07 bit 05_10 bit 05_13 bit 05_17 @@ -185,18 +191,18 @@ bit 05_66 bit 05_68 bit 05_69 bit 05_70 -bit 05_73 bit 05_74 bit 05_76 bit 05_77 +bit 05_78 bit 05_81 bit 05_82 bit 05_86 -bit 05_102 bit 05_110 bit 05_113 bit 05_114 bit 05_117 +bit 05_119 bit 05_126 bit 06_01 bit 06_02 @@ -204,6 +210,7 @@ bit 06_03 bit 06_04 bit 06_05 bit 06_06 +bit 06_07 bit 06_10 bit 06_11 bit 06_12 @@ -213,9 +220,9 @@ bit 06_15 bit 06_17 bit 06_20 bit 06_22 +bit 06_23 bit 06_27 bit 06_28 -bit 06_29 bit 06_30 bit 06_31 bit 06_39 @@ -225,10 +232,14 @@ bit 06_45 bit 06_46 bit 06_49 bit 06_53 +bit 06_57 bit 06_59 bit 06_60 bit 06_61 +bit 06_63 +bit 06_65 bit 06_66 +bit 06_68 bit 06_70 bit 06_74 bit 06_75 @@ -237,19 +248,16 @@ bit 06_77 bit 06_78 bit 06_79 bit 06_86 -bit 06_87 bit 06_89 +bit 06_91 bit 06_92 bit 06_93 bit 06_94 -bit 06_95 bit 06_103 bit 06_107 -bit 06_113 bit 06_121 bit 06_123 bit 06_124 -bit 06_125 bit 07_00 bit 07_03 bit 07_04 @@ -268,13 +276,13 @@ bit 07_22 bit 07_23 bit 07_24 bit 07_27 +bit 07_28 bit 07_30 bit 07_31 bit 07_32 bit 07_36 bit 07_38 bit 07_40 -bit 07_42 bit 07_43 bit 07_46 bit 07_47 @@ -288,14 +296,12 @@ bit 07_59 bit 07_62 bit 07_63 bit 07_64 -bit 07_66 bit 07_67 bit 07_68 bit 07_69 bit 07_70 bit 07_71 bit 07_72 -bit 07_74 bit 07_75 bit 07_77 bit 07_78 @@ -308,18 +314,15 @@ bit 07_87 bit 07_88 bit 07_94 bit 07_95 -bit 07_96 bit 07_100 bit 07_102 bit 07_103 bit 07_104 -bit 07_106 bit 07_107 bit 07_110 bit 07_111 bit 07_112 bit 07_115 -bit 07_116 bit 07_118 bit 07_119 bit 07_120 @@ -375,7 +378,6 @@ bit 08_63 bit 08_64 bit 08_65 bit 08_66 -bit 08_69 bit 08_70 bit 08_71 bit 08_72 @@ -395,12 +397,10 @@ bit 08_88 bit 08_89 bit 08_90 bit 08_92 -bit 08_93 bit 08_94 bit 08_95 bit 08_96 bit 08_97 -bit 08_100 bit 08_101 bit 08_103 bit 08_104 @@ -417,6 +417,7 @@ bit 08_120 bit 08_121 bit 08_122 bit 08_123 +bit 08_125 bit 08_126 bit 08_127 bit 09_00 @@ -439,14 +440,15 @@ bit 09_20 bit 09_22 bit 09_23 bit 09_24 +bit 09_27 bit 09_34 bit 09_35 bit 09_36 bit 09_39 bit 09_40 bit 09_41 -bit 09_43 bit 09_47 +bit 09_49 bit 09_50 bit 09_51 bit 09_52 @@ -466,6 +468,7 @@ bit 09_75 bit 09_77 bit 09_79 bit 09_80 +bit 09_82 bit 09_83 bit 09_84 bit 09_91 @@ -478,15 +481,16 @@ bit 09_114 bit 09_115 bit 09_116 bit 09_120 +bit 09_121 bit 09_122 bit 09_123 -bit 09_127 bit 10_00 +bit 10_01 bit 10_02 bit 10_03 bit 10_05 -bit 10_06 bit 10_07 +bit 10_08 bit 10_09 bit 10_10 bit 10_11 @@ -505,7 +509,6 @@ bit 10_27 bit 10_28 bit 10_30 bit 10_31 -bit 10_33 bit 10_34 bit 10_37 bit 10_39 @@ -515,8 +518,8 @@ bit 10_43 bit 10_44 bit 10_46 bit 10_47 +bit 10_49 bit 10_50 -bit 10_52 bit 10_53 bit 10_55 bit 10_56 @@ -524,6 +527,7 @@ bit 10_57 bit 10_58 bit 10_59 bit 10_60 +bit 10_62 bit 10_63 bit 10_64 bit 10_65 @@ -539,7 +543,6 @@ bit 10_76 bit 10_78 bit 10_79 bit 10_80 -bit 10_81 bit 10_82 bit 10_83 bit 10_85 @@ -551,13 +554,11 @@ bit 10_91 bit 10_92 bit 10_94 bit 10_95 -bit 10_97 bit 10_98 bit 10_101 bit 10_103 bit 10_104 bit 10_105 -bit 10_106 bit 10_107 bit 10_110 bit 10_111 @@ -567,6 +568,7 @@ bit 10_117 bit 10_119 bit 10_120 bit 10_121 +bit 10_122 bit 10_127 bit 11_01 bit 11_02 @@ -582,7 +584,7 @@ bit 11_15 bit 11_17 bit 11_18 bit 11_19 -bit 11_21 +bit 11_20 bit 11_23 bit 11_24 bit 11_25 @@ -611,6 +613,7 @@ bit 11_63 bit 11_65 bit 11_66 bit 11_67 +bit 11_68 bit 11_69 bit 11_71 bit 11_73 @@ -620,7 +623,6 @@ bit 11_77 bit 11_79 bit 11_81 bit 11_82 -bit 11_83 bit 11_87 bit 11_90 bit 11_91 @@ -640,8 +642,8 @@ bit 11_119 bit 11_121 bit 11_122 bit 11_123 +bit 11_125 bit 11_127 -bit 12_00 bit 12_01 bit 12_02 bit 12_03 @@ -654,6 +656,7 @@ bit 12_11 bit 12_13 bit 12_14 bit 12_15 +bit 12_16 bit 12_17 bit 12_19 bit 12_21 @@ -665,7 +668,6 @@ bit 12_29 bit 12_30 bit 12_31 bit 12_33 -bit 12_34 bit 12_37 bit 12_39 bit 12_41 @@ -673,9 +675,9 @@ bit 12_42 bit 12_43 bit 12_46 bit 12_47 +bit 12_48 bit 12_49 bit 12_50 -bit 12_52 bit 12_53 bit 12_55 bit 12_57 @@ -688,6 +690,7 @@ bit 12_67 bit 12_69 bit 12_71 bit 12_73 +bit 12_74 bit 12_75 bit 12_77 bit 12_78 @@ -703,6 +706,7 @@ bit 12_91 bit 12_94 bit 12_95 bit 12_97 +bit 12_98 bit 12_101 bit 12_103 bit 12_105 @@ -715,6 +719,7 @@ bit 12_114 bit 12_115 bit 12_117 bit 12_119 +bit 12_120 bit 12_121 bit 12_122 bit 12_123 @@ -738,12 +743,13 @@ bit 13_16 bit 13_17 bit 13_18 bit 13_19 +bit 13_20 bit 13_22 bit 13_23 bit 13_24 bit 13_25 bit 13_26 -bit 13_28 +bit 13_29 bit 13_30 bit 13_31 bit 13_33 @@ -771,9 +777,7 @@ bit 13_63 bit 13_64 bit 13_65 bit 13_66 -bit 13_67 bit 13_68 -bit 13_69 bit 13_71 bit 13_72 bit 13_73 @@ -786,13 +790,12 @@ bit 13_79 bit 13_80 bit 13_81 bit 13_82 -bit 13_83 -bit 13_86 bit 13_87 bit 13_88 bit 13_89 bit 13_90 bit 13_92 +bit 13_93 bit 13_95 bit 13_97 bit 13_98 @@ -806,7 +809,6 @@ bit 13_106 bit 13_107 bit 13_110 bit 13_111 -bit 13_112 bit 13_113 bit 13_114 bit 13_116 @@ -814,14 +816,15 @@ bit 13_119 bit 13_120 bit 13_121 bit 13_122 -bit 13_124 -bit 13_126 +bit 13_123 +bit 13_125 bit 13_127 bit 14_00 +bit 14_01 bit 14_02 bit 14_03 bit 14_04 -bit 14_07 +bit 14_05 bit 14_09 bit 14_10 bit 14_11 @@ -833,7 +836,6 @@ bit 14_16 bit 14_18 bit 14_19 bit 14_20 -bit 14_23 bit 14_25 bit 14_26 bit 14_29 @@ -854,10 +856,10 @@ bit 14_69 bit 14_71 bit 14_73 bit 14_74 +bit 14_76 bit 14_77 bit 14_78 bit 14_79 -bit 14_80 bit 14_82 bit 14_83 bit 14_84 @@ -881,13 +883,12 @@ bit 15_02 bit 15_03 bit 15_04 bit 15_05 +bit 15_06 bit 15_07 bit 15_08 bit 15_09 bit 15_10 -bit 15_11 bit 15_12 -bit 15_13 bit 15_14 bit 15_15 bit 15_16 @@ -900,6 +901,7 @@ bit 15_25 bit 15_26 bit 15_27 bit 15_28 +bit 15_29 bit 15_30 bit 15_31 bit 15_33 @@ -916,6 +918,8 @@ bit 15_63 bit 15_64 bit 15_65 bit 15_66 +bit 15_67 +bit 15_68 bit 15_69 bit 15_71 bit 15_73 @@ -927,14 +931,12 @@ bit 15_78 bit 15_79 bit 15_80 bit 15_81 -bit 15_82 bit 15_85 bit 15_87 bit 15_89 bit 15_90 bit 15_91 bit 15_92 -bit 15_93 bit 15_94 bit 15_95 bit 15_97 @@ -944,10 +946,10 @@ bit 15_105 bit 15_107 bit 15_111 bit 15_113 -bit 15_117 bit 15_119 bit 15_121 bit 15_123 +bit 15_125 bit 15_127 bit 16_02 bit 16_06 @@ -989,6 +991,7 @@ bit 16_94 bit 16_95 bit 16_99 bit 16_102 +bit 16_103 bit 16_104 bit 16_106 bit 16_107 @@ -1003,6 +1006,7 @@ bit 16_121 bit 16_122 bit 16_124 bit 16_126 +bit 17_00 bit 17_02 bit 17_06 bit 17_07 @@ -1015,6 +1019,7 @@ bit 17_23 bit 17_24 bit 17_30 bit 17_31 +bit 17_32 bit 17_35 bit 17_38 bit 17_39 @@ -1033,18 +1038,18 @@ bit 17_57 bit 17_58 bit 17_60 bit 17_62 -bit 17_64 bit 17_66 bit 17_70 +bit 17_71 bit 17_73 bit 17_79 bit 17_80 bit 17_85 bit 17_86 bit 17_87 +bit 17_88 bit 17_94 bit 17_95 -bit 17_96 bit 17_99 bit 17_102 bit 17_103 @@ -1120,10 +1125,8 @@ bit 18_125 bit 18_127 bit 19_01 bit 19_03 -bit 19_06 bit 19_07 bit 19_08 -bit 19_09 bit 19_14 bit 19_17 bit 19_20 @@ -1143,6 +1146,7 @@ bit 19_46 bit 19_47 bit 19_49 bit 19_50 +bit 19_54 bit 19_55 bit 19_56 bit 19_57 @@ -1164,7 +1168,6 @@ bit 19_97 bit 19_98 bit 19_102 bit 19_103 -bit 19_105 bit 19_106 bit 19_107 bit 19_109 @@ -1174,6 +1177,7 @@ bit 19_113 bit 19_114 bit 19_119 bit 19_120 +bit 19_121 bit 19_123 bit 19_125 bit 19_127 @@ -1191,6 +1195,7 @@ bit 20_42 bit 20_43 bit 20_44 bit 20_46 +bit 20_48 bit 20_54 bit 20_55 bit 20_57 @@ -1262,12 +1267,15 @@ bit 21_122 bit 21_126 bit 22_02 bit 22_06 +bit 22_07 bit 22_09 +bit 22_15 bit 22_21 bit 22_22 bit 22_23 bit 22_30 bit 22_31 +bit 22_32 bit 22_35 bit 22_38 bit 22_40 @@ -1279,6 +1287,7 @@ bit 22_47 bit 22_48 bit 22_51 bit 22_54 +bit 22_55 bit 22_56 bit 22_57 bit 22_58 @@ -1286,7 +1295,6 @@ bit 22_60 bit 22_62 bit 22_66 bit 22_70 -bit 22_71 bit 22_73 bit 22_79 bit 22_85 @@ -1297,11 +1305,13 @@ bit 22_95 bit 22_96 bit 22_99 bit 22_102 +bit 22_103 bit 22_106 bit 22_107 bit 22_108 bit 22_110 bit 22_111 +bit 22_112 bit 22_115 bit 22_118 bit 22_121 @@ -1323,7 +1333,6 @@ bit 23_31 bit 23_32 bit 23_35 bit 23_38 -bit 23_39 bit 23_40 bit 23_42 bit 23_43 @@ -1441,7 +1450,6 @@ bit 25_00 bit 25_02 bit 25_06 bit 25_07 -bit 25_08 bit 25_09 bit 25_15 bit 25_16 @@ -1467,12 +1475,12 @@ bit 25_48 bit 25_51 bit 25_52 bit 25_54 +bit 25_55 bit 25_56 bit 25_57 bit 25_58 bit 25_60 bit 25_62 -bit 25_64 bit 25_66 bit 25_70 bit 25_71 diff --git a/zynq7/mask_riob33.db b/zynq7/mask_riob33.db index 7fd1091..5149416 100644 --- a/zynq7/mask_riob33.db +++ b/zynq7/mask_riob33.db @@ -1,4 +1,3 @@ -bit 00_01 bit 00_02 bit 00_03 bit 00_06 @@ -14,7 +13,6 @@ bit 00_35 bit 00_38 bit 00_39 bit 00_42 -bit 00_45 bit 00_46 bit 00_65 bit 00_67 @@ -47,7 +45,6 @@ bit 01_41 bit 01_45 bit 01_65 bit 01_70 -bit 01_72 bit 01_73 bit 01_74 bit 01_77 @@ -85,6 +82,7 @@ bit 02_59 bit 02_62 bit 02_63 bit 02_66 +bit 02_67 bit 02_69 bit 02_70 bit 02_71 @@ -103,9 +101,11 @@ bit 02_106 bit 02_110 bit 02_111 bit 02_118 +bit 02_125 bit 02_126 bit 02_127 bit 03_02 +bit 03_04 bit 03_05 bit 03_06 bit 03_10 @@ -117,17 +117,19 @@ bit 03_29 bit 03_44 bit 03_45 bit 03_53 +bit 03_60 bit 03_61 bit 03_62 bit 03_66 bit 03_69 bit 03_70 bit 03_74 +bit 03_76 bit 03_77 bit 03_78 bit 03_93 -bit 03_102 bit 03_110 +bit 03_116 bit 03_125 bit 03_126 bit 04_06 @@ -137,6 +139,7 @@ bit 04_12 bit 04_13 bit 04_14 bit 04_15 +bit 04_19 bit 04_28 bit 04_29 bit 04_30 @@ -148,13 +151,14 @@ bit 04_59 bit 04_60 bit 04_61 bit 04_63 -bit 04_71 +bit 04_70 bit 04_75 bit 04_76 bit 04_77 bit 04_78 bit 04_79 bit 04_83 +bit 04_87 bit 04_92 bit 04_93 bit 04_94 @@ -163,10 +167,12 @@ bit 04_108 bit 04_115 bit 04_119 bit 04_124 +bit 04_125 bit 04_127 bit 05_01 bit 05_02 bit 05_05 +bit 05_07 bit 05_10 bit 05_13 bit 05_17 @@ -185,18 +191,18 @@ bit 05_66 bit 05_68 bit 05_69 bit 05_70 -bit 05_73 bit 05_74 bit 05_76 bit 05_77 +bit 05_78 bit 05_81 bit 05_82 bit 05_86 -bit 05_102 bit 05_110 bit 05_113 bit 05_114 bit 05_117 +bit 05_119 bit 05_126 bit 06_01 bit 06_02 @@ -204,6 +210,7 @@ bit 06_03 bit 06_04 bit 06_05 bit 06_06 +bit 06_07 bit 06_10 bit 06_11 bit 06_12 @@ -213,9 +220,9 @@ bit 06_15 bit 06_17 bit 06_20 bit 06_22 +bit 06_23 bit 06_27 bit 06_28 -bit 06_29 bit 06_30 bit 06_31 bit 06_39 @@ -225,10 +232,14 @@ bit 06_45 bit 06_46 bit 06_49 bit 06_53 +bit 06_57 bit 06_59 bit 06_60 bit 06_61 +bit 06_63 +bit 06_65 bit 06_66 +bit 06_68 bit 06_70 bit 06_74 bit 06_75 @@ -237,19 +248,16 @@ bit 06_77 bit 06_78 bit 06_79 bit 06_86 -bit 06_87 bit 06_89 +bit 06_91 bit 06_92 bit 06_93 bit 06_94 -bit 06_95 bit 06_103 bit 06_107 -bit 06_113 bit 06_121 bit 06_123 bit 06_124 -bit 06_125 bit 07_00 bit 07_03 bit 07_04 @@ -268,13 +276,13 @@ bit 07_22 bit 07_23 bit 07_24 bit 07_27 +bit 07_28 bit 07_30 bit 07_31 bit 07_32 bit 07_36 bit 07_38 bit 07_40 -bit 07_42 bit 07_43 bit 07_46 bit 07_47 @@ -288,14 +296,12 @@ bit 07_59 bit 07_62 bit 07_63 bit 07_64 -bit 07_66 bit 07_67 bit 07_68 bit 07_69 bit 07_70 bit 07_71 bit 07_72 -bit 07_74 bit 07_75 bit 07_77 bit 07_78 @@ -308,18 +314,15 @@ bit 07_87 bit 07_88 bit 07_94 bit 07_95 -bit 07_96 bit 07_100 bit 07_102 bit 07_103 bit 07_104 -bit 07_106 bit 07_107 bit 07_110 bit 07_111 bit 07_112 bit 07_115 -bit 07_116 bit 07_118 bit 07_119 bit 07_120 @@ -375,7 +378,6 @@ bit 08_63 bit 08_64 bit 08_65 bit 08_66 -bit 08_69 bit 08_70 bit 08_71 bit 08_72 @@ -395,12 +397,10 @@ bit 08_88 bit 08_89 bit 08_90 bit 08_92 -bit 08_93 bit 08_94 bit 08_95 bit 08_96 bit 08_97 -bit 08_100 bit 08_101 bit 08_103 bit 08_104 @@ -417,6 +417,7 @@ bit 08_120 bit 08_121 bit 08_122 bit 08_123 +bit 08_125 bit 08_126 bit 08_127 bit 09_00 @@ -439,14 +440,15 @@ bit 09_20 bit 09_22 bit 09_23 bit 09_24 +bit 09_27 bit 09_34 bit 09_35 bit 09_36 bit 09_39 bit 09_40 bit 09_41 -bit 09_43 bit 09_47 +bit 09_49 bit 09_50 bit 09_51 bit 09_52 @@ -466,6 +468,7 @@ bit 09_75 bit 09_77 bit 09_79 bit 09_80 +bit 09_82 bit 09_83 bit 09_84 bit 09_91 @@ -478,15 +481,16 @@ bit 09_114 bit 09_115 bit 09_116 bit 09_120 +bit 09_121 bit 09_122 bit 09_123 -bit 09_127 bit 10_00 +bit 10_01 bit 10_02 bit 10_03 bit 10_05 -bit 10_06 bit 10_07 +bit 10_08 bit 10_09 bit 10_10 bit 10_11 @@ -505,7 +509,6 @@ bit 10_27 bit 10_28 bit 10_30 bit 10_31 -bit 10_33 bit 10_34 bit 10_37 bit 10_39 @@ -515,8 +518,8 @@ bit 10_43 bit 10_44 bit 10_46 bit 10_47 +bit 10_49 bit 10_50 -bit 10_52 bit 10_53 bit 10_55 bit 10_56 @@ -524,6 +527,7 @@ bit 10_57 bit 10_58 bit 10_59 bit 10_60 +bit 10_62 bit 10_63 bit 10_64 bit 10_65 @@ -539,7 +543,6 @@ bit 10_76 bit 10_78 bit 10_79 bit 10_80 -bit 10_81 bit 10_82 bit 10_83 bit 10_85 @@ -551,13 +554,11 @@ bit 10_91 bit 10_92 bit 10_94 bit 10_95 -bit 10_97 bit 10_98 bit 10_101 bit 10_103 bit 10_104 bit 10_105 -bit 10_106 bit 10_107 bit 10_110 bit 10_111 @@ -567,6 +568,7 @@ bit 10_117 bit 10_119 bit 10_120 bit 10_121 +bit 10_122 bit 10_127 bit 11_01 bit 11_02 @@ -582,7 +584,7 @@ bit 11_15 bit 11_17 bit 11_18 bit 11_19 -bit 11_21 +bit 11_20 bit 11_23 bit 11_24 bit 11_25 @@ -611,6 +613,7 @@ bit 11_63 bit 11_65 bit 11_66 bit 11_67 +bit 11_68 bit 11_69 bit 11_71 bit 11_73 @@ -620,7 +623,6 @@ bit 11_77 bit 11_79 bit 11_81 bit 11_82 -bit 11_83 bit 11_87 bit 11_90 bit 11_91 @@ -640,8 +642,8 @@ bit 11_119 bit 11_121 bit 11_122 bit 11_123 +bit 11_125 bit 11_127 -bit 12_00 bit 12_01 bit 12_02 bit 12_03 @@ -654,6 +656,7 @@ bit 12_11 bit 12_13 bit 12_14 bit 12_15 +bit 12_16 bit 12_17 bit 12_19 bit 12_21 @@ -665,7 +668,6 @@ bit 12_29 bit 12_30 bit 12_31 bit 12_33 -bit 12_34 bit 12_37 bit 12_39 bit 12_41 @@ -673,9 +675,9 @@ bit 12_42 bit 12_43 bit 12_46 bit 12_47 +bit 12_48 bit 12_49 bit 12_50 -bit 12_52 bit 12_53 bit 12_55 bit 12_57 @@ -688,6 +690,7 @@ bit 12_67 bit 12_69 bit 12_71 bit 12_73 +bit 12_74 bit 12_75 bit 12_77 bit 12_78 @@ -703,6 +706,7 @@ bit 12_91 bit 12_94 bit 12_95 bit 12_97 +bit 12_98 bit 12_101 bit 12_103 bit 12_105 @@ -715,6 +719,7 @@ bit 12_114 bit 12_115 bit 12_117 bit 12_119 +bit 12_120 bit 12_121 bit 12_122 bit 12_123 @@ -738,12 +743,13 @@ bit 13_16 bit 13_17 bit 13_18 bit 13_19 +bit 13_20 bit 13_22 bit 13_23 bit 13_24 bit 13_25 bit 13_26 -bit 13_28 +bit 13_29 bit 13_30 bit 13_31 bit 13_33 @@ -771,9 +777,7 @@ bit 13_63 bit 13_64 bit 13_65 bit 13_66 -bit 13_67 bit 13_68 -bit 13_69 bit 13_71 bit 13_72 bit 13_73 @@ -786,13 +790,12 @@ bit 13_79 bit 13_80 bit 13_81 bit 13_82 -bit 13_83 -bit 13_86 bit 13_87 bit 13_88 bit 13_89 bit 13_90 bit 13_92 +bit 13_93 bit 13_95 bit 13_97 bit 13_98 @@ -806,7 +809,6 @@ bit 13_106 bit 13_107 bit 13_110 bit 13_111 -bit 13_112 bit 13_113 bit 13_114 bit 13_116 @@ -814,14 +816,15 @@ bit 13_119 bit 13_120 bit 13_121 bit 13_122 -bit 13_124 -bit 13_126 +bit 13_123 +bit 13_125 bit 13_127 bit 14_00 +bit 14_01 bit 14_02 bit 14_03 bit 14_04 -bit 14_07 +bit 14_05 bit 14_09 bit 14_10 bit 14_11 @@ -833,7 +836,6 @@ bit 14_16 bit 14_18 bit 14_19 bit 14_20 -bit 14_23 bit 14_25 bit 14_26 bit 14_29 @@ -854,10 +856,10 @@ bit 14_69 bit 14_71 bit 14_73 bit 14_74 +bit 14_76 bit 14_77 bit 14_78 bit 14_79 -bit 14_80 bit 14_82 bit 14_83 bit 14_84 @@ -881,13 +883,12 @@ bit 15_02 bit 15_03 bit 15_04 bit 15_05 +bit 15_06 bit 15_07 bit 15_08 bit 15_09 bit 15_10 -bit 15_11 bit 15_12 -bit 15_13 bit 15_14 bit 15_15 bit 15_16 @@ -900,6 +901,7 @@ bit 15_25 bit 15_26 bit 15_27 bit 15_28 +bit 15_29 bit 15_30 bit 15_31 bit 15_33 @@ -916,6 +918,8 @@ bit 15_63 bit 15_64 bit 15_65 bit 15_66 +bit 15_67 +bit 15_68 bit 15_69 bit 15_71 bit 15_73 @@ -927,14 +931,12 @@ bit 15_78 bit 15_79 bit 15_80 bit 15_81 -bit 15_82 bit 15_85 bit 15_87 bit 15_89 bit 15_90 bit 15_91 bit 15_92 -bit 15_93 bit 15_94 bit 15_95 bit 15_97 @@ -944,10 +946,10 @@ bit 15_105 bit 15_107 bit 15_111 bit 15_113 -bit 15_117 bit 15_119 bit 15_121 bit 15_123 +bit 15_125 bit 15_127 bit 16_02 bit 16_06 @@ -989,6 +991,7 @@ bit 16_94 bit 16_95 bit 16_99 bit 16_102 +bit 16_103 bit 16_104 bit 16_106 bit 16_107 @@ -1003,6 +1006,7 @@ bit 16_121 bit 16_122 bit 16_124 bit 16_126 +bit 17_00 bit 17_02 bit 17_06 bit 17_07 @@ -1015,6 +1019,7 @@ bit 17_23 bit 17_24 bit 17_30 bit 17_31 +bit 17_32 bit 17_35 bit 17_38 bit 17_39 @@ -1033,18 +1038,18 @@ bit 17_57 bit 17_58 bit 17_60 bit 17_62 -bit 17_64 bit 17_66 bit 17_70 +bit 17_71 bit 17_73 bit 17_79 bit 17_80 bit 17_85 bit 17_86 bit 17_87 +bit 17_88 bit 17_94 bit 17_95 -bit 17_96 bit 17_99 bit 17_102 bit 17_103 @@ -1120,10 +1125,8 @@ bit 18_125 bit 18_127 bit 19_01 bit 19_03 -bit 19_06 bit 19_07 bit 19_08 -bit 19_09 bit 19_14 bit 19_17 bit 19_20 @@ -1143,6 +1146,7 @@ bit 19_46 bit 19_47 bit 19_49 bit 19_50 +bit 19_54 bit 19_55 bit 19_56 bit 19_57 @@ -1164,7 +1168,6 @@ bit 19_97 bit 19_98 bit 19_102 bit 19_103 -bit 19_105 bit 19_106 bit 19_107 bit 19_109 @@ -1174,6 +1177,7 @@ bit 19_113 bit 19_114 bit 19_119 bit 19_120 +bit 19_121 bit 19_123 bit 19_125 bit 19_127 @@ -1191,6 +1195,7 @@ bit 20_42 bit 20_43 bit 20_44 bit 20_46 +bit 20_48 bit 20_54 bit 20_55 bit 20_57 @@ -1262,12 +1267,15 @@ bit 21_122 bit 21_126 bit 22_02 bit 22_06 +bit 22_07 bit 22_09 +bit 22_15 bit 22_21 bit 22_22 bit 22_23 bit 22_30 bit 22_31 +bit 22_32 bit 22_35 bit 22_38 bit 22_40 @@ -1279,6 +1287,7 @@ bit 22_47 bit 22_48 bit 22_51 bit 22_54 +bit 22_55 bit 22_56 bit 22_57 bit 22_58 @@ -1286,7 +1295,6 @@ bit 22_60 bit 22_62 bit 22_66 bit 22_70 -bit 22_71 bit 22_73 bit 22_79 bit 22_85 @@ -1297,11 +1305,13 @@ bit 22_95 bit 22_96 bit 22_99 bit 22_102 +bit 22_103 bit 22_106 bit 22_107 bit 22_108 bit 22_110 bit 22_111 +bit 22_112 bit 22_115 bit 22_118 bit 22_121 @@ -1323,7 +1333,6 @@ bit 23_31 bit 23_32 bit 23_35 bit 23_38 -bit 23_39 bit 23_40 bit 23_42 bit 23_43 @@ -1441,7 +1450,6 @@ bit 25_00 bit 25_02 bit 25_06 bit 25_07 -bit 25_08 bit 25_09 bit 25_15 bit 25_16 @@ -1467,12 +1475,12 @@ bit 25_48 bit 25_51 bit 25_52 bit 25_54 +bit 25_55 bit 25_56 bit 25_57 bit 25_58 bit 25_60 bit 25_62 -bit 25_64 bit 25_66 bit 25_70 bit 25_71 diff --git a/zynq7/ppips_clk_bufg_bot_r.db b/zynq7/ppips_clk_bufg_bot_r.db new file mode 100644 index 0000000..a8d47f3 --- /dev/null +++ b/zynq7/ppips_clk_bufg_bot_r.db @@ -0,0 +1,128 @@ +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT0.CLK_BUFG_BUFGCTRL0_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT1.CLK_BUFG_BUFGCTRL1_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT2.CLK_BUFG_BUFGCTRL2_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT3.CLK_BUFG_BUFGCTRL3_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT4.CLK_BUFG_BUFGCTRL4_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT5.CLK_BUFG_BUFGCTRL5_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT6.CLK_BUFG_BUFGCTRL6_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT7.CLK_BUFG_BUFGCTRL7_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT8.CLK_BUFG_BUFGCTRL8_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT9.CLK_BUFG_BUFGCTRL9_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT10.CLK_BUFG_BUFGCTRL10_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT11.CLK_BUFG_BUFGCTRL11_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT12.CLK_BUFG_BUFGCTRL12_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT13.CLK_BUFG_BUFGCTRL13_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT14.CLK_BUFG_BUFGCTRL14_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_FBG_OUT15.CLK_BUFG_BUFGCTRL15_O always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL0_CE0.CLK_BUFG_IMUX20_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL0_CE1.CLK_BUFG_IMUX16_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL0_IGNORE0.CLK_BUFG_IMUX12_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL0_IGNORE1.CLK_BUFG_IMUX8_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL0_S0.CLK_BUFG_IMUX4_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL0_S1.CLK_BUFG_IMUX0_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL1_CE0.CLK_BUFG_IMUX21_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL1_CE1.CLK_BUFG_IMUX17_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL1_IGNORE0.CLK_BUFG_IMUX13_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL1_IGNORE1.CLK_BUFG_IMUX9_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL1_S0.CLK_BUFG_IMUX5_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL1_S1.CLK_BUFG_IMUX1_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL2_CE0.CLK_BUFG_IMUX22_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL2_CE1.CLK_BUFG_IMUX18_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL2_IGNORE0.CLK_BUFG_IMUX14_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL2_IGNORE1.CLK_BUFG_IMUX10_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL2_S0.CLK_BUFG_IMUX6_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL2_S1.CLK_BUFG_IMUX2_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL3_CE0.CLK_BUFG_IMUX23_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL3_CE1.CLK_BUFG_IMUX19_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL3_IGNORE0.CLK_BUFG_IMUX15_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL3_IGNORE1.CLK_BUFG_IMUX11_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL3_S0.CLK_BUFG_IMUX7_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL3_S1.CLK_BUFG_IMUX3_0 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL4_CE0.CLK_BUFG_IMUX20_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL4_CE1.CLK_BUFG_IMUX16_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL4_IGNORE0.CLK_BUFG_IMUX12_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL4_IGNORE1.CLK_BUFG_IMUX8_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL4_S0.CLK_BUFG_IMUX4_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL4_S1.CLK_BUFG_IMUX0_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL5_CE0.CLK_BUFG_IMUX21_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL5_CE1.CLK_BUFG_IMUX17_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL5_IGNORE0.CLK_BUFG_IMUX13_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL5_IGNORE1.CLK_BUFG_IMUX9_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL5_S0.CLK_BUFG_IMUX5_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL5_S1.CLK_BUFG_IMUX1_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL6_CE0.CLK_BUFG_IMUX22_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL6_CE1.CLK_BUFG_IMUX18_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL6_IGNORE0.CLK_BUFG_IMUX14_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL6_IGNORE1.CLK_BUFG_IMUX10_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL6_S0.CLK_BUFG_IMUX6_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL6_S1.CLK_BUFG_IMUX2_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL7_CE0.CLK_BUFG_IMUX23_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL7_CE1.CLK_BUFG_IMUX19_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL7_IGNORE0.CLK_BUFG_IMUX15_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL7_IGNORE1.CLK_BUFG_IMUX11_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL7_S0.CLK_BUFG_IMUX7_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL7_S1.CLK_BUFG_IMUX3_1 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL8_CE0.CLK_BUFG_IMUX20_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL8_CE1.CLK_BUFG_IMUX16_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL8_IGNORE0.CLK_BUFG_IMUX12_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL8_IGNORE1.CLK_BUFG_IMUX8_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL8_S0.CLK_BUFG_IMUX4_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL8_S1.CLK_BUFG_IMUX0_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL9_CE0.CLK_BUFG_IMUX21_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL9_CE1.CLK_BUFG_IMUX17_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL9_IGNORE0.CLK_BUFG_IMUX13_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL9_IGNORE1.CLK_BUFG_IMUX9_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL9_S0.CLK_BUFG_IMUX5_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL9_S1.CLK_BUFG_IMUX1_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL10_CE0.CLK_BUFG_IMUX22_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL10_CE1.CLK_BUFG_IMUX18_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL10_IGNORE0.CLK_BUFG_IMUX14_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL10_IGNORE1.CLK_BUFG_IMUX10_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL10_S0.CLK_BUFG_IMUX6_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL10_S1.CLK_BUFG_IMUX2_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL11_CE0.CLK_BUFG_IMUX23_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL11_CE1.CLK_BUFG_IMUX19_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL11_IGNORE0.CLK_BUFG_IMUX15_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL11_IGNORE1.CLK_BUFG_IMUX11_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL11_S0.CLK_BUFG_IMUX7_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL11_S1.CLK_BUFG_IMUX3_2 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL12_CE0.CLK_BUFG_IMUX20_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL12_CE1.CLK_BUFG_IMUX16_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL12_IGNORE0.CLK_BUFG_IMUX12_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL12_IGNORE1.CLK_BUFG_IMUX8_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL12_S0.CLK_BUFG_IMUX4_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL12_S1.CLK_BUFG_IMUX0_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL13_CE0.CLK_BUFG_IMUX21_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL13_CE1.CLK_BUFG_IMUX17_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL13_IGNORE0.CLK_BUFG_IMUX13_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL13_IGNORE1.CLK_BUFG_IMUX9_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL13_S0.CLK_BUFG_IMUX5_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL13_S1.CLK_BUFG_IMUX1_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL14_CE0.CLK_BUFG_IMUX22_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL14_CE1.CLK_BUFG_IMUX18_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL14_IGNORE0.CLK_BUFG_IMUX14_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL14_IGNORE1.CLK_BUFG_IMUX10_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL14_S0.CLK_BUFG_IMUX6_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL14_S1.CLK_BUFG_IMUX2_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL15_CE0.CLK_BUFG_IMUX23_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL15_CE1.CLK_BUFG_IMUX19_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL15_IGNORE0.CLK_BUFG_IMUX15_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL15_IGNORE1.CLK_BUFG_IMUX11_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL15_S0.CLK_BUFG_IMUX7_3 always +CLK_BUFG_BOT_R.CLK_BUFG_R_BUFGCTRL15_S1.CLK_BUFG_IMUX3_3 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL0_O.CLK_BUFG_BUFGCTRL0_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL1_O.CLK_BUFG_BUFGCTRL1_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL2_O.CLK_BUFG_BUFGCTRL2_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL3_O.CLK_BUFG_BUFGCTRL3_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL4_O.CLK_BUFG_BUFGCTRL4_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL5_O.CLK_BUFG_BUFGCTRL5_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL6_O.CLK_BUFG_BUFGCTRL6_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL7_O.CLK_BUFG_BUFGCTRL7_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL8_O.CLK_BUFG_BUFGCTRL8_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL9_O.CLK_BUFG_BUFGCTRL9_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL10_O.CLK_BUFG_BUFGCTRL10_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL11_O.CLK_BUFG_BUFGCTRL11_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL12_O.CLK_BUFG_BUFGCTRL12_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL13_O.CLK_BUFG_BUFGCTRL13_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL14_O.CLK_BUFG_BUFGCTRL14_I0 always +CLK_BUFG_BOT_R.CLK_BUFG_BUFGCTRL15_O.CLK_BUFG_BUFGCTRL15_I0 always diff --git a/zynq7/ppips_clk_bufg_top_r.db b/zynq7/ppips_clk_bufg_top_r.db new file mode 100644 index 0000000..7c066bc --- /dev/null +++ b/zynq7/ppips_clk_bufg_top_r.db @@ -0,0 +1,128 @@ +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT0.CLK_BUFG_BUFGCTRL0_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT1.CLK_BUFG_BUFGCTRL1_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT2.CLK_BUFG_BUFGCTRL2_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT3.CLK_BUFG_BUFGCTRL3_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT4.CLK_BUFG_BUFGCTRL4_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT5.CLK_BUFG_BUFGCTRL5_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT6.CLK_BUFG_BUFGCTRL6_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT7.CLK_BUFG_BUFGCTRL7_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT8.CLK_BUFG_BUFGCTRL8_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT9.CLK_BUFG_BUFGCTRL9_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT10.CLK_BUFG_BUFGCTRL10_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT11.CLK_BUFG_BUFGCTRL11_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT12.CLK_BUFG_BUFGCTRL12_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT13.CLK_BUFG_BUFGCTRL13_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT14.CLK_BUFG_BUFGCTRL14_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_FBG_OUT15.CLK_BUFG_BUFGCTRL15_O always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL0_CE0.CLK_BUFG_IMUX20_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL0_CE1.CLK_BUFG_IMUX16_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL0_IGNORE0.CLK_BUFG_IMUX12_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL0_IGNORE1.CLK_BUFG_IMUX8_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL0_S0.CLK_BUFG_IMUX4_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL0_S1.CLK_BUFG_IMUX0_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL1_CE0.CLK_BUFG_IMUX21_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL1_CE1.CLK_BUFG_IMUX17_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL1_IGNORE0.CLK_BUFG_IMUX13_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL1_IGNORE1.CLK_BUFG_IMUX9_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL1_S0.CLK_BUFG_IMUX5_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL1_S1.CLK_BUFG_IMUX1_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL2_CE0.CLK_BUFG_IMUX22_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL2_CE1.CLK_BUFG_IMUX18_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL2_IGNORE0.CLK_BUFG_IMUX14_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL2_IGNORE1.CLK_BUFG_IMUX10_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL2_S0.CLK_BUFG_IMUX6_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL2_S1.CLK_BUFG_IMUX2_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL3_CE0.CLK_BUFG_IMUX23_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL3_CE1.CLK_BUFG_IMUX19_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL3_IGNORE0.CLK_BUFG_IMUX15_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL3_IGNORE1.CLK_BUFG_IMUX11_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL3_S0.CLK_BUFG_IMUX7_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL3_S1.CLK_BUFG_IMUX3_0 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL4_CE0.CLK_BUFG_IMUX20_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL4_CE1.CLK_BUFG_IMUX16_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL4_IGNORE0.CLK_BUFG_IMUX12_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL4_IGNORE1.CLK_BUFG_IMUX8_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL4_S0.CLK_BUFG_IMUX4_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL4_S1.CLK_BUFG_IMUX0_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL5_CE0.CLK_BUFG_IMUX21_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL5_CE1.CLK_BUFG_IMUX17_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL5_IGNORE0.CLK_BUFG_IMUX13_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL5_IGNORE1.CLK_BUFG_IMUX9_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL5_S0.CLK_BUFG_IMUX5_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL5_S1.CLK_BUFG_IMUX1_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL6_CE0.CLK_BUFG_IMUX22_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL6_CE1.CLK_BUFG_IMUX18_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL6_IGNORE0.CLK_BUFG_IMUX14_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL6_IGNORE1.CLK_BUFG_IMUX10_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL6_S0.CLK_BUFG_IMUX6_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL6_S1.CLK_BUFG_IMUX2_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL7_CE0.CLK_BUFG_IMUX23_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL7_CE1.CLK_BUFG_IMUX19_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL7_IGNORE0.CLK_BUFG_IMUX15_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL7_IGNORE1.CLK_BUFG_IMUX11_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL7_S0.CLK_BUFG_IMUX7_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL7_S1.CLK_BUFG_IMUX3_1 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL8_CE0.CLK_BUFG_IMUX20_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL8_CE1.CLK_BUFG_IMUX16_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL8_IGNORE0.CLK_BUFG_IMUX12_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL8_IGNORE1.CLK_BUFG_IMUX8_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL8_S0.CLK_BUFG_IMUX4_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL8_S1.CLK_BUFG_IMUX0_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL9_CE0.CLK_BUFG_IMUX21_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL9_CE1.CLK_BUFG_IMUX17_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL9_IGNORE0.CLK_BUFG_IMUX13_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL9_IGNORE1.CLK_BUFG_IMUX9_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL9_S0.CLK_BUFG_IMUX5_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL9_S1.CLK_BUFG_IMUX1_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL10_CE0.CLK_BUFG_IMUX22_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL10_CE1.CLK_BUFG_IMUX18_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL10_IGNORE0.CLK_BUFG_IMUX14_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL10_IGNORE1.CLK_BUFG_IMUX10_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL10_S0.CLK_BUFG_IMUX6_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL10_S1.CLK_BUFG_IMUX2_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL11_CE0.CLK_BUFG_IMUX23_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL11_CE1.CLK_BUFG_IMUX19_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL11_IGNORE0.CLK_BUFG_IMUX15_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL11_IGNORE1.CLK_BUFG_IMUX11_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL11_S0.CLK_BUFG_IMUX7_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL11_S1.CLK_BUFG_IMUX3_2 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL12_CE0.CLK_BUFG_IMUX20_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL12_CE1.CLK_BUFG_IMUX16_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL12_IGNORE0.CLK_BUFG_IMUX12_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL12_IGNORE1.CLK_BUFG_IMUX8_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL12_S0.CLK_BUFG_IMUX4_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL12_S1.CLK_BUFG_IMUX0_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL13_CE0.CLK_BUFG_IMUX21_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL13_CE1.CLK_BUFG_IMUX17_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL13_IGNORE0.CLK_BUFG_IMUX13_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL13_IGNORE1.CLK_BUFG_IMUX9_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL13_S0.CLK_BUFG_IMUX5_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL13_S1.CLK_BUFG_IMUX1_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL14_CE0.CLK_BUFG_IMUX22_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL14_CE1.CLK_BUFG_IMUX18_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL14_IGNORE0.CLK_BUFG_IMUX14_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL14_IGNORE1.CLK_BUFG_IMUX10_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL14_S0.CLK_BUFG_IMUX6_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL14_S1.CLK_BUFG_IMUX2_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL15_CE0.CLK_BUFG_IMUX23_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL15_CE1.CLK_BUFG_IMUX19_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL15_IGNORE0.CLK_BUFG_IMUX15_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL15_IGNORE1.CLK_BUFG_IMUX11_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL15_S0.CLK_BUFG_IMUX7_3 always +CLK_BUFG_TOP_R.CLK_BUFG_R_BUFGCTRL15_S1.CLK_BUFG_IMUX3_3 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL0_O.CLK_BUFG_BUFGCTRL0_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL1_O.CLK_BUFG_BUFGCTRL1_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL2_O.CLK_BUFG_BUFGCTRL2_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL3_O.CLK_BUFG_BUFGCTRL3_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL4_O.CLK_BUFG_BUFGCTRL4_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL5_O.CLK_BUFG_BUFGCTRL5_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL6_O.CLK_BUFG_BUFGCTRL6_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL7_O.CLK_BUFG_BUFGCTRL7_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL8_O.CLK_BUFG_BUFGCTRL8_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL9_O.CLK_BUFG_BUFGCTRL9_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL10_O.CLK_BUFG_BUFGCTRL10_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL11_O.CLK_BUFG_BUFGCTRL11_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL12_O.CLK_BUFG_BUFGCTRL12_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL13_O.CLK_BUFG_BUFGCTRL13_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL14_O.CLK_BUFG_BUFGCTRL14_I0 always +CLK_BUFG_TOP_R.CLK_BUFG_BUFGCTRL15_O.CLK_BUFG_BUFGCTRL15_I0 always diff --git a/zynq7/ppips_clk_hrow_bot_r.db b/zynq7/ppips_clk_hrow_bot_r.db new file mode 100644 index 0000000..69adda8 --- /dev/null +++ b/zynq7/ppips_clk_hrow_bot_r.db @@ -0,0 +1,168 @@ +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L0.CLK_HROW_CE_INT_BOT6 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L1.CLK_HROW_CE_INT_BOT7 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L2.CLK_HROW_CE_INT_BOT8 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L3.CLK_HROW_CE_INT_BOT9 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L4.CLK_HROW_CE_INT_BOT10 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L5.CLK_HROW_CE_INT_BOT11 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L6.CLK_HROW_CE_INT_TOP0 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L7.CLK_HROW_CE_INT_TOP1 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L8.CLK_HROW_CE_INT_TOP2 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L9.CLK_HROW_CE_INT_TOP3 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L10.CLK_HROW_CE_INT_TOP4 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_L11.CLK_HROW_CE_INT_TOP5 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R0.CLK_HROW_CE_INT_BOT0 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R1.CLK_HROW_CE_INT_BOT1 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R2.CLK_HROW_CE_INT_BOT2 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R3.CLK_HROW_CE_INT_BOT3 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R4.CLK_HROW_CE_INT_BOT4 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R5.CLK_HROW_CE_INT_BOT5 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R6.CLK_HROW_CE_INT_TOP6 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R7.CLK_HROW_CE_INT_TOP7 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R8.CLK_HROW_CE_INT_TOP8 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R9.CLK_HROW_CE_INT_TOP9 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R10.CLK_HROW_CE_INT_TOP10 always +CLK_HROW_BOT_R.CLK_HROW_BUFHCE_CE_R11.CLK_HROW_CE_INT_TOP11 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT0.CLK_HROW_IMUX0_3 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT1.CLK_HROW_IMUX1_3 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT2.CLK_HROW_IMUX2_3 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT3.CLK_HROW_IMUX3_3 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT4.CLK_HROW_IMUX4_3 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT5.CLK_HROW_IMUX5_3 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT6.CLK_HROW_IMUX6_3 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT7.CLK_HROW_IMUX7_3 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT8.CLK_HROW_IMUX8_3 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT9.CLK_HROW_IMUX9_3 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT10.CLK_HROW_IMUX10_3 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_BOT11.CLK_HROW_IMUX11_3 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP0.CLK_HROW_IMUX0_4 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP1.CLK_HROW_IMUX1_4 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP2.CLK_HROW_IMUX2_4 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP3.CLK_HROW_IMUX3_4 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP4.CLK_HROW_IMUX4_4 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP5.CLK_HROW_IMUX5_4 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP6.CLK_HROW_IMUX6_4 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP7.CLK_HROW_IMUX7_4 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP8.CLK_HROW_IMUX8_4 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP9.CLK_HROW_IMUX9_4 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP10.CLK_HROW_IMUX10_4 always +CLK_HROW_BOT_R.CLK_HROW_CE_INT_TOP11.CLK_HROW_IMUX11_4 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L0.CLK_HROW_CK_HCLK_OUT_L0 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L1.CLK_HROW_CK_HCLK_OUT_L1 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L2.CLK_HROW_CK_HCLK_OUT_L2 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L3.CLK_HROW_CK_HCLK_OUT_L3 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L4.CLK_HROW_CK_HCLK_OUT_L4 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L5.CLK_HROW_CK_HCLK_OUT_L5 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L6.CLK_HROW_CK_HCLK_OUT_L6 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L7.CLK_HROW_CK_HCLK_OUT_L7 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L8.CLK_HROW_CK_HCLK_OUT_L8 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L9.CLK_HROW_CK_HCLK_OUT_L9 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L10.CLK_HROW_CK_HCLK_OUT_L10 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_L11.CLK_HROW_CK_HCLK_OUT_L11 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R0.CLK_HROW_CK_HCLK_OUT_R0 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R1.CLK_HROW_CK_HCLK_OUT_R1 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R2.CLK_HROW_CK_HCLK_OUT_R2 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R3.CLK_HROW_CK_HCLK_OUT_R3 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R4.CLK_HROW_CK_HCLK_OUT_R4 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R5.CLK_HROW_CK_HCLK_OUT_R5 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R6.CLK_HROW_CK_HCLK_OUT_R6 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R7.CLK_HROW_CK_HCLK_OUT_R7 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R8.CLK_HROW_CK_HCLK_OUT_R8 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R9.CLK_HROW_CK_HCLK_OUT_R9 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R10.CLK_HROW_CK_HCLK_OUT_R10 always +CLK_HROW_BOT_R.CLK_HROW_CK_BUFHCLK_R11.CLK_HROW_CK_HCLK_OUT_R11 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST0.CLK_HROW_CK_GCLK_TEST_OUT0 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST1.CLK_HROW_CK_GCLK_TEST_OUT1 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST2.CLK_HROW_CK_GCLK_TEST_OUT2 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST3.CLK_HROW_CK_GCLK_TEST_OUT3 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST4.CLK_HROW_CK_GCLK_TEST_OUT4 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST5.CLK_HROW_CK_GCLK_TEST_OUT5 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST6.CLK_HROW_CK_GCLK_TEST_OUT6 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST7.CLK_HROW_CK_GCLK_TEST_OUT7 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST8.CLK_HROW_CK_GCLK_TEST_OUT8 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST9.CLK_HROW_CK_GCLK_TEST_OUT9 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST10.CLK_HROW_CK_GCLK_TEST_OUT10 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST11.CLK_HROW_CK_GCLK_TEST_OUT11 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST12.CLK_HROW_CK_GCLK_TEST_OUT12 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST13.CLK_HROW_CK_GCLK_TEST_OUT13 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST14.CLK_HROW_CK_GCLK_TEST_OUT14 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST15.CLK_HROW_CK_GCLK_TEST_OUT15 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST16.CLK_HROW_CK_GCLK_TEST_OUT16 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST17.CLK_HROW_CK_GCLK_TEST_OUT17 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST18.CLK_HROW_CK_GCLK_TEST_OUT18 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST19.CLK_HROW_CK_GCLK_TEST_OUT19 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST20.CLK_HROW_CK_GCLK_TEST_OUT20 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST21.CLK_HROW_CK_GCLK_TEST_OUT21 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST22.CLK_HROW_CK_GCLK_TEST_OUT22 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST23.CLK_HROW_CK_GCLK_TEST_OUT23 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST24.CLK_HROW_CK_GCLK_TEST_OUT24 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST25.CLK_HROW_CK_GCLK_TEST_OUT25 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST26.CLK_HROW_CK_GCLK_TEST_OUT26 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST27.CLK_HROW_CK_GCLK_TEST_OUT27 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST28.CLK_HROW_CK_GCLK_TEST_OUT28 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST29.CLK_HROW_CK_GCLK_TEST_OUT29 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST30.CLK_HROW_CK_GCLK_TEST_OUT30 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_OUT_TEST31.CLK_HROW_CK_GCLK_TEST_OUT31 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN0.CLK_HROW_CK_GCLK_IN_TEST0 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN1.CLK_HROW_CK_GCLK_IN_TEST1 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN2.CLK_HROW_CK_GCLK_IN_TEST2 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN3.CLK_HROW_CK_GCLK_IN_TEST3 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN4.CLK_HROW_CK_GCLK_IN_TEST4 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN5.CLK_HROW_CK_GCLK_IN_TEST5 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN6.CLK_HROW_CK_GCLK_IN_TEST6 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN7.CLK_HROW_CK_GCLK_IN_TEST7 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN8.CLK_HROW_CK_GCLK_IN_TEST8 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN9.CLK_HROW_CK_GCLK_IN_TEST9 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN10.CLK_HROW_CK_GCLK_IN_TEST10 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN11.CLK_HROW_CK_GCLK_IN_TEST11 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN12.CLK_HROW_CK_GCLK_IN_TEST12 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN13.CLK_HROW_CK_GCLK_IN_TEST13 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN14.CLK_HROW_CK_GCLK_IN_TEST14 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN15.CLK_HROW_CK_GCLK_IN_TEST15 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN16.CLK_HROW_CK_GCLK_IN_TEST16 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN17.CLK_HROW_CK_GCLK_IN_TEST17 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN18.CLK_HROW_CK_GCLK_IN_TEST18 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN19.CLK_HROW_CK_GCLK_IN_TEST19 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN20.CLK_HROW_CK_GCLK_IN_TEST20 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN21.CLK_HROW_CK_GCLK_IN_TEST21 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN22.CLK_HROW_CK_GCLK_IN_TEST22 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN23.CLK_HROW_CK_GCLK_IN_TEST23 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN24.CLK_HROW_CK_GCLK_IN_TEST24 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN25.CLK_HROW_CK_GCLK_IN_TEST25 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN26.CLK_HROW_CK_GCLK_IN_TEST26 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN27.CLK_HROW_CK_GCLK_IN_TEST27 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN28.CLK_HROW_CK_GCLK_IN_TEST28 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN29.CLK_HROW_CK_GCLK_IN_TEST29 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN30.CLK_HROW_CK_GCLK_IN_TEST30 always +CLK_HROW_BOT_R.CLK_HROW_CK_GCLK_TEST_IN31.CLK_HROW_CK_GCLK_IN_TEST31 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L0.CLK_HROW_CK_MUX_OUT_L0 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L1.CLK_HROW_CK_MUX_OUT_L1 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L2.CLK_HROW_CK_MUX_OUT_L2 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L3.CLK_HROW_CK_MUX_OUT_L3 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L4.CLK_HROW_CK_MUX_OUT_L4 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L5.CLK_HROW_CK_MUX_OUT_L5 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L6.CLK_HROW_CK_MUX_OUT_L6 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L7.CLK_HROW_CK_MUX_OUT_L7 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L8.CLK_HROW_CK_MUX_OUT_L8 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L9.CLK_HROW_CK_MUX_OUT_L9 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L10.CLK_HROW_CK_MUX_OUT_L10 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_L11.CLK_HROW_CK_MUX_OUT_L11 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R0.CLK_HROW_CK_MUX_OUT_R0 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R1.CLK_HROW_CK_MUX_OUT_R1 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R2.CLK_HROW_CK_MUX_OUT_R2 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R3.CLK_HROW_CK_MUX_OUT_R3 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R4.CLK_HROW_CK_MUX_OUT_R4 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R5.CLK_HROW_CK_MUX_OUT_R5 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R6.CLK_HROW_CK_MUX_OUT_R6 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R7.CLK_HROW_CK_MUX_OUT_R7 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R8.CLK_HROW_CK_MUX_OUT_R8 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R9.CLK_HROW_CK_MUX_OUT_R9 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R10.CLK_HROW_CK_MUX_OUT_R10 always +CLK_HROW_BOT_R.CLK_HROW_CK_HCLK_OUT_R11.CLK_HROW_CK_MUX_OUT_R11 always +CLK_HROW_BOT_R.CLK_HROW_CK_IN_L_IN_TEST.CLK_HROW_CK_IN_L_TEST_IN always +CLK_HROW_BOT_R.CLK_HROW_CK_IN_L_TEST_OUT.CLK_HROW_CK_IN_L_OUT_TEST always +CLK_HROW_BOT_R.CLK_HROW_CK_IN_R_IN_TEST.CLK_HROW_CK_IN_R_TEST_IN always +CLK_HROW_BOT_R.CLK_HROW_CK_IN_R_TEST_OUT.CLK_HROW_CK_IN_R_OUT_TEST always +CLK_HROW_BOT_R.CLK_HROW_CK_INT_0_0.CLK_HROW_CLK0_3 always +CLK_HROW_BOT_R.CLK_HROW_CK_INT_0_1.CLK_HROW_CLK1_3 always +CLK_HROW_BOT_R.CLK_HROW_CK_INT_1_0.CLK_HROW_CLK0_4 always +CLK_HROW_BOT_R.CLK_HROW_CK_INT_1_1.CLK_HROW_CLK1_4 always diff --git a/zynq7/ppips_clk_hrow_top_r.db b/zynq7/ppips_clk_hrow_top_r.db new file mode 100644 index 0000000..cb7530c --- /dev/null +++ b/zynq7/ppips_clk_hrow_top_r.db @@ -0,0 +1,168 @@ +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L0.CLK_HROW_CE_INT_BOT6 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L1.CLK_HROW_CE_INT_BOT7 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L2.CLK_HROW_CE_INT_BOT8 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L3.CLK_HROW_CE_INT_BOT9 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L4.CLK_HROW_CE_INT_BOT10 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L5.CLK_HROW_CE_INT_BOT11 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L6.CLK_HROW_CE_INT_TOP0 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L7.CLK_HROW_CE_INT_TOP1 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L8.CLK_HROW_CE_INT_TOP2 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L9.CLK_HROW_CE_INT_TOP3 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L10.CLK_HROW_CE_INT_TOP4 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_L11.CLK_HROW_CE_INT_TOP5 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R0.CLK_HROW_CE_INT_BOT0 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R1.CLK_HROW_CE_INT_BOT1 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R2.CLK_HROW_CE_INT_BOT2 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R3.CLK_HROW_CE_INT_BOT3 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R4.CLK_HROW_CE_INT_BOT4 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R5.CLK_HROW_CE_INT_BOT5 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R6.CLK_HROW_CE_INT_TOP6 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R7.CLK_HROW_CE_INT_TOP7 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R8.CLK_HROW_CE_INT_TOP8 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R9.CLK_HROW_CE_INT_TOP9 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R10.CLK_HROW_CE_INT_TOP10 always +CLK_HROW_TOP_R.CLK_HROW_BUFHCE_CE_R11.CLK_HROW_CE_INT_TOP11 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT0.CLK_HROW_IMUX0_3 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT1.CLK_HROW_IMUX1_3 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT2.CLK_HROW_IMUX2_3 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT3.CLK_HROW_IMUX3_3 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT4.CLK_HROW_IMUX4_3 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT5.CLK_HROW_IMUX5_3 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT6.CLK_HROW_IMUX6_3 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT7.CLK_HROW_IMUX7_3 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT8.CLK_HROW_IMUX8_3 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT9.CLK_HROW_IMUX9_3 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT10.CLK_HROW_IMUX10_3 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_BOT11.CLK_HROW_IMUX11_3 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP0.CLK_HROW_IMUX0_4 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP1.CLK_HROW_IMUX1_4 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP2.CLK_HROW_IMUX2_4 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP3.CLK_HROW_IMUX3_4 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP4.CLK_HROW_IMUX4_4 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP5.CLK_HROW_IMUX5_4 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP6.CLK_HROW_IMUX6_4 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP7.CLK_HROW_IMUX7_4 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP8.CLK_HROW_IMUX8_4 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP9.CLK_HROW_IMUX9_4 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP10.CLK_HROW_IMUX10_4 always +CLK_HROW_TOP_R.CLK_HROW_CE_INT_TOP11.CLK_HROW_IMUX11_4 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L0.CLK_HROW_CK_HCLK_OUT_L0 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L1.CLK_HROW_CK_HCLK_OUT_L1 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L2.CLK_HROW_CK_HCLK_OUT_L2 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L3.CLK_HROW_CK_HCLK_OUT_L3 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L4.CLK_HROW_CK_HCLK_OUT_L4 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L5.CLK_HROW_CK_HCLK_OUT_L5 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L6.CLK_HROW_CK_HCLK_OUT_L6 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L7.CLK_HROW_CK_HCLK_OUT_L7 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L8.CLK_HROW_CK_HCLK_OUT_L8 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L9.CLK_HROW_CK_HCLK_OUT_L9 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L10.CLK_HROW_CK_HCLK_OUT_L10 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_L11.CLK_HROW_CK_HCLK_OUT_L11 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R0.CLK_HROW_CK_HCLK_OUT_R0 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R1.CLK_HROW_CK_HCLK_OUT_R1 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R2.CLK_HROW_CK_HCLK_OUT_R2 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R3.CLK_HROW_CK_HCLK_OUT_R3 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R4.CLK_HROW_CK_HCLK_OUT_R4 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R5.CLK_HROW_CK_HCLK_OUT_R5 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R6.CLK_HROW_CK_HCLK_OUT_R6 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R7.CLK_HROW_CK_HCLK_OUT_R7 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R8.CLK_HROW_CK_HCLK_OUT_R8 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R9.CLK_HROW_CK_HCLK_OUT_R9 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R10.CLK_HROW_CK_HCLK_OUT_R10 always +CLK_HROW_TOP_R.CLK_HROW_CK_BUFHCLK_R11.CLK_HROW_CK_HCLK_OUT_R11 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST0.CLK_HROW_CK_GCLK_TEST_OUT0 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST1.CLK_HROW_CK_GCLK_TEST_OUT1 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST2.CLK_HROW_CK_GCLK_TEST_OUT2 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST3.CLK_HROW_CK_GCLK_TEST_OUT3 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST4.CLK_HROW_CK_GCLK_TEST_OUT4 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST5.CLK_HROW_CK_GCLK_TEST_OUT5 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST6.CLK_HROW_CK_GCLK_TEST_OUT6 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST7.CLK_HROW_CK_GCLK_TEST_OUT7 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST8.CLK_HROW_CK_GCLK_TEST_OUT8 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST9.CLK_HROW_CK_GCLK_TEST_OUT9 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST10.CLK_HROW_CK_GCLK_TEST_OUT10 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST11.CLK_HROW_CK_GCLK_TEST_OUT11 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST12.CLK_HROW_CK_GCLK_TEST_OUT12 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST13.CLK_HROW_CK_GCLK_TEST_OUT13 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST14.CLK_HROW_CK_GCLK_TEST_OUT14 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST15.CLK_HROW_CK_GCLK_TEST_OUT15 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST16.CLK_HROW_CK_GCLK_TEST_OUT16 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST17.CLK_HROW_CK_GCLK_TEST_OUT17 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST18.CLK_HROW_CK_GCLK_TEST_OUT18 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST19.CLK_HROW_CK_GCLK_TEST_OUT19 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST20.CLK_HROW_CK_GCLK_TEST_OUT20 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST21.CLK_HROW_CK_GCLK_TEST_OUT21 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST22.CLK_HROW_CK_GCLK_TEST_OUT22 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST23.CLK_HROW_CK_GCLK_TEST_OUT23 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST24.CLK_HROW_CK_GCLK_TEST_OUT24 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST25.CLK_HROW_CK_GCLK_TEST_OUT25 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST26.CLK_HROW_CK_GCLK_TEST_OUT26 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST27.CLK_HROW_CK_GCLK_TEST_OUT27 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST28.CLK_HROW_CK_GCLK_TEST_OUT28 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST29.CLK_HROW_CK_GCLK_TEST_OUT29 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST30.CLK_HROW_CK_GCLK_TEST_OUT30 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_OUT_TEST31.CLK_HROW_CK_GCLK_TEST_OUT31 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN0.CLK_HROW_CK_GCLK_IN_TEST0 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN1.CLK_HROW_CK_GCLK_IN_TEST1 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN2.CLK_HROW_CK_GCLK_IN_TEST2 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN3.CLK_HROW_CK_GCLK_IN_TEST3 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN4.CLK_HROW_CK_GCLK_IN_TEST4 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN5.CLK_HROW_CK_GCLK_IN_TEST5 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN6.CLK_HROW_CK_GCLK_IN_TEST6 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN7.CLK_HROW_CK_GCLK_IN_TEST7 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN8.CLK_HROW_CK_GCLK_IN_TEST8 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN9.CLK_HROW_CK_GCLK_IN_TEST9 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN10.CLK_HROW_CK_GCLK_IN_TEST10 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN11.CLK_HROW_CK_GCLK_IN_TEST11 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN12.CLK_HROW_CK_GCLK_IN_TEST12 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN13.CLK_HROW_CK_GCLK_IN_TEST13 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN14.CLK_HROW_CK_GCLK_IN_TEST14 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN15.CLK_HROW_CK_GCLK_IN_TEST15 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN16.CLK_HROW_CK_GCLK_IN_TEST16 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN17.CLK_HROW_CK_GCLK_IN_TEST17 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN18.CLK_HROW_CK_GCLK_IN_TEST18 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN19.CLK_HROW_CK_GCLK_IN_TEST19 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN20.CLK_HROW_CK_GCLK_IN_TEST20 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN21.CLK_HROW_CK_GCLK_IN_TEST21 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN22.CLK_HROW_CK_GCLK_IN_TEST22 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN23.CLK_HROW_CK_GCLK_IN_TEST23 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN24.CLK_HROW_CK_GCLK_IN_TEST24 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN25.CLK_HROW_CK_GCLK_IN_TEST25 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN26.CLK_HROW_CK_GCLK_IN_TEST26 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN27.CLK_HROW_CK_GCLK_IN_TEST27 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN28.CLK_HROW_CK_GCLK_IN_TEST28 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN29.CLK_HROW_CK_GCLK_IN_TEST29 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN30.CLK_HROW_CK_GCLK_IN_TEST30 always +CLK_HROW_TOP_R.CLK_HROW_CK_GCLK_TEST_IN31.CLK_HROW_CK_GCLK_IN_TEST31 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L0.CLK_HROW_CK_MUX_OUT_L0 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L1.CLK_HROW_CK_MUX_OUT_L1 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L2.CLK_HROW_CK_MUX_OUT_L2 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L3.CLK_HROW_CK_MUX_OUT_L3 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L4.CLK_HROW_CK_MUX_OUT_L4 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L5.CLK_HROW_CK_MUX_OUT_L5 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L6.CLK_HROW_CK_MUX_OUT_L6 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L7.CLK_HROW_CK_MUX_OUT_L7 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L8.CLK_HROW_CK_MUX_OUT_L8 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L9.CLK_HROW_CK_MUX_OUT_L9 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L10.CLK_HROW_CK_MUX_OUT_L10 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_L11.CLK_HROW_CK_MUX_OUT_L11 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R0.CLK_HROW_CK_MUX_OUT_R0 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R1.CLK_HROW_CK_MUX_OUT_R1 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R2.CLK_HROW_CK_MUX_OUT_R2 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R3.CLK_HROW_CK_MUX_OUT_R3 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R4.CLK_HROW_CK_MUX_OUT_R4 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R5.CLK_HROW_CK_MUX_OUT_R5 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R6.CLK_HROW_CK_MUX_OUT_R6 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R7.CLK_HROW_CK_MUX_OUT_R7 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R8.CLK_HROW_CK_MUX_OUT_R8 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R9.CLK_HROW_CK_MUX_OUT_R9 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R10.CLK_HROW_CK_MUX_OUT_R10 always +CLK_HROW_TOP_R.CLK_HROW_CK_HCLK_OUT_R11.CLK_HROW_CK_MUX_OUT_R11 always +CLK_HROW_TOP_R.CLK_HROW_CK_IN_L_IN_TEST.CLK_HROW_CK_IN_L_TEST_IN always +CLK_HROW_TOP_R.CLK_HROW_CK_IN_L_TEST_OUT.CLK_HROW_CK_IN_L_OUT_TEST always +CLK_HROW_TOP_R.CLK_HROW_CK_IN_R_IN_TEST.CLK_HROW_CK_IN_R_TEST_IN always +CLK_HROW_TOP_R.CLK_HROW_CK_IN_R_TEST_OUT.CLK_HROW_CK_IN_R_OUT_TEST always +CLK_HROW_TOP_R.CLK_HROW_CK_INT_0_0.CLK_HROW_CLK0_3 always +CLK_HROW_TOP_R.CLK_HROW_CK_INT_0_1.CLK_HROW_CLK1_3 always +CLK_HROW_TOP_R.CLK_HROW_CK_INT_1_0.CLK_HROW_CLK0_4 always +CLK_HROW_TOP_R.CLK_HROW_CK_INT_1_1.CLK_HROW_CLK1_4 always diff --git a/zynq7/ppips_io_int_interface_r.db b/zynq7/ppips_io_int_interface_r.db new file mode 100644 index 0000000..3e9d23e --- /dev/null +++ b/zynq7/ppips_io_int_interface_r.db @@ -0,0 +1,24 @@ +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS0.INT_INTERFACE_LOGIC_OUTS_B0 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS1.INT_INTERFACE_LOGIC_OUTS_B1 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS2.INT_INTERFACE_LOGIC_OUTS_B2 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS3.INT_INTERFACE_LOGIC_OUTS_B3 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS4.INT_INTERFACE_LOGIC_OUTS_B4 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS5.INT_INTERFACE_LOGIC_OUTS_B5 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS6.INT_INTERFACE_LOGIC_OUTS_B6 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS7.INT_INTERFACE_LOGIC_OUTS_B7 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS8.INT_INTERFACE_LOGIC_OUTS_B8 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS9.INT_INTERFACE_LOGIC_OUTS_B9 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS10.INT_INTERFACE_LOGIC_OUTS_B10 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS11.INT_INTERFACE_LOGIC_OUTS_B11 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS12.INT_INTERFACE_LOGIC_OUTS_B12 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS13.INT_INTERFACE_LOGIC_OUTS_B13 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS14.INT_INTERFACE_LOGIC_OUTS_B14 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS15.INT_INTERFACE_LOGIC_OUTS_B15 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS16.INT_INTERFACE_LOGIC_OUTS_B16 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS17.INT_INTERFACE_LOGIC_OUTS_B17 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS18.INT_INTERFACE_LOGIC_OUTS_B18 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS19.INT_INTERFACE_LOGIC_OUTS_B19 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS20.INT_INTERFACE_LOGIC_OUTS_B20 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS21.INT_INTERFACE_LOGIC_OUTS_B21 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS22.INT_INTERFACE_LOGIC_OUTS_B22 always +IO_INT_INTERFACE_R.INT_INTERFACE_LOGIC_OUTS23.INT_INTERFACE_LOGIC_OUTS_B23 always diff --git a/zynq7/ppips_rioi3.db b/zynq7/ppips_rioi3.db new file mode 100644 index 0000000..d043498 --- /dev/null +++ b/zynq7/ppips_rioi3.db @@ -0,0 +1,165 @@ +RIOI3.IOI_IDELAYCTRL_RST.IOI_IMUX24_0 always +RIOI3.IOI_IMUX_RC2.IOI_BYP4_1 always +RIOI3.IOI_IMUX_RC3.IOI_BYP3_1 always +RIOI3.IOI_LOGIC_OUTS0_0.IOI_ILOGIC1_Q1 always +RIOI3.IOI_LOGIC_OUTS0_1.IOI_ILOGIC0_Q1 always +RIOI3.IOI_LOGIC_OUTS1_0.IOI_IDELAY1_CNTVALUEOUT1 always +RIOI3.IOI_LOGIC_OUTS1_1.IOI_IDELAY0_CNTVALUEOUT1 always +RIOI3.IOI_LOGIC_OUTS2_0.RIOI_OLOGIC1_TFB_LOCAL always +RIOI3.IOI_LOGIC_OUTS2_1.RIOI_OLOGIC0_TFB_LOCAL always +RIOI3.IOI_LOGIC_OUTS3_0.IOI_ILOGIC1_Q6 always +RIOI3.IOI_LOGIC_OUTS3_1.IOI_ILOGIC0_Q6 always +RIOI3.IOI_LOGIC_OUTS5_0.IOI_OLOGIC1_IOCLKGLITCH always +RIOI3.IOI_LOGIC_OUTS5_1.IOI_OLOGIC0_IOCLKGLITCH always +RIOI3.IOI_LOGIC_OUTS7_0.IOI_ILOGIC1_Q7 always +RIOI3.IOI_LOGIC_OUTS7_1.IOI_ILOGIC0_Q7 always +RIOI3.IOI_LOGIC_OUTS8_0.IOI_ILOGIC1_Q8 always +RIOI3.IOI_LOGIC_OUTS8_1.IOI_ILOGIC0_Q8 always +RIOI3.IOI_LOGIC_OUTS9_0.IOI_ILOGIC1_Q3 always +RIOI3.IOI_LOGIC_OUTS9_1.IOI_ILOGIC0_Q3 always +RIOI3.IOI_LOGIC_OUTS10_0.IOI_ILOGIC1_Q4 always +RIOI3.IOI_LOGIC_OUTS10_1.IOI_ILOGIC0_Q4 always +RIOI3.IOI_LOGIC_OUTS11_0.IOI_IDELAY1_CNTVALUEOUT4 always +RIOI3.IOI_LOGIC_OUTS11_1.IOI_IDELAY0_CNTVALUEOUT4 always +RIOI3.IOI_LOGIC_OUTS13_0.IOI_IDELAYCTRL_DNPULSEOUT always +RIOI3.IOI_LOGIC_OUTS13_1.IOI_IDELAYCTRL_OUTN1 always +RIOI3.IOI_LOGIC_OUTS14_0.IOI_ILOGIC1_Q5 always +RIOI3.IOI_LOGIC_OUTS14_1.IOI_ILOGIC0_Q5 always +RIOI3.IOI_LOGIC_OUTS15_0.IOI_IDELAY1_CNTVALUEOUT3 always +RIOI3.IOI_LOGIC_OUTS15_1.IOI_IDELAY0_CNTVALUEOUT3 always +RIOI3.IOI_LOGIC_OUTS16_0.IOI_IDELAYCTRL_UPPULSEOUT always +RIOI3.IOI_LOGIC_OUTS16_1.IOI_IDELAYCTRL_OUTN65 always +RIOI3.IOI_LOGIC_OUTS18_0.IOI_ILOGIC1_O always +RIOI3.IOI_LOGIC_OUTS18_1.IOI_ILOGIC0_O always +RIOI3.IOI_LOGIC_OUTS19_0.IOI_IDELAY1_CNTVALUEOUT2 always +RIOI3.IOI_LOGIC_OUTS19_1.IOI_IDELAY0_CNTVALUEOUT2 always +RIOI3.IOI_LOGIC_OUTS20_0.IOI_IDELAY1_CNTVALUEOUT0 always +RIOI3.IOI_LOGIC_OUTS20_1.IOI_IDELAY0_CNTVALUEOUT0 always +RIOI3.IOI_LOGIC_OUTS22_1.IOI_IDELAYCTRL_RDY always +RIOI3.IOI_LOGIC_OUTS23_0.IOI_ILOGIC1_Q2 always +RIOI3.IOI_LOGIC_OUTS23_1.IOI_ILOGIC0_Q2 always +RIOI3.IOI_RCLK_DIV_CE0.IOI_BYP3_1 always +RIOI3.IOI_RCLK_DIV_CE1.IOI_BYP4_1 always +RIOI3.IOI_RCLK_DIV_CE2_1.IOI_BYP4_1 always +RIOI3.IOI_RCLK_DIV_CE3_1.IOI_BYP3_1 always +RIOI3.IOI_RCLK_DIV_CLR0_1.IOI_BYP3_0 always +RIOI3.IOI_RCLK_DIV_CLR1_1.IOI_BYP4_0 always +RIOI3.IOI_RCLK_DIV_CLR2.IOI_BYP4_0 always +RIOI3.IOI_RCLK_DIV_CLR3.IOI_BYP3_0 always +RIOI3.IOI_IDELAY0_C.IOI_CLK1_1 always +RIOI3.IOI_IDELAY0_CE.IOI_IMUX32_1 always +RIOI3.IOI_IDELAY0_CINVCTRL.IOI_BYP6_1 always +RIOI3.IOI_IDELAY0_DATAIN.IOI_IMUX25_1 always +RIOI3.IOI_IDELAY0_INC.IOI_IMUX26_1 always +RIOI3.IOI_IDELAY0_LD.IOI_IMUX30_1 always +RIOI3.IOI_IDELAY0_LDPIPEEN.IOI_IMUX33_1 always +RIOI3.IOI_IDELAY0_REGRST.IOI_IMUX12_1 always +RIOI3.IOI_IDELAY0_CNTVALUEIN0.IOI_IMUX41_1 always +RIOI3.IOI_IDELAY0_CNTVALUEIN1.IOI_IMUX36_1 always +RIOI3.IOI_IDELAY0_CNTVALUEIN2.IOI_IMUX35_1 always +RIOI3.IOI_IDELAY0_CNTVALUEIN3.IOI_IMUX38_1 always +RIOI3.IOI_IDELAY0_CNTVALUEIN4.IOI_IMUX39_1 always +RIOI3.IOI_IDELAY1_C.IOI_CLK1_0 always +RIOI3.IOI_IDELAY1_CE.IOI_IMUX32_0 always +RIOI3.IOI_IDELAY1_CINVCTRL.IOI_BYP6_0 always +RIOI3.IOI_IDELAY1_DATAIN.IOI_IMUX25_0 always +RIOI3.IOI_IDELAY1_INC.IOI_IMUX26_0 always +RIOI3.IOI_IDELAY1_LD.IOI_IMUX30_0 always +RIOI3.IOI_IDELAY1_LDPIPEEN.IOI_IMUX33_0 always +RIOI3.IOI_IDELAY1_REGRST.IOI_IMUX12_0 always +RIOI3.IOI_IDELAY1_CNTVALUEIN0.IOI_IMUX41_0 always +RIOI3.IOI_IDELAY1_CNTVALUEIN1.IOI_IMUX36_0 always +RIOI3.IOI_IDELAY1_CNTVALUEIN2.IOI_IMUX35_0 always +RIOI3.IOI_IDELAY1_CNTVALUEIN3.IOI_IMUX38_0 always +RIOI3.IOI_IDELAY1_CNTVALUEIN4.IOI_IMUX39_0 always +RIOI3.IOI_ILOGIC0_BITSLIP.IOI_IMUX0_1 always +RIOI3.IOI_ILOGIC0_CLKDIV.IOI_CLK0_1 always +RIOI3.IOI_ILOGIC0_DYNCLKDIVPSEL.IOI_IMUX10_1 always +RIOI3.IOI_ILOGIC0_DYNCLKDIVSEL.IOI_IMUX4_1 always +RIOI3.IOI_ILOGIC0_DYNCLKSEL.IOI_IMUX37_1 always +RIOI3.IOI_ILOGIC0_OCLK.IOI_OCLK_0 always +RIOI3.IOI_ILOGIC0_SR.IOI_CTRL1_1 always +RIOI3.IOI_ILOGIC0_CE1.IOI_IMUX5_1 always +RIOI3.IOI_ILOGIC0_CE2.IOI_IMUX14_1 always +RIOI3.IOI_ILOGIC1_BITSLIP.IOI_IMUX0_0 always +RIOI3.IOI_ILOGIC1_CLKDIV.IOI_CLK0_0 always +RIOI3.IOI_ILOGIC1_DYNCLKDIVPSEL.IOI_IMUX10_0 always +RIOI3.IOI_ILOGIC1_DYNCLKDIVSEL.IOI_IMUX4_0 always +RIOI3.IOI_ILOGIC1_DYNCLKSEL.IOI_IMUX37_0 always +RIOI3.IOI_ILOGIC1_OCLK.IOI_OCLK_1 always +RIOI3.IOI_ILOGIC1_SR.IOI_CTRL1_0 always +RIOI3.IOI_ILOGIC1_CE1.IOI_IMUX5_0 always +RIOI3.IOI_ILOGIC1_CE2.IOI_IMUX14_0 always +RIOI3.IOI_OLOGIC0_CLK.IOI_OCLK_0 always +RIOI3.IOI_OLOGIC0_OCE.IOI_IMUX29_1 always +RIOI3.IOI_OLOGIC0_SR.IOI_CTRL0_1 always +RIOI3.IOI_OLOGIC0_TBYTEIN.IOI_TBYTEIN always +RIOI3.IOI_OLOGIC0_TCE.IOI_IMUX1_1 always +RIOI3.IOI_OLOGIC0_D1.IOI_IMUX34_1 always +RIOI3.IOI_OLOGIC0_D2.IOI_IMUX40_1 always +RIOI3.IOI_OLOGIC0_D3.IOI_IMUX44_1 always +RIOI3.IOI_OLOGIC0_D4.IOI_IMUX42_1 always +RIOI3.IOI_OLOGIC0_D5.IOI_IMUX43_1 always +RIOI3.IOI_OLOGIC0_D6.IOI_IMUX45_1 always +RIOI3.IOI_OLOGIC0_D7.IOI_IMUX46_1 always +RIOI3.IOI_OLOGIC0_D8.IOI_IMUX47_1 always +RIOI3.IOI_OLOGIC0_T1.IOI_IMUX15_1 always +RIOI3.IOI_OLOGIC0_T2.IOI_IMUX7_1 always +RIOI3.IOI_OLOGIC0_T3.IOI_IMUX13_1 always +RIOI3.IOI_OLOGIC0_T4.IOI_IMUX21_1 always +RIOI3.IOI_OLOGIC1_CLK.IOI_OCLK_1 always +RIOI3.IOI_OLOGIC1_OCE.IOI_IMUX29_0 always +RIOI3.IOI_OLOGIC1_SR.IOI_CTRL0_0 always +RIOI3.IOI_OLOGIC1_TBYTEIN.IOI_TBYTEIN always +RIOI3.IOI_OLOGIC1_TCE.IOI_IMUX1_0 always +RIOI3.IOI_OLOGIC1_D1.IOI_IMUX34_0 always +RIOI3.IOI_OLOGIC1_D2.IOI_IMUX40_0 always +RIOI3.IOI_OLOGIC1_D3.IOI_IMUX44_0 always +RIOI3.IOI_OLOGIC1_D4.IOI_IMUX42_0 always +RIOI3.IOI_OLOGIC1_D5.IOI_IMUX43_0 always +RIOI3.IOI_OLOGIC1_D6.IOI_IMUX45_0 always +RIOI3.IOI_OLOGIC1_D7.IOI_IMUX46_0 always +RIOI3.IOI_OLOGIC1_D8.IOI_IMUX47_0 always +RIOI3.IOI_OLOGIC1_T1.IOI_IMUX15_0 always +RIOI3.IOI_OLOGIC1_T2.IOI_IMUX7_0 always +RIOI3.IOI_OLOGIC1_T3.IOI_IMUX13_0 always +RIOI3.IOI_OLOGIC1_T4.IOI_IMUX21_0 always +RIOI3.RIOI_DCI_T_TERM0.IOI_IMUX6_1 always +RIOI3.RIOI_DCI_T_TERM1.IOI_IMUX6_0 always +RIOI3.RIOI_I2GCLK_TOP0.IOI_ILOGIC0_O always +RIOI3.RIOI_IBUF_DISABLE0.IOI_IMUX9_1 always +RIOI3.RIOI_IBUF_DISABLE1.IOI_IMUX9_0 always +RIOI3.RIOI_I0.RIOI_IBUF0 always +RIOI3.RIOI_I1.RIOI_IBUF1 always +RIOI3.RIOI_IDELAY0_DATAOUT.RIOI_IDELAY0_IDATAIN always +RIOI3.RIOI_IDELAY0_IDATAIN.RIOI_I0 always +RIOI3.RIOI_IDELAY1_DATAOUT.RIOI_IDELAY1_IDATAIN always +RIOI3.RIOI_IDELAY1_IDATAIN.RIOI_I1 always +RIOI3.RIOI_ILOGIC0_D.RIOI_I0 always +RIOI3.RIOI_ILOGIC0_DDLY.RIOI_IDELAY0_DATAOUT always +RIOI3.RIOI_ILOGIC0_OFB.RIOI_OLOGIC0_OFB always +RIOI3.RIOI_ILOGIC0_TFB.RIOI_OLOGIC0_TFB_LOCAL always +RIOI3.RIOI_ILOGIC1_D.RIOI_I1 always +RIOI3.RIOI_ILOGIC1_DDLY.RIOI_IDELAY1_DATAOUT always +RIOI3.RIOI_ILOGIC1_OFB.RIOI_OLOGIC1_OFB always +RIOI3.RIOI_ILOGIC1_TFB.RIOI_OLOGIC1_TFB_LOCAL always +RIOI3.RIOI_ISIN11.RIOI_ISOUT10 always +RIOI3.RIOI_ISIN21.RIOI_ISOUT20 always +RIOI3.RIOI_O0.RIOI_OLOGIC0_OQ always +RIOI3.RIOI_O1.RIOI_OLOGIC1_OQ always +RIOI3.RIOI_OLOGIC0_OQ.IOI_OLOGIC0_D1 always +RIOI3.RIOI_OLOGIC0_TFB_LOCAL.RIOI_OLOGIC0_TFB always +RIOI3.RIOI_OLOGIC0_TQ.IOI_OLOGIC0_T1 always +RIOI3.RIOI_OLOGIC1_OQ.IOI_OLOGIC1_D1 always +RIOI3.RIOI_OLOGIC1_TFB_LOCAL.RIOI_OLOGIC1_TFB always +RIOI3.RIOI_OLOGIC1_TQ.IOI_OLOGIC1_T1 always +RIOI3.RIOI_OSIN10.RIOI_OSOUT11 always +RIOI3.RIOI_OSIN20.RIOI_OSOUT21 always +RIOI3.RIOI_T0.RIOI_OLOGIC0_TQ always +RIOI3.RIOI_T1.RIOI_OLOGIC1_TQ always +RIOI3.RIOI3_IDELAY0_IFDLY0.IOI_FAN4_1 always +RIOI3.RIOI3_IDELAY0_IFDLY1.IOI_FAN5_1 always +RIOI3.RIOI3_IDELAY0_IFDLY2.IOI_BYP7_1 always +RIOI3.RIOI3_IDELAY1_IFDLY0.IOI_FAN4_0 always +RIOI3.RIOI3_IDELAY1_IFDLY1.IOI_FAN5_0 always +RIOI3.RIOI3_IDELAY1_IFDLY2.IOI_BYP7_0 always diff --git a/zynq7/ppips_rioi3_sing.db b/zynq7/ppips_rioi3_sing.db new file mode 100644 index 0000000..930e0ab --- /dev/null +++ b/zynq7/ppips_rioi3_sing.db @@ -0,0 +1,72 @@ +RIOI3_SING.IOI_LOGIC_OUTS0_0.IOI_ILOGIC0_Q1 always +RIOI3_SING.IOI_LOGIC_OUTS1_0.IOI_IDELAY0_CNTVALUEOUT1 always +RIOI3_SING.IOI_LOGIC_OUTS2_0.RIOI_OLOGIC0_TFB_LOCAL always +RIOI3_SING.IOI_LOGIC_OUTS3_0.IOI_ILOGIC0_Q6 always +RIOI3_SING.IOI_LOGIC_OUTS5_0.IOI_OLOGIC0_IOCLKGLITCH always +RIOI3_SING.IOI_LOGIC_OUTS7_0.IOI_ILOGIC0_Q7 always +RIOI3_SING.IOI_LOGIC_OUTS8_0.IOI_ILOGIC0_Q8 always +RIOI3_SING.IOI_LOGIC_OUTS9_0.IOI_ILOGIC0_Q3 always +RIOI3_SING.IOI_LOGIC_OUTS10_0.IOI_ILOGIC0_Q4 always +RIOI3_SING.IOI_LOGIC_OUTS11_0.IOI_IDELAY0_CNTVALUEOUT4 always +RIOI3_SING.IOI_LOGIC_OUTS14_0.IOI_ILOGIC0_Q5 always +RIOI3_SING.IOI_LOGIC_OUTS15_0.IOI_IDELAY0_CNTVALUEOUT3 always +RIOI3_SING.IOI_LOGIC_OUTS18_0.IOI_ILOGIC0_O always +RIOI3_SING.IOI_LOGIC_OUTS19_0.IOI_IDELAY0_CNTVALUEOUT2 always +RIOI3_SING.IOI_LOGIC_OUTS20_0.IOI_IDELAY0_CNTVALUEOUT0 always +RIOI3_SING.IOI_LOGIC_OUTS23_0.IOI_ILOGIC0_Q2 always +RIOI3_SING.IOI_IDELAY0_C.IOI_CLK1_0 always +RIOI3_SING.IOI_IDELAY0_CE.IOI_IMUX32_0 always +RIOI3_SING.IOI_IDELAY0_CINVCTRL.IOI_BYP6_0 always +RIOI3_SING.IOI_IDELAY0_DATAIN.IOI_IMUX25_0 always +RIOI3_SING.IOI_IDELAY0_INC.IOI_IMUX26_0 always +RIOI3_SING.IOI_IDELAY0_LD.IOI_IMUX30_0 always +RIOI3_SING.IOI_IDELAY0_LDPIPEEN.IOI_IMUX33_0 always +RIOI3_SING.IOI_IDELAY0_REGRST.IOI_IMUX12_0 always +RIOI3_SING.IOI_IDELAY0_CNTVALUEIN0.IOI_IMUX41_0 always +RIOI3_SING.IOI_IDELAY0_CNTVALUEIN1.IOI_IMUX36_0 always +RIOI3_SING.IOI_IDELAY0_CNTVALUEIN2.IOI_IMUX35_0 always +RIOI3_SING.IOI_IDELAY0_CNTVALUEIN3.IOI_IMUX38_0 always +RIOI3_SING.IOI_IDELAY0_CNTVALUEIN4.IOI_IMUX39_0 always +RIOI3_SING.IOI_ILOGIC0_BITSLIP.IOI_IMUX0_0 always +RIOI3_SING.IOI_ILOGIC0_CLKDIV.IOI_CLK0_0 always +RIOI3_SING.IOI_ILOGIC0_DYNCLKDIVPSEL.IOI_IMUX10_0 always +RIOI3_SING.IOI_ILOGIC0_DYNCLKDIVSEL.IOI_IMUX4_0 always +RIOI3_SING.IOI_ILOGIC0_DYNCLKSEL.IOI_IMUX37_0 always +RIOI3_SING.IOI_ILOGIC0_OCLK.IOI_OCLK_0 always +RIOI3_SING.IOI_ILOGIC0_SR.IOI_CTRL1_0 always +RIOI3_SING.IOI_ILOGIC0_CE1.IOI_IMUX5_0 always +RIOI3_SING.IOI_ILOGIC0_CE2.IOI_IMUX14_0 always +RIOI3_SING.IOI_OLOGIC0_CLK.IOI_OCLK_0 always +RIOI3_SING.IOI_OLOGIC0_OCE.IOI_IMUX29_0 always +RIOI3_SING.IOI_OLOGIC0_SR.IOI_CTRL0_0 always +RIOI3_SING.IOI_OLOGIC0_TBYTEIN.IOI_SING_TBYTEIN always +RIOI3_SING.IOI_OLOGIC0_TCE.IOI_IMUX1_0 always +RIOI3_SING.IOI_OLOGIC0_D1.IOI_IMUX34_0 always +RIOI3_SING.IOI_OLOGIC0_D2.IOI_IMUX40_0 always +RIOI3_SING.IOI_OLOGIC0_D3.IOI_IMUX44_0 always +RIOI3_SING.IOI_OLOGIC0_D4.IOI_IMUX42_0 always +RIOI3_SING.IOI_OLOGIC0_D5.IOI_IMUX43_0 always +RIOI3_SING.IOI_OLOGIC0_D6.IOI_IMUX45_0 always +RIOI3_SING.IOI_OLOGIC0_D7.IOI_IMUX46_0 always +RIOI3_SING.IOI_OLOGIC0_D8.IOI_IMUX47_0 always +RIOI3_SING.IOI_OLOGIC0_T1.IOI_IMUX15_0 always +RIOI3_SING.IOI_OLOGIC0_T2.IOI_IMUX7_0 always +RIOI3_SING.IOI_OLOGIC0_T3.IOI_IMUX13_0 always +RIOI3_SING.IOI_OLOGIC0_T4.IOI_IMUX21_0 always +RIOI3_SING.RIOI_DCI_T_TERM0.IOI_IMUX6_0 always +RIOI3_SING.RIOI_IBUF_DISABLE0.IOI_IMUX9_0 always +RIOI3_SING.RIOI_I0.RIOI_IBUF0 always +RIOI3_SING.RIOI_IDELAY0_DATAOUT.RIOI_IDELAY0_IDATAIN always +RIOI3_SING.RIOI_IDELAY0_IDATAIN.RIOI_I0 always +RIOI3_SING.RIOI_ILOGIC0_D.RIOI_I0 always +RIOI3_SING.RIOI_ILOGIC0_DDLY.RIOI_IDELAY0_DATAOUT always +RIOI3_SING.RIOI_ILOGIC0_OFB.RIOI_OLOGIC0_OFB always +RIOI3_SING.RIOI_ILOGIC0_TFB.RIOI_OLOGIC0_TFB_LOCAL always +RIOI3_SING.RIOI_O0.RIOI_OLOGIC0_OQ always +RIOI3_SING.RIOI_OLOGIC0_OQ.IOI_OLOGIC0_D1 always +RIOI3_SING.RIOI_OLOGIC0_TFB_LOCAL.RIOI_OLOGIC0_TFB always +RIOI3_SING.RIOI_OLOGIC0_TQ.IOI_OLOGIC0_T1 always +RIOI3_SING.RIOI_T0.RIOI_OLOGIC0_TQ always +RIOI3_SING.RIOI3_IDELAY0_IFDLY0.IOI_FAN4_0 always +RIOI3_SING.RIOI3_IDELAY0_IFDLY1.IOI_FAN5_0 always +RIOI3_SING.RIOI3_IDELAY0_IFDLY2.IOI_BYP7_0 always diff --git a/zynq7/ppips_rioi3_tbytesrc.db b/zynq7/ppips_rioi3_tbytesrc.db new file mode 100644 index 0000000..05c0b07 --- /dev/null +++ b/zynq7/ppips_rioi3_tbytesrc.db @@ -0,0 +1,158 @@ +RIOI3_TBYTESRC.IOI_LOGIC_OUTS0_0.IOI_ILOGIC1_Q1 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS0_1.IOI_ILOGIC0_Q1 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS1_0.IOI_IDELAY1_CNTVALUEOUT1 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS1_1.IOI_IDELAY0_CNTVALUEOUT1 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS2_0.RIOI_OLOGIC1_TFB_LOCAL always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS2_1.RIOI_OLOGIC0_TFB_LOCAL always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS3_0.IOI_ILOGIC1_Q6 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS3_1.IOI_ILOGIC0_Q6 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS5_0.IOI_OLOGIC1_IOCLKGLITCH always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS5_1.IOI_OLOGIC0_IOCLKGLITCH always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS7_0.IOI_ILOGIC1_Q7 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS7_1.IOI_ILOGIC0_Q7 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS8_0.IOI_ILOGIC1_Q8 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS8_1.IOI_ILOGIC0_Q8 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS9_0.IOI_ILOGIC1_Q3 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS9_1.IOI_ILOGIC0_Q3 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS10_0.IOI_ILOGIC1_Q4 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS10_1.IOI_ILOGIC0_Q4 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS11_0.IOI_IDELAY1_CNTVALUEOUT4 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS11_1.IOI_IDELAY0_CNTVALUEOUT4 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS14_0.IOI_ILOGIC1_Q5 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS14_1.IOI_ILOGIC0_Q5 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS15_0.IOI_IDELAY1_CNTVALUEOUT3 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS15_1.IOI_IDELAY0_CNTVALUEOUT3 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS18_0.IOI_ILOGIC1_O always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS18_1.IOI_ILOGIC0_O always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS19_0.IOI_IDELAY1_CNTVALUEOUT2 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS19_1.IOI_IDELAY0_CNTVALUEOUT2 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS20_0.IOI_IDELAY1_CNTVALUEOUT0 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS20_1.IOI_IDELAY0_CNTVALUEOUT0 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS23_0.IOI_ILOGIC1_Q2 always +RIOI3_TBYTESRC.IOI_LOGIC_OUTS23_1.IOI_ILOGIC0_Q2 always +RIOI3_TBYTESRC.IOI_RCLK_DIV_CE0.IOI_BYP3_1 always +RIOI3_TBYTESRC.IOI_RCLK_DIV_CE1.IOI_BYP4_1 always +RIOI3_TBYTESRC.IOI_RCLK_DIV_CE2_1.IOI_BYP4_1 always +RIOI3_TBYTESRC.IOI_RCLK_DIV_CE3_1.IOI_BYP3_1 always +RIOI3_TBYTESRC.IOI_RCLK_DIV_CLR0_1.IOI_BYP3_0 always +RIOI3_TBYTESRC.IOI_RCLK_DIV_CLR1_1.IOI_BYP4_0 always +RIOI3_TBYTESRC.IOI_RCLK_DIV_CLR2.IOI_BYP4_0 always +RIOI3_TBYTESRC.IOI_RCLK_DIV_CLR3.IOI_BYP3_0 always +RIOI3_TBYTESRC.IOI_TBYTEIN.IOI_OLOGIC1_TBYTEOUT always +RIOI3_TBYTESRC.IOI_IDELAY0_C.IOI_CLK1_1 always +RIOI3_TBYTESRC.IOI_IDELAY0_CE.IOI_IMUX32_1 always +RIOI3_TBYTESRC.IOI_IDELAY0_CINVCTRL.IOI_BYP6_1 always +RIOI3_TBYTESRC.IOI_IDELAY0_DATAIN.IOI_IMUX25_1 always +RIOI3_TBYTESRC.IOI_IDELAY0_INC.IOI_IMUX26_1 always +RIOI3_TBYTESRC.IOI_IDELAY0_LD.IOI_IMUX30_1 always +RIOI3_TBYTESRC.IOI_IDELAY0_LDPIPEEN.IOI_IMUX33_1 always +RIOI3_TBYTESRC.IOI_IDELAY0_REGRST.IOI_IMUX12_1 always +RIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN0.IOI_IMUX41_1 always +RIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN1.IOI_IMUX36_1 always +RIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN2.IOI_IMUX35_1 always +RIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN3.IOI_IMUX38_1 always +RIOI3_TBYTESRC.IOI_IDELAY0_CNTVALUEIN4.IOI_IMUX39_1 always +RIOI3_TBYTESRC.IOI_IDELAY1_C.IOI_CLK1_0 always +RIOI3_TBYTESRC.IOI_IDELAY1_CE.IOI_IMUX32_0 always +RIOI3_TBYTESRC.IOI_IDELAY1_CINVCTRL.IOI_BYP6_0 always +RIOI3_TBYTESRC.IOI_IDELAY1_DATAIN.IOI_IMUX25_0 always +RIOI3_TBYTESRC.IOI_IDELAY1_INC.IOI_IMUX26_0 always +RIOI3_TBYTESRC.IOI_IDELAY1_LD.IOI_IMUX30_0 always +RIOI3_TBYTESRC.IOI_IDELAY1_LDPIPEEN.IOI_IMUX33_0 always +RIOI3_TBYTESRC.IOI_IDELAY1_REGRST.IOI_IMUX12_0 always +RIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN0.IOI_IMUX41_0 always +RIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN1.IOI_IMUX36_0 always +RIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN2.IOI_IMUX35_0 always +RIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN3.IOI_IMUX38_0 always +RIOI3_TBYTESRC.IOI_IDELAY1_CNTVALUEIN4.IOI_IMUX39_0 always +RIOI3_TBYTESRC.IOI_ILOGIC0_BITSLIP.IOI_IMUX0_1 always +RIOI3_TBYTESRC.IOI_ILOGIC0_CLKDIV.IOI_CLK0_1 always +RIOI3_TBYTESRC.IOI_ILOGIC0_DYNCLKDIVPSEL.IOI_IMUX10_1 always +RIOI3_TBYTESRC.IOI_ILOGIC0_DYNCLKDIVSEL.IOI_IMUX4_1 always +RIOI3_TBYTESRC.IOI_ILOGIC0_DYNCLKSEL.IOI_IMUX37_1 always +RIOI3_TBYTESRC.IOI_ILOGIC0_OCLK.IOI_OCLK_0 always +RIOI3_TBYTESRC.IOI_ILOGIC0_SR.IOI_CTRL1_1 always +RIOI3_TBYTESRC.IOI_ILOGIC0_CE1.IOI_IMUX5_1 always +RIOI3_TBYTESRC.IOI_ILOGIC0_CE2.IOI_IMUX14_1 always +RIOI3_TBYTESRC.IOI_ILOGIC1_BITSLIP.IOI_IMUX0_0 always +RIOI3_TBYTESRC.IOI_ILOGIC1_CLKDIV.IOI_CLK0_0 always +RIOI3_TBYTESRC.IOI_ILOGIC1_DYNCLKDIVPSEL.IOI_IMUX10_0 always +RIOI3_TBYTESRC.IOI_ILOGIC1_DYNCLKDIVSEL.IOI_IMUX4_0 always +RIOI3_TBYTESRC.IOI_ILOGIC1_DYNCLKSEL.IOI_IMUX37_0 always +RIOI3_TBYTESRC.IOI_ILOGIC1_OCLK.IOI_OCLK_1 always +RIOI3_TBYTESRC.IOI_ILOGIC1_SR.IOI_CTRL1_0 always +RIOI3_TBYTESRC.IOI_ILOGIC1_CE1.IOI_IMUX5_0 always +RIOI3_TBYTESRC.IOI_ILOGIC1_CE2.IOI_IMUX14_0 always +RIOI3_TBYTESRC.IOI_OLOGIC0_CLK.IOI_OCLK_0 always +RIOI3_TBYTESRC.IOI_OLOGIC0_OCE.IOI_IMUX29_1 always +RIOI3_TBYTESRC.IOI_OLOGIC0_SR.IOI_CTRL0_1 always +RIOI3_TBYTESRC.IOI_OLOGIC0_TBYTEIN.IOI_TBYTEIN always +RIOI3_TBYTESRC.IOI_OLOGIC0_TCE.IOI_IMUX1_1 always +RIOI3_TBYTESRC.IOI_OLOGIC0_D1.IOI_IMUX34_1 always +RIOI3_TBYTESRC.IOI_OLOGIC0_D2.IOI_IMUX40_1 always +RIOI3_TBYTESRC.IOI_OLOGIC0_D3.IOI_IMUX44_1 always +RIOI3_TBYTESRC.IOI_OLOGIC0_D4.IOI_IMUX42_1 always +RIOI3_TBYTESRC.IOI_OLOGIC0_D5.IOI_IMUX43_1 always +RIOI3_TBYTESRC.IOI_OLOGIC0_D6.IOI_IMUX45_1 always +RIOI3_TBYTESRC.IOI_OLOGIC0_D7.IOI_IMUX46_1 always +RIOI3_TBYTESRC.IOI_OLOGIC0_D8.IOI_IMUX47_1 always +RIOI3_TBYTESRC.IOI_OLOGIC0_T1.IOI_IMUX15_1 always +RIOI3_TBYTESRC.IOI_OLOGIC0_T2.IOI_IMUX7_1 always +RIOI3_TBYTESRC.IOI_OLOGIC0_T3.IOI_IMUX13_1 always +RIOI3_TBYTESRC.IOI_OLOGIC0_T4.IOI_IMUX21_1 always +RIOI3_TBYTESRC.IOI_OLOGIC1_CLK.IOI_OCLK_1 always +RIOI3_TBYTESRC.IOI_OLOGIC1_OCE.IOI_IMUX29_0 always +RIOI3_TBYTESRC.IOI_OLOGIC1_SR.IOI_CTRL0_0 always +RIOI3_TBYTESRC.IOI_OLOGIC1_TBYTEIN.IOI_TBYTEIN always +RIOI3_TBYTESRC.IOI_OLOGIC1_TCE.IOI_IMUX1_0 always +RIOI3_TBYTESRC.IOI_OLOGIC1_D1.IOI_IMUX34_0 always +RIOI3_TBYTESRC.IOI_OLOGIC1_D2.IOI_IMUX40_0 always +RIOI3_TBYTESRC.IOI_OLOGIC1_D3.IOI_IMUX44_0 always +RIOI3_TBYTESRC.IOI_OLOGIC1_D4.IOI_IMUX42_0 always +RIOI3_TBYTESRC.IOI_OLOGIC1_D5.IOI_IMUX43_0 always +RIOI3_TBYTESRC.IOI_OLOGIC1_D6.IOI_IMUX45_0 always +RIOI3_TBYTESRC.IOI_OLOGIC1_D7.IOI_IMUX46_0 always +RIOI3_TBYTESRC.IOI_OLOGIC1_D8.IOI_IMUX47_0 always +RIOI3_TBYTESRC.IOI_OLOGIC1_T1.IOI_IMUX15_0 always +RIOI3_TBYTESRC.IOI_OLOGIC1_T2.IOI_IMUX7_0 always +RIOI3_TBYTESRC.IOI_OLOGIC1_T3.IOI_IMUX13_0 always +RIOI3_TBYTESRC.IOI_OLOGIC1_T4.IOI_IMUX21_0 always +RIOI3_TBYTESRC.RIOI_DCI_T_TERM0.IOI_IMUX6_1 always +RIOI3_TBYTESRC.RIOI_DCI_T_TERM1.IOI_IMUX6_0 always +RIOI3_TBYTESRC.RIOI_I2GCLK_TOP0.IOI_ILOGIC0_O always +RIOI3_TBYTESRC.RIOI_IBUF_DISABLE0.IOI_IMUX9_1 always +RIOI3_TBYTESRC.RIOI_IBUF_DISABLE1.IOI_IMUX9_0 always +RIOI3_TBYTESRC.RIOI_I0.RIOI_IBUF0 always +RIOI3_TBYTESRC.RIOI_I1.RIOI_IBUF1 always +RIOI3_TBYTESRC.RIOI_IDELAY0_DATAOUT.RIOI_IDELAY0_IDATAIN always +RIOI3_TBYTESRC.RIOI_IDELAY0_IDATAIN.RIOI_I0 always +RIOI3_TBYTESRC.RIOI_IDELAY1_DATAOUT.RIOI_IDELAY1_IDATAIN always +RIOI3_TBYTESRC.RIOI_IDELAY1_IDATAIN.RIOI_I1 always +RIOI3_TBYTESRC.RIOI_ILOGIC0_D.RIOI_I0 always +RIOI3_TBYTESRC.RIOI_ILOGIC0_DDLY.RIOI_IDELAY0_DATAOUT always +RIOI3_TBYTESRC.RIOI_ILOGIC0_OFB.RIOI_OLOGIC0_OFB always +RIOI3_TBYTESRC.RIOI_ILOGIC0_TFB.RIOI_OLOGIC0_TFB_LOCAL always +RIOI3_TBYTESRC.RIOI_ILOGIC1_D.RIOI_I1 always +RIOI3_TBYTESRC.RIOI_ILOGIC1_DDLY.RIOI_IDELAY1_DATAOUT always +RIOI3_TBYTESRC.RIOI_ILOGIC1_OFB.RIOI_OLOGIC1_OFB always +RIOI3_TBYTESRC.RIOI_ILOGIC1_TFB.RIOI_OLOGIC1_TFB_LOCAL always +RIOI3_TBYTESRC.RIOI_ISIN11.RIOI_ISOUT10 always +RIOI3_TBYTESRC.RIOI_ISIN21.RIOI_ISOUT20 always +RIOI3_TBYTESRC.RIOI_O0.RIOI_OLOGIC0_OQ always +RIOI3_TBYTESRC.RIOI_O1.RIOI_OLOGIC1_OQ always +RIOI3_TBYTESRC.RIOI_OLOGIC0_OQ.IOI_OLOGIC0_D1 always +RIOI3_TBYTESRC.RIOI_OLOGIC0_TFB_LOCAL.RIOI_OLOGIC0_TFB always +RIOI3_TBYTESRC.RIOI_OLOGIC0_TQ.IOI_OLOGIC0_T1 always +RIOI3_TBYTESRC.RIOI_OLOGIC1_OQ.IOI_OLOGIC1_D1 always +RIOI3_TBYTESRC.RIOI_OLOGIC1_TFB_LOCAL.RIOI_OLOGIC1_TFB always +RIOI3_TBYTESRC.RIOI_OLOGIC1_TQ.IOI_OLOGIC1_T1 always +RIOI3_TBYTESRC.RIOI_OSIN10.RIOI_OSOUT11 always +RIOI3_TBYTESRC.RIOI_OSIN20.RIOI_OSOUT21 always +RIOI3_TBYTESRC.RIOI_T0.RIOI_OLOGIC0_TQ always +RIOI3_TBYTESRC.RIOI_T1.RIOI_OLOGIC1_TQ always +RIOI3_TBYTESRC.RIOI3_IDELAY0_IFDLY0.IOI_FAN4_1 always +RIOI3_TBYTESRC.RIOI3_IDELAY0_IFDLY1.IOI_FAN5_1 always +RIOI3_TBYTESRC.RIOI3_IDELAY0_IFDLY2.IOI_BYP7_1 always +RIOI3_TBYTESRC.RIOI3_IDELAY1_IFDLY0.IOI_FAN4_0 always +RIOI3_TBYTESRC.RIOI3_IDELAY1_IFDLY1.IOI_FAN5_0 always +RIOI3_TBYTESRC.RIOI3_IDELAY1_IFDLY2.IOI_BYP7_0 always diff --git a/zynq7/segbits_dsp_l.db b/zynq7/segbits_dsp_l.db index e69de29..78d5d77 100644 --- a/zynq7/segbits_dsp_l.db +++ b/zynq7/segbits_dsp_l.db @@ -0,0 +1,192 @@ +DSP_L.DSP48.DSP_0.MASK[0] 27_01 +DSP_L.DSP48.DSP_0.MASK[1] 26_03 +DSP_L.DSP48.DSP_0.MASK[2] 27_06 +DSP_L.DSP48.DSP_0.MASK[3] 26_07 +DSP_L.DSP48.DSP_0.MASK[4] 26_10 +DSP_L.DSP48.DSP_0.MASK[5] 27_11 +DSP_L.DSP48.DSP_0.MASK[6] 26_18 +DSP_L.DSP48.DSP_0.MASK[7] 27_19 +DSP_L.DSP48.DSP_0.MASK[8] 26_22 +DSP_L.DSP48.DSP_0.MASK[9] 27_23 +DSP_L.DSP48.DSP_0.MASK[10] 27_26 +DSP_L.DSP48.DSP_0.MASK[11] 26_28 +DSP_L.DSP48.DSP_0.MASK[12] 26_41 +DSP_L.DSP48.DSP_0.MASK[13] 27_42 +DSP_L.DSP48.DSP_0.MASK[14] 26_45 +DSP_L.DSP48.DSP_0.MASK[15] 27_46 +DSP_L.DSP48.DSP_0.MASK[16] 26_49 +DSP_L.DSP48.DSP_0.MASK[17] 27_50 +DSP_L.DSP48.DSP_0.MASK[18] 27_57 +DSP_L.DSP48.DSP_0.MASK[19] 26_59 +DSP_L.DSP48.DSP_0.MASK[20] 26_62 +DSP_L.DSP48.DSP_0.MASK[21] 27_63 +DSP_L.DSP48.DSP_0.MASK[22] 26_66 +DSP_L.DSP48.DSP_0.MASK[23] 27_67 +DSP_L.DSP48.DSP_0.MASK[24] 27_86 +DSP_L.DSP48.DSP_0.MASK[25] 26_88 +DSP_L.DSP48.DSP_0.MASK[26] 27_90 +DSP_L.DSP48.DSP_0.MASK[27] 26_92 +DSP_L.DSP48.DSP_0.MASK[28] 27_94 +DSP_L.DSP48.DSP_0.MASK[29] 26_96 +DSP_L.DSP48.DSP_0.MASK[30] 27_102 +DSP_L.DSP48.DSP_0.MASK[31] 26_104 +DSP_L.DSP48.DSP_0.MASK[32] 27_106 +DSP_L.DSP48.DSP_0.MASK[33] 26_108 +DSP_L.DSP48.DSP_0.MASK[34] 27_110 +DSP_L.DSP48.DSP_0.MASK[35] 26_112 +DSP_L.DSP48.DSP_0.MASK[36] 27_127 +DSP_L.DSP48.DSP_0.MASK[37] 26_129 +DSP_L.DSP48.DSP_0.MASK[38] 26_132 +DSP_L.DSP48.DSP_0.MASK[39] 27_133 +DSP_L.DSP48.DSP_0.MASK[40] 26_136 +DSP_L.DSP48.DSP_0.MASK[41] 27_137 +DSP_L.DSP48.DSP_0.MASK[42] 27_144 +DSP_L.DSP48.DSP_0.MASK[43] 26_146 +DSP_L.DSP48.DSP_0.MASK[44] 26_149 +DSP_L.DSP48.DSP_0.MASK[45] 27_150 +DSP_L.DSP48.DSP_0.MASK[46] 26_153 +DSP_L.DSP48.DSP_0.MASK[47] 26_154 +DSP_L.DSP48.DSP_0.PATTERN[0] 26_01 +DSP_L.DSP48.DSP_0.PATTERN[1] 26_04 +DSP_L.DSP48.DSP_0.PATTERN[2] 26_05 +DSP_L.DSP48.DSP_0.PATTERN[3] 27_08 +DSP_L.DSP48.DSP_0.PATTERN[4] 26_09 +DSP_L.DSP48.DSP_0.PATTERN[5] 26_12 +DSP_L.DSP48.DSP_0.PATTERN[6] 27_17 +DSP_L.DSP48.DSP_0.PATTERN[7] 26_20 +DSP_L.DSP48.DSP_0.PATTERN[8] 27_21 +DSP_L.DSP48.DSP_0.PATTERN[9] 27_24 +DSP_L.DSP48.DSP_0.PATTERN[10] 26_26 +DSP_L.DSP48.DSP_0.PATTERN[11] 26_29 +DSP_L.DSP48.DSP_0.PATTERN[12] 27_40 +DSP_L.DSP48.DSP_0.PATTERN[13] 26_43 +DSP_L.DSP48.DSP_0.PATTERN[14] 27_44 +DSP_L.DSP48.DSP_0.PATTERN[15] 26_47 +DSP_L.DSP48.DSP_0.PATTERN[16] 27_48 +DSP_L.DSP48.DSP_0.PATTERN[17] 26_51 +DSP_L.DSP48.DSP_0.PATTERN[18] 26_57 +DSP_L.DSP48.DSP_0.PATTERN[19] 26_60 +DSP_L.DSP48.DSP_0.PATTERN[20] 27_61 +DSP_L.DSP48.DSP_0.PATTERN[21] 26_64 +DSP_L.DSP48.DSP_0.PATTERN[22] 27_65 +DSP_L.DSP48.DSP_0.PATTERN[23] 26_68 +DSP_L.DSP48.DSP_0.PATTERN[24] 26_86 +DSP_L.DSP48.DSP_0.PATTERN[25] 27_88 +DSP_L.DSP48.DSP_0.PATTERN[26] 26_90 +DSP_L.DSP48.DSP_0.PATTERN[27] 27_92 +DSP_L.DSP48.DSP_0.PATTERN[28] 26_94 +DSP_L.DSP48.DSP_0.PATTERN[29] 26_97 +DSP_L.DSP48.DSP_0.PATTERN[30] 27_101 +DSP_L.DSP48.DSP_0.PATTERN[31] 27_104 +DSP_L.DSP48.DSP_0.PATTERN[32] 26_106 +DSP_L.DSP48.DSP_0.PATTERN[33] 27_108 +DSP_L.DSP48.DSP_0.PATTERN[34] 26_110 +DSP_L.DSP48.DSP_0.PATTERN[35] 27_112 +DSP_L.DSP48.DSP_0.PATTERN[36] 26_127 +DSP_L.DSP48.DSP_0.PATTERN[37] 26_130 +DSP_L.DSP48.DSP_0.PATTERN[38] 27_131 +DSP_L.DSP48.DSP_0.PATTERN[39] 26_134 +DSP_L.DSP48.DSP_0.PATTERN[40] 27_135 +DSP_L.DSP48.DSP_0.PATTERN[41] 26_138 +DSP_L.DSP48.DSP_0.PATTERN[42] 26_144 +DSP_L.DSP48.DSP_0.PATTERN[43] 27_146 +DSP_L.DSP48.DSP_0.PATTERN[44] 26_148 +DSP_L.DSP48.DSP_0.PATTERN[45] 26_151 +DSP_L.DSP48.DSP_0.PATTERN[46] 27_152 +DSP_L.DSP48.DSP_0.PATTERN[47] 26_155 +DSP_L.DSP48.DSP_1.MASK[0] 27_161 +DSP_L.DSP48.DSP_1.MASK[1] 26_163 +DSP_L.DSP48.DSP_1.MASK[2] 27_166 +DSP_L.DSP48.DSP_1.MASK[3] 26_167 +DSP_L.DSP48.DSP_1.MASK[4] 26_170 +DSP_L.DSP48.DSP_1.MASK[5] 27_171 +DSP_L.DSP48.DSP_1.MASK[6] 26_178 +DSP_L.DSP48.DSP_1.MASK[7] 27_179 +DSP_L.DSP48.DSP_1.MASK[8] 26_182 +DSP_L.DSP48.DSP_1.MASK[9] 27_183 +DSP_L.DSP48.DSP_1.MASK[10] 27_186 +DSP_L.DSP48.DSP_1.MASK[11] 26_188 +DSP_L.DSP48.DSP_1.MASK[12] 26_201 +DSP_L.DSP48.DSP_1.MASK[13] 27_202 +DSP_L.DSP48.DSP_1.MASK[14] 26_205 +DSP_L.DSP48.DSP_1.MASK[15] 27_206 +DSP_L.DSP48.DSP_1.MASK[16] 26_209 +DSP_L.DSP48.DSP_1.MASK[17] 27_210 +DSP_L.DSP48.DSP_1.MASK[18] 27_217 +DSP_L.DSP48.DSP_1.MASK[19] 26_219 +DSP_L.DSP48.DSP_1.MASK[20] 26_222 +DSP_L.DSP48.DSP_1.MASK[21] 27_223 +DSP_L.DSP48.DSP_1.MASK[22] 26_226 +DSP_L.DSP48.DSP_1.MASK[23] 27_227 +DSP_L.DSP48.DSP_1.MASK[24] 27_246 +DSP_L.DSP48.DSP_1.MASK[25] 26_248 +DSP_L.DSP48.DSP_1.MASK[26] 27_250 +DSP_L.DSP48.DSP_1.MASK[27] 26_252 +DSP_L.DSP48.DSP_1.MASK[28] 27_254 +DSP_L.DSP48.DSP_1.MASK[29] 26_256 +DSP_L.DSP48.DSP_1.MASK[30] 27_262 +DSP_L.DSP48.DSP_1.MASK[31] 26_264 +DSP_L.DSP48.DSP_1.MASK[32] 27_266 +DSP_L.DSP48.DSP_1.MASK[33] 26_268 +DSP_L.DSP48.DSP_1.MASK[34] 27_270 +DSP_L.DSP48.DSP_1.MASK[35] 26_272 +DSP_L.DSP48.DSP_1.MASK[36] 27_287 +DSP_L.DSP48.DSP_1.MASK[37] 26_289 +DSP_L.DSP48.DSP_1.MASK[38] 26_292 +DSP_L.DSP48.DSP_1.MASK[39] 27_293 +DSP_L.DSP48.DSP_1.MASK[40] 26_296 +DSP_L.DSP48.DSP_1.MASK[41] 27_297 +DSP_L.DSP48.DSP_1.MASK[42] 27_304 +DSP_L.DSP48.DSP_1.MASK[43] 26_306 +DSP_L.DSP48.DSP_1.MASK[44] 26_309 +DSP_L.DSP48.DSP_1.MASK[45] 27_310 +DSP_L.DSP48.DSP_1.MASK[46] 26_313 +DSP_L.DSP48.DSP_1.MASK[47] 26_314 +DSP_L.DSP48.DSP_1.PATTERN[0] 26_161 +DSP_L.DSP48.DSP_1.PATTERN[1] 26_164 +DSP_L.DSP48.DSP_1.PATTERN[2] 26_165 +DSP_L.DSP48.DSP_1.PATTERN[3] 27_168 +DSP_L.DSP48.DSP_1.PATTERN[4] 26_169 +DSP_L.DSP48.DSP_1.PATTERN[5] 26_172 +DSP_L.DSP48.DSP_1.PATTERN[6] 27_177 +DSP_L.DSP48.DSP_1.PATTERN[7] 26_180 +DSP_L.DSP48.DSP_1.PATTERN[8] 27_181 +DSP_L.DSP48.DSP_1.PATTERN[9] 27_184 +DSP_L.DSP48.DSP_1.PATTERN[10] 26_186 +DSP_L.DSP48.DSP_1.PATTERN[11] 26_189 +DSP_L.DSP48.DSP_1.PATTERN[12] 27_200 +DSP_L.DSP48.DSP_1.PATTERN[13] 26_203 +DSP_L.DSP48.DSP_1.PATTERN[14] 27_204 +DSP_L.DSP48.DSP_1.PATTERN[15] 26_207 +DSP_L.DSP48.DSP_1.PATTERN[16] 27_208 +DSP_L.DSP48.DSP_1.PATTERN[17] 26_211 +DSP_L.DSP48.DSP_1.PATTERN[18] 26_217 +DSP_L.DSP48.DSP_1.PATTERN[19] 26_220 +DSP_L.DSP48.DSP_1.PATTERN[20] 27_221 +DSP_L.DSP48.DSP_1.PATTERN[21] 26_224 +DSP_L.DSP48.DSP_1.PATTERN[22] 27_225 +DSP_L.DSP48.DSP_1.PATTERN[23] 26_228 +DSP_L.DSP48.DSP_1.PATTERN[24] 26_246 +DSP_L.DSP48.DSP_1.PATTERN[25] 27_248 +DSP_L.DSP48.DSP_1.PATTERN[26] 26_250 +DSP_L.DSP48.DSP_1.PATTERN[27] 27_252 +DSP_L.DSP48.DSP_1.PATTERN[28] 26_254 +DSP_L.DSP48.DSP_1.PATTERN[29] 26_257 +DSP_L.DSP48.DSP_1.PATTERN[30] 27_261 +DSP_L.DSP48.DSP_1.PATTERN[31] 27_264 +DSP_L.DSP48.DSP_1.PATTERN[32] 26_266 +DSP_L.DSP48.DSP_1.PATTERN[33] 27_268 +DSP_L.DSP48.DSP_1.PATTERN[34] 26_270 +DSP_L.DSP48.DSP_1.PATTERN[35] 27_272 +DSP_L.DSP48.DSP_1.PATTERN[36] 26_287 +DSP_L.DSP48.DSP_1.PATTERN[37] 26_290 +DSP_L.DSP48.DSP_1.PATTERN[38] 27_291 +DSP_L.DSP48.DSP_1.PATTERN[39] 26_294 +DSP_L.DSP48.DSP_1.PATTERN[40] 27_295 +DSP_L.DSP48.DSP_1.PATTERN[41] 26_298 +DSP_L.DSP48.DSP_1.PATTERN[42] 26_304 +DSP_L.DSP48.DSP_1.PATTERN[43] 27_306 +DSP_L.DSP48.DSP_1.PATTERN[44] 26_308 +DSP_L.DSP48.DSP_1.PATTERN[45] 26_311 +DSP_L.DSP48.DSP_1.PATTERN[46] 27_312 +DSP_L.DSP48.DSP_1.PATTERN[47] 26_315 diff --git a/zynq7/segbits_dsp_r.db b/zynq7/segbits_dsp_r.db index e69de29..050f6fa 100644 --- a/zynq7/segbits_dsp_r.db +++ b/zynq7/segbits_dsp_r.db @@ -0,0 +1,192 @@ +DSP_R.DSP48.DSP_0.MASK[0] 27_01 +DSP_R.DSP48.DSP_0.MASK[1] 26_03 +DSP_R.DSP48.DSP_0.MASK[2] 27_06 +DSP_R.DSP48.DSP_0.MASK[3] 26_07 +DSP_R.DSP48.DSP_0.MASK[4] 26_10 +DSP_R.DSP48.DSP_0.MASK[5] 27_11 +DSP_R.DSP48.DSP_0.MASK[6] 26_18 +DSP_R.DSP48.DSP_0.MASK[7] 27_19 +DSP_R.DSP48.DSP_0.MASK[8] 26_22 +DSP_R.DSP48.DSP_0.MASK[9] 27_23 +DSP_R.DSP48.DSP_0.MASK[10] 27_26 +DSP_R.DSP48.DSP_0.MASK[11] 26_28 +DSP_R.DSP48.DSP_0.MASK[12] 26_41 +DSP_R.DSP48.DSP_0.MASK[13] 27_42 +DSP_R.DSP48.DSP_0.MASK[14] 26_45 +DSP_R.DSP48.DSP_0.MASK[15] 27_46 +DSP_R.DSP48.DSP_0.MASK[16] 26_49 +DSP_R.DSP48.DSP_0.MASK[17] 27_50 +DSP_R.DSP48.DSP_0.MASK[18] 27_57 +DSP_R.DSP48.DSP_0.MASK[19] 26_59 +DSP_R.DSP48.DSP_0.MASK[20] 26_62 +DSP_R.DSP48.DSP_0.MASK[21] 27_63 +DSP_R.DSP48.DSP_0.MASK[22] 26_66 +DSP_R.DSP48.DSP_0.MASK[23] 27_67 +DSP_R.DSP48.DSP_0.MASK[24] 27_86 +DSP_R.DSP48.DSP_0.MASK[25] 26_88 +DSP_R.DSP48.DSP_0.MASK[26] 27_90 +DSP_R.DSP48.DSP_0.MASK[27] 26_92 +DSP_R.DSP48.DSP_0.MASK[28] 27_94 +DSP_R.DSP48.DSP_0.MASK[29] 26_96 +DSP_R.DSP48.DSP_0.MASK[30] 27_102 +DSP_R.DSP48.DSP_0.MASK[31] 26_104 +DSP_R.DSP48.DSP_0.MASK[32] 27_106 +DSP_R.DSP48.DSP_0.MASK[33] 26_108 +DSP_R.DSP48.DSP_0.MASK[34] 27_110 +DSP_R.DSP48.DSP_0.MASK[35] 26_112 +DSP_R.DSP48.DSP_0.MASK[36] 27_127 +DSP_R.DSP48.DSP_0.MASK[37] 26_129 +DSP_R.DSP48.DSP_0.MASK[38] 26_132 +DSP_R.DSP48.DSP_0.MASK[39] 27_133 +DSP_R.DSP48.DSP_0.MASK[40] 26_136 +DSP_R.DSP48.DSP_0.MASK[41] 27_137 +DSP_R.DSP48.DSP_0.MASK[42] 27_144 +DSP_R.DSP48.DSP_0.MASK[43] 26_146 +DSP_R.DSP48.DSP_0.MASK[44] 26_149 +DSP_R.DSP48.DSP_0.MASK[45] 27_150 +DSP_R.DSP48.DSP_0.MASK[46] 26_153 +DSP_R.DSP48.DSP_0.MASK[47] 26_154 +DSP_R.DSP48.DSP_0.PATTERN[0] 26_01 +DSP_R.DSP48.DSP_0.PATTERN[1] 26_04 +DSP_R.DSP48.DSP_0.PATTERN[2] 26_05 +DSP_R.DSP48.DSP_0.PATTERN[3] 27_08 +DSP_R.DSP48.DSP_0.PATTERN[4] 26_09 +DSP_R.DSP48.DSP_0.PATTERN[5] 26_12 +DSP_R.DSP48.DSP_0.PATTERN[6] 27_17 +DSP_R.DSP48.DSP_0.PATTERN[7] 26_20 +DSP_R.DSP48.DSP_0.PATTERN[8] 27_21 +DSP_R.DSP48.DSP_0.PATTERN[9] 27_24 +DSP_R.DSP48.DSP_0.PATTERN[10] 26_26 +DSP_R.DSP48.DSP_0.PATTERN[11] 26_29 +DSP_R.DSP48.DSP_0.PATTERN[12] 27_40 +DSP_R.DSP48.DSP_0.PATTERN[13] 26_43 +DSP_R.DSP48.DSP_0.PATTERN[14] 27_44 +DSP_R.DSP48.DSP_0.PATTERN[15] 26_47 +DSP_R.DSP48.DSP_0.PATTERN[16] 27_48 +DSP_R.DSP48.DSP_0.PATTERN[17] 26_51 +DSP_R.DSP48.DSP_0.PATTERN[18] 26_57 +DSP_R.DSP48.DSP_0.PATTERN[19] 26_60 +DSP_R.DSP48.DSP_0.PATTERN[20] 27_61 +DSP_R.DSP48.DSP_0.PATTERN[21] 26_64 +DSP_R.DSP48.DSP_0.PATTERN[22] 27_65 +DSP_R.DSP48.DSP_0.PATTERN[23] 26_68 +DSP_R.DSP48.DSP_0.PATTERN[24] 26_86 +DSP_R.DSP48.DSP_0.PATTERN[25] 27_88 +DSP_R.DSP48.DSP_0.PATTERN[26] 26_90 +DSP_R.DSP48.DSP_0.PATTERN[27] 27_92 +DSP_R.DSP48.DSP_0.PATTERN[28] 26_94 +DSP_R.DSP48.DSP_0.PATTERN[29] 26_97 +DSP_R.DSP48.DSP_0.PATTERN[30] 27_101 +DSP_R.DSP48.DSP_0.PATTERN[31] 27_104 +DSP_R.DSP48.DSP_0.PATTERN[32] 26_106 +DSP_R.DSP48.DSP_0.PATTERN[33] 27_108 +DSP_R.DSP48.DSP_0.PATTERN[34] 26_110 +DSP_R.DSP48.DSP_0.PATTERN[35] 27_112 +DSP_R.DSP48.DSP_0.PATTERN[36] 26_127 +DSP_R.DSP48.DSP_0.PATTERN[37] 26_130 +DSP_R.DSP48.DSP_0.PATTERN[38] 27_131 +DSP_R.DSP48.DSP_0.PATTERN[39] 26_134 +DSP_R.DSP48.DSP_0.PATTERN[40] 27_135 +DSP_R.DSP48.DSP_0.PATTERN[41] 26_138 +DSP_R.DSP48.DSP_0.PATTERN[42] 26_144 +DSP_R.DSP48.DSP_0.PATTERN[43] 27_146 +DSP_R.DSP48.DSP_0.PATTERN[44] 26_148 +DSP_R.DSP48.DSP_0.PATTERN[45] 26_151 +DSP_R.DSP48.DSP_0.PATTERN[46] 27_152 +DSP_R.DSP48.DSP_0.PATTERN[47] 26_155 +DSP_R.DSP48.DSP_1.MASK[0] 27_161 +DSP_R.DSP48.DSP_1.MASK[1] 26_163 +DSP_R.DSP48.DSP_1.MASK[2] 27_166 +DSP_R.DSP48.DSP_1.MASK[3] 26_167 +DSP_R.DSP48.DSP_1.MASK[4] 26_170 +DSP_R.DSP48.DSP_1.MASK[5] 27_171 +DSP_R.DSP48.DSP_1.MASK[6] 26_178 +DSP_R.DSP48.DSP_1.MASK[7] 27_179 +DSP_R.DSP48.DSP_1.MASK[8] 26_182 +DSP_R.DSP48.DSP_1.MASK[9] 27_183 +DSP_R.DSP48.DSP_1.MASK[10] 27_186 +DSP_R.DSP48.DSP_1.MASK[11] 26_188 +DSP_R.DSP48.DSP_1.MASK[12] 26_201 +DSP_R.DSP48.DSP_1.MASK[13] 27_202 +DSP_R.DSP48.DSP_1.MASK[14] 26_205 +DSP_R.DSP48.DSP_1.MASK[15] 27_206 +DSP_R.DSP48.DSP_1.MASK[16] 26_209 +DSP_R.DSP48.DSP_1.MASK[17] 27_210 +DSP_R.DSP48.DSP_1.MASK[18] 27_217 +DSP_R.DSP48.DSP_1.MASK[19] 26_219 +DSP_R.DSP48.DSP_1.MASK[20] 26_222 +DSP_R.DSP48.DSP_1.MASK[21] 27_223 +DSP_R.DSP48.DSP_1.MASK[22] 26_226 +DSP_R.DSP48.DSP_1.MASK[23] 27_227 +DSP_R.DSP48.DSP_1.MASK[24] 27_246 +DSP_R.DSP48.DSP_1.MASK[25] 26_248 +DSP_R.DSP48.DSP_1.MASK[26] 27_250 +DSP_R.DSP48.DSP_1.MASK[27] 26_252 +DSP_R.DSP48.DSP_1.MASK[28] 27_254 +DSP_R.DSP48.DSP_1.MASK[29] 26_256 +DSP_R.DSP48.DSP_1.MASK[30] 27_262 +DSP_R.DSP48.DSP_1.MASK[31] 26_264 +DSP_R.DSP48.DSP_1.MASK[32] 27_266 +DSP_R.DSP48.DSP_1.MASK[33] 26_268 +DSP_R.DSP48.DSP_1.MASK[34] 27_270 +DSP_R.DSP48.DSP_1.MASK[35] 26_272 +DSP_R.DSP48.DSP_1.MASK[36] 27_287 +DSP_R.DSP48.DSP_1.MASK[37] 26_289 +DSP_R.DSP48.DSP_1.MASK[38] 26_292 +DSP_R.DSP48.DSP_1.MASK[39] 27_293 +DSP_R.DSP48.DSP_1.MASK[40] 26_296 +DSP_R.DSP48.DSP_1.MASK[41] 27_297 +DSP_R.DSP48.DSP_1.MASK[42] 27_304 +DSP_R.DSP48.DSP_1.MASK[43] 26_306 +DSP_R.DSP48.DSP_1.MASK[44] 26_309 +DSP_R.DSP48.DSP_1.MASK[45] 27_310 +DSP_R.DSP48.DSP_1.MASK[46] 26_313 +DSP_R.DSP48.DSP_1.MASK[47] 26_314 +DSP_R.DSP48.DSP_1.PATTERN[0] 26_161 +DSP_R.DSP48.DSP_1.PATTERN[1] 26_164 +DSP_R.DSP48.DSP_1.PATTERN[2] 26_165 +DSP_R.DSP48.DSP_1.PATTERN[3] 27_168 +DSP_R.DSP48.DSP_1.PATTERN[4] 26_169 +DSP_R.DSP48.DSP_1.PATTERN[5] 26_172 +DSP_R.DSP48.DSP_1.PATTERN[6] 27_177 +DSP_R.DSP48.DSP_1.PATTERN[7] 26_180 +DSP_R.DSP48.DSP_1.PATTERN[8] 27_181 +DSP_R.DSP48.DSP_1.PATTERN[9] 27_184 +DSP_R.DSP48.DSP_1.PATTERN[10] 26_186 +DSP_R.DSP48.DSP_1.PATTERN[11] 26_189 +DSP_R.DSP48.DSP_1.PATTERN[12] 27_200 +DSP_R.DSP48.DSP_1.PATTERN[13] 26_203 +DSP_R.DSP48.DSP_1.PATTERN[14] 27_204 +DSP_R.DSP48.DSP_1.PATTERN[15] 26_207 +DSP_R.DSP48.DSP_1.PATTERN[16] 27_208 +DSP_R.DSP48.DSP_1.PATTERN[17] 26_211 +DSP_R.DSP48.DSP_1.PATTERN[18] 26_217 +DSP_R.DSP48.DSP_1.PATTERN[19] 26_220 +DSP_R.DSP48.DSP_1.PATTERN[20] 27_221 +DSP_R.DSP48.DSP_1.PATTERN[21] 26_224 +DSP_R.DSP48.DSP_1.PATTERN[22] 27_225 +DSP_R.DSP48.DSP_1.PATTERN[23] 26_228 +DSP_R.DSP48.DSP_1.PATTERN[24] 26_246 +DSP_R.DSP48.DSP_1.PATTERN[25] 27_248 +DSP_R.DSP48.DSP_1.PATTERN[26] 26_250 +DSP_R.DSP48.DSP_1.PATTERN[27] 27_252 +DSP_R.DSP48.DSP_1.PATTERN[28] 26_254 +DSP_R.DSP48.DSP_1.PATTERN[29] 26_257 +DSP_R.DSP48.DSP_1.PATTERN[30] 27_261 +DSP_R.DSP48.DSP_1.PATTERN[31] 27_264 +DSP_R.DSP48.DSP_1.PATTERN[32] 26_266 +DSP_R.DSP48.DSP_1.PATTERN[33] 27_268 +DSP_R.DSP48.DSP_1.PATTERN[34] 26_270 +DSP_R.DSP48.DSP_1.PATTERN[35] 27_272 +DSP_R.DSP48.DSP_1.PATTERN[36] 26_287 +DSP_R.DSP48.DSP_1.PATTERN[37] 26_290 +DSP_R.DSP48.DSP_1.PATTERN[38] 27_291 +DSP_R.DSP48.DSP_1.PATTERN[39] 26_294 +DSP_R.DSP48.DSP_1.PATTERN[40] 27_295 +DSP_R.DSP48.DSP_1.PATTERN[41] 26_298 +DSP_R.DSP48.DSP_1.PATTERN[42] 26_304 +DSP_R.DSP48.DSP_1.PATTERN[43] 27_306 +DSP_R.DSP48.DSP_1.PATTERN[44] 26_308 +DSP_R.DSP48.DSP_1.PATTERN[45] 26_311 +DSP_R.DSP48.DSP_1.PATTERN[46] 27_312 +DSP_R.DSP48.DSP_1.PATTERN[47] 26_315 diff --git a/zynq7/segbits_int_l.db b/zynq7/segbits_int_l.db index 43670e7..4b80d43 100644 --- a/zynq7/segbits_int_l.db +++ b/zynq7/segbits_int_l.db @@ -10,7 +10,7 @@ INT_L.BYP_ALT0.WW2END_N0_3 17_07 !22_07 !23_07 24_07 !25_07 INT_L.BYP_ALT0.EE2END0 18_06 !22_07 !23_07 24_07 !25_07 INT_L.BYP_ALT0.EL1END0 16_07 22_07 !23_07 24_07 25_07 INT_L.BYP_ALT0.ER1END0 17_07 !22_07 23_07 24_07 25_07 -INT_L.BYP_ALT0.GFAN0 20_07 !22_07 !23_07 24_07 !25_07 +INT_L.BYP_ALT0.GFAN0 !00_10 !00_11 !01_09 !01_10 01_14 20_07 !22_07 !23_07 24_07 !25_07 INT_L.BYP_ALT0.NE2END0 19_06 !22_07 !23_07 !24_07 25_07 INT_L.BYP_ALT0.NL1END0 18_06 22_07 !23_07 24_07 25_07 INT_L.BYP_ALT0.NN2END0 19_06 !22_07 !23_07 24_07 !25_07 @@ -33,7 +33,7 @@ INT_L.BYP_ALT1.SR1BEG_S0 18_14 !22_15 23_15 24_15 25_15 INT_L.BYP_ALT1.EE2END0 17_15 !22_15 !23_15 24_15 !25_15 INT_L.BYP_ALT1.EL1END1 17_15 22_15 !23_15 24_15 25_15 INT_L.BYP_ALT1.ER1END0 16_15 !22_15 23_15 24_15 25_15 -INT_L.BYP_ALT1.GFAN0 20_15 !22_15 !23_15 24_15 !25_15 +INT_L.BYP_ALT1.GFAN0 !00_10 !00_11 !01_09 01_10 01_14 20_15 !22_15 !23_15 24_15 !25_15 INT_L.BYP_ALT1.NE2END1 16_15 !22_15 !23_15 !24_15 25_15 INT_L.BYP_ALT1.NL1END1 18_14 22_15 !23_15 24_15 25_15 INT_L.BYP_ALT1.NN2END1 16_15 !22_15 !23_15 24_15 !25_15 @@ -81,7 +81,7 @@ INT_L.BYP_ALT3.NL1BEG_N3 18_46 22_47 !23_47 24_47 25_47 INT_L.BYP_ALT3.EE2END2 17_47 !22_47 !23_47 24_47 !25_47 INT_L.BYP_ALT3.EL1END3 17_47 22_47 !23_47 24_47 25_47 INT_L.BYP_ALT3.ER1END2 16_47 !22_47 23_47 24_47 25_47 -INT_L.BYP_ALT3.GFAN1 20_47 !22_47 !23_47 24_47 !25_47 +INT_L.BYP_ALT3.GFAN1 !00_14 00_17 !00_18 !00_19 !01_13 20_47 !22_47 !23_47 24_47 !25_47 INT_L.BYP_ALT3.NE2END3 16_47 !22_47 !23_47 !24_47 25_47 INT_L.BYP_ALT3.NN2END3 16_47 !22_47 !23_47 24_47 !25_47 INT_L.BYP_ALT3.NR1END2 19_46 !22_47 23_47 24_47 25_47 diff --git a/zynq7/segbits_int_r.db b/zynq7/segbits_int_r.db index 549b5d8..899c784 100644 --- a/zynq7/segbits_int_r.db +++ b/zynq7/segbits_int_r.db @@ -33,7 +33,7 @@ INT_R.BYP_ALT1.SR1BEG_S0 18_14 !22_15 23_15 24_15 25_15 INT_R.BYP_ALT1.EE2END0 17_15 !22_15 !23_15 24_15 !25_15 INT_R.BYP_ALT1.EL1END1 17_15 22_15 !23_15 24_15 25_15 INT_R.BYP_ALT1.ER1END0 16_15 !22_15 23_15 24_15 25_15 -INT_R.BYP_ALT1.GFAN0 20_15 !22_15 !23_15 24_15 !25_15 +INT_R.BYP_ALT1.GFAN0 !00_10 !00_11 !01_09 01_10 01_14 20_15 !22_15 !23_15 24_15 !25_15 INT_R.BYP_ALT1.NE2END1 16_15 !22_15 !23_15 !24_15 25_15 INT_R.BYP_ALT1.NL1END1 18_14 22_15 !23_15 24_15 25_15 INT_R.BYP_ALT1.NN2END1 16_15 !22_15 !23_15 24_15 !25_15