From 0c85b29a9ce60fff7fa7a606e295c794b59a4380 Mon Sep 17 00:00:00 2001
From: Hans Baier <foss@hans-baier.de>
Date: Fri, 31 Jan 2025 04:40:22 +0700
Subject: [PATCH] xc7k70t/tilegrid.json: add bits addresses for GTX

---
 kintex7/xc7k70t/tilegrid.json | 108 ++++++++++++++++++++++++++++++----
 1 file changed, 96 insertions(+), 12 deletions(-)

diff --git a/kintex7/xc7k70t/tilegrid.json b/kintex7/xc7k70t/tilegrid.json
index dda67d1..4a2e14d 100644
--- a/kintex7/xc7k70t/tilegrid.json
+++ b/kintex7/xc7k70t/tilegrid.json
@@ -119551,7 +119551,14 @@
         "type": "DSP_R"
     },
     "GTX_CHANNEL_0_X99Y110": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00001280",
+                "frames": 32,
+                "offset": 12,
+                "words": 6
+            }
+        },
         "clock_region": "X1Y2",
         "grid_x": 99,
         "grid_y": 98,
@@ -119572,7 +119579,14 @@
         "type": "GTX_CHANNEL_0"
     },
     "GTX_CHANNEL_0_X99Y162": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 32,
+                "offset": 12,
+                "words": 6
+            }
+        },
         "clock_region": "X1Y3",
         "grid_x": 99,
         "grid_y": 46,
@@ -119593,7 +119607,14 @@
         "type": "GTX_CHANNEL_0"
     },
     "GTX_CHANNEL_1_X99Y121": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00001280",
+                "frames": 32,
+                "offset": 34,
+                "words": 6
+            }
+        },
         "clock_region": "X1Y2",
         "grid_x": 99,
         "grid_y": 87,
@@ -119614,7 +119635,14 @@
         "type": "GTX_CHANNEL_1"
     },
     "GTX_CHANNEL_1_X99Y173": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 32,
+                "offset": 34,
+                "words": 6
+            }
+        },
         "clock_region": "X1Y3",
         "grid_x": 99,
         "grid_y": 35,
@@ -119635,7 +119663,14 @@
         "type": "GTX_CHANNEL_1"
     },
     "GTX_CHANNEL_2_X99Y139": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00001280",
+                "frames": 32,
+                "offset": 69,
+                "words": 6
+            }
+        },
         "clock_region": "X1Y2",
         "grid_x": 99,
         "grid_y": 69,
@@ -119656,7 +119691,14 @@
         "type": "GTX_CHANNEL_2"
     },
     "GTX_CHANNEL_2_X99Y191": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 32,
+                "offset": 69,
+                "words": 6
+            }
+        },
         "clock_region": "X1Y3",
         "grid_x": 99,
         "grid_y": 17,
@@ -119677,7 +119719,14 @@
         "type": "GTX_CHANNEL_2"
     },
     "GTX_CHANNEL_3_X99Y150": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00001280",
+                "frames": 32,
+                "offset": 91,
+                "words": 6
+            }
+        },
         "clock_region": "X1Y2",
         "grid_x": 99,
         "grid_y": 58,
@@ -119698,7 +119747,14 @@
         "type": "GTX_CHANNEL_3"
     },
     "GTX_CHANNEL_3_X99Y202": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 32,
+                "offset": 91,
+                "words": 6
+            }
+        },
         "clock_region": "X1Y3",
         "grid_x": 99,
         "grid_y": 6,
@@ -119719,7 +119775,14 @@
         "type": "GTX_CHANNEL_3"
     },
     "GTX_COMMON_X99Y127": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00001280",
+                "frames": 32,
+                "offset": 0,
+                "words": 101
+            }
+        },
         "clock_region": "X1Y2",
         "grid_x": 99,
         "grid_y": 81,
@@ -119742,7 +119805,14 @@
         "type": "GTX_COMMON"
     },
     "GTX_COMMON_X99Y179": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 32,
+                "offset": 0,
+                "words": 101
+            }
+        },
         "clock_region": "X1Y3",
         "grid_x": 99,
         "grid_y": 29,
@@ -119999,7 +120069,14 @@
         "type": "GTX_INT_INTERFACE"
     },
     "GTX_INT_INTERFACE_X37Y126": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00001280",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "grid_x": 96,
         "grid_y": 76,
         "pin_functions": {},
@@ -120449,7 +120526,14 @@
         "type": "GTX_INT_INTERFACE"
     },
     "GTX_INT_INTERFACE_X37Y176": {
-        "bits": {},
+        "bits": {
+            "CLB_IO_CLK": {
+                "baseaddr": "0x00021280",
+                "frames": 28,
+                "offset": 51,
+                "words": 2
+            }
+        },
         "grid_x": 96,
         "grid_y": 24,
         "pin_functions": {},