{
    "pips": {},
    "sites": [],
    "tile_type": "HCLK_BRAM",
    "wires": {
        "HCLK_BRAM_CASCADEA_L": null,
        "HCLK_BRAM_CASCADEA_R": null,
        "HCLK_BRAM_CASCADEB_L": null,
        "HCLK_BRAM_CASCADEB_R": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU0": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU1": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU10": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU11": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU12": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU13": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU14": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU2": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU3": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU4": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU5": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU6": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU7": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU8": null,
        "HCLK_BRAM_CASCIN_L_ADDRARDADDRU9": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU0": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU1": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU10": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU11": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU12": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU13": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU14": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU2": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU3": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU4": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU5": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU6": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU7": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU8": null,
        "HCLK_BRAM_CASCIN_L_ADDRBWRADDRU9": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU0": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU1": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU10": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU11": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU12": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU13": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU14": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU2": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU3": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU4": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU5": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU6": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU7": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU8": null,
        "HCLK_BRAM_CASCOUT_L_ADDRARDADDRU9": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU0": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU1": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU10": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU11": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU12": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU13": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU14": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU2": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU3": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU4": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU5": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU6": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU7": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU8": null,
        "HCLK_BRAM_CASCOUT_L_ADDRBWRADDRU9": null,
        "HCLK_BRAM_CK_BUFHCLK0": null,
        "HCLK_BRAM_CK_BUFHCLK1": null,
        "HCLK_BRAM_CK_BUFHCLK10": null,
        "HCLK_BRAM_CK_BUFHCLK11": null,
        "HCLK_BRAM_CK_BUFHCLK2": null,
        "HCLK_BRAM_CK_BUFHCLK3": null,
        "HCLK_BRAM_CK_BUFHCLK4": null,
        "HCLK_BRAM_CK_BUFHCLK5": null,
        "HCLK_BRAM_CK_BUFHCLK6": null,
        "HCLK_BRAM_CK_BUFHCLK7": null,
        "HCLK_BRAM_CK_BUFHCLK8": null,
        "HCLK_BRAM_CK_BUFHCLK9": null,
        "HCLK_BRAM_CK_BUFRCLK0": null,
        "HCLK_BRAM_CK_BUFRCLK1": null,
        "HCLK_BRAM_CK_BUFRCLK2": null,
        "HCLK_BRAM_CK_BUFRCLK3": null,
        "HCLK_BRAM_CK_IN0": null,
        "HCLK_BRAM_CK_IN1": null,
        "HCLK_BRAM_CK_IN10": null,
        "HCLK_BRAM_CK_IN11": null,
        "HCLK_BRAM_CK_IN12": null,
        "HCLK_BRAM_CK_IN13": null,
        "HCLK_BRAM_CK_IN2": null,
        "HCLK_BRAM_CK_IN3": null,
        "HCLK_BRAM_CK_IN4": null,
        "HCLK_BRAM_CK_IN5": null,
        "HCLK_BRAM_CK_IN6": null,
        "HCLK_BRAM_CK_IN7": null,
        "HCLK_BRAM_CK_IN8": null,
        "HCLK_BRAM_CK_IN9": null,
        "HCLK_BRAM_PMVBRAM_O": null,
        "HCLK_BRAM_PMVBRAM_ODIV2": null,
        "HCLK_BRAM_PMVBRAM_ODIV4": null,
        "HCLK_BRAM_PMVBRAM_SELECT1": null,
        "HCLK_BRAM_PMVBRAM_SELECT2": null,
        "HCLK_BRAM_PMVBRAM_SELECT3": null,
        "HCLK_BRAM_PMVBRAM_SELECT4": null
    }
}
