{
    "pips": {
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT0->GTPE2_LOGIC_OUTS_B9_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B9_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT1->GTPE2_LOGIC_OUTS_B9_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B9_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT10->GTPE2_LOGIC_OUTS_B21_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B21_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT10"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT11->GTPE2_LOGIC_OUTS_B21_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B21_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT11"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT12->GTPE2_LOGIC_OUTS_B15_2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B15_2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT12"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT13->GTPE2_LOGIC_OUTS_B1_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B1_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT13"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT14->GTPE2_LOGIC_OUTS_B10_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B10_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT14"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT2->GTPE2_LOGIC_OUTS_B9_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B9_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT2"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT3->GTPE2_LOGIC_OUTS_B9_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B9_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT3"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT4->GTPE2_LOGIC_OUTS_B9_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B9_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT4"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT5->GTPE2_LOGIC_OUTS_B9_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B9_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT5"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT6->GTPE2_LOGIC_OUTS_B9_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B9_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT6"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT7->GTPE2_LOGIC_OUTS_B9_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B9_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT7"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT8->GTPE2_LOGIC_OUTS_B21_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B21_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT8"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DMONITOROUT9->GTPE2_LOGIC_OUTS_B21_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B21_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DMONITOROUT9"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO0->GTPE2_LOGIC_OUTS_B12_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B12_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO1->GTPE2_LOGIC_OUTS_B22_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B22_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO10->GTPE2_LOGIC_OUTS_B2_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B2_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO10"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO11->GTPE2_LOGIC_OUTS_B1_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B1_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO11"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO12->GTPE2_LOGIC_OUTS_B7_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B7_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO12"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO13->GTPE2_LOGIC_OUTS_B15_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B15_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO13"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO14->GTPE2_LOGIC_OUTS_B12_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B12_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO14"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO15->GTPE2_LOGIC_OUTS_B4_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B4_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO15"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO2->GTPE2_LOGIC_OUTS_B4_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B4_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO2"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO3->GTPE2_LOGIC_OUTS_B14_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B14_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO3"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO4->GTPE2_LOGIC_OUTS_B10_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B10_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO4"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO5->GTPE2_LOGIC_OUTS_B12_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B12_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO5"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO6->GTPE2_LOGIC_OUTS_B22_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B22_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO6"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO7->GTPE2_LOGIC_OUTS_B4_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B4_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO7"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO8->GTPE2_LOGIC_OUTS_B12_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B12_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO8"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPDO9->GTPE2_LOGIC_OUTS_B4_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B4_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPDO9"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_DRPRDY->GTPE2_LOGIC_OUTS_B14_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B14_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_DRPRDY"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_EYESCANDATAERROR->GTPE2_LOGIC_OUTS_B18_0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B18_0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_EYESCANDATAERROR"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_GTRXOUTCLK_1->GTPE2_CHANNEL_RXOUTCLK_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOUTCLK_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_GTRXOUTCLK_1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_GTTXOUTCLK_1->GTPE2_CHANNEL_TXOUTCLK_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXOUTCLK_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_GTTXOUTCLK_1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT0->GTPE2_LOGIC_OUTS_B5_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B5_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT1->GTPE2_LOGIC_OUTS_B0_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B0_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT10->GTPE2_LOGIC_OUTS_B13_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B13_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT10"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT11->GTPE2_LOGIC_OUTS_B5_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B5_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT11"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT12->GTPE2_LOGIC_OUTS_B7_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B7_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT12"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT13->GTPE2_LOGIC_OUTS_B9_2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B9_2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT13"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT14->GTPE2_LOGIC_OUTS_B5_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B5_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT14"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT15->GTPE2_LOGIC_OUTS_B15_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B15_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT15"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT2->GTPE2_LOGIC_OUTS_B13_2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B13_2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT2"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT3->GTPE2_LOGIC_OUTS_B13_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B13_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT3"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT4->GTPE2_LOGIC_OUTS_B13_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B13_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT4"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT5->GTPE2_LOGIC_OUTS_B13_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B13_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT5"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT6->GTPE2_LOGIC_OUTS_B13_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B13_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT6"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT7->GTPE2_LOGIC_OUTS_B13_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B13_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT7"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT8->GTPE2_LOGIC_OUTS_B13_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B13_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT8"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PCSRSVDOUT9->GTPE2_LOGIC_OUTS_B13_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B13_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PCSRSVDOUT9"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PHYSTATUS->GTPE2_LOGIC_OUTS_B10_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B10_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PHYSTATUS"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PLLCLK0->GTPE2_CHANNEL_PLL0CLK": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PLL0CLK",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PLLCLK0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PLLCLK1->GTPE2_CHANNEL_PLL1CLK": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PLL1CLK",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PLLCLK1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PLLREFCLK0->GTPE2_CHANNEL_PLL0REFCLK": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PLL0REFCLK",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PLLREFCLK0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PLLREFCLK1->GTPE2_CHANNEL_PLL1REFCLK": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PLL1REFCLK",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PLLREFCLK1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PMARSVDOUT0->GTPE2_LOGIC_OUTS_B15_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B15_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PMARSVDOUT0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_PMARSVDOUT1->GTPE2_LOGIC_OUTS_B7_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B7_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_PMARSVDOUT1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXBUFSTATUS0->GTPE2_LOGIC_OUTS_B23_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B23_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXBUFSTATUS0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXBUFSTATUS1->GTPE2_LOGIC_OUTS_B19_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B19_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXBUFSTATUS1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXBUFSTATUS2->GTPE2_LOGIC_OUTS_B17_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B17_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXBUFSTATUS2"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXBYTEISALIGNED->GTPE2_LOGIC_OUTS_B8_0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B8_0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXBYTEISALIGNED"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXBYTEREALIGN->GTPE2_LOGIC_OUTS_B14_0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B14_0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXBYTEREALIGN"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCDRLOCK->GTPE2_LOGIC_OUTS_B17_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B17_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCDRLOCK"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHANBONDSEQ->GTPE2_LOGIC_OUTS_B8_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B8_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHANBONDSEQ"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHANISALIGNED->GTPE2_LOGIC_OUTS_B18_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B18_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHANISALIGNED"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHANREALIGN->GTPE2_LOGIC_OUTS_B23_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B23_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHANREALIGN"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHARISCOMMA0->GTPE2_LOGIC_OUTS_B15_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B15_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHARISCOMMA0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHARISCOMMA1->GTPE2_LOGIC_OUTS_B15_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B15_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHARISCOMMA1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHARISCOMMA2->GTPE2_LOGIC_OUTS_B15_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B15_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHARISCOMMA2"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHARISCOMMA3->GTPE2_LOGIC_OUTS_B15_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B15_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHARISCOMMA3"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHARISK0->GTPE2_LOGIC_OUTS_B12_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B12_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHARISK0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHARISK1->GTPE2_LOGIC_OUTS_B12_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B12_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHARISK1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHARISK2->GTPE2_LOGIC_OUTS_B12_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B12_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHARISK2"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHARISK3->GTPE2_LOGIC_OUTS_B12_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B12_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHARISK3"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHBONDO0->GTPE2_LOGIC_OUTS_B16_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B16_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHBONDO0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHBONDO1->GTPE2_LOGIC_OUTS_B16_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B16_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHBONDO1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHBONDO2->GTPE2_LOGIC_OUTS_B16_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B16_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHBONDO2"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCHBONDO3->GTPE2_LOGIC_OUTS_B16_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B16_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCHBONDO3"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCLKCORCNT0->GTPE2_LOGIC_OUTS_B11_0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B11_0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCLKCORCNT0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCLKCORCNT1->GTPE2_LOGIC_OUTS_B15_0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B15_0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCLKCORCNT1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCOMINITDET->GTPE2_LOGIC_OUTS_B20_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B20_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCOMINITDET"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCOMMADET->GTPE2_LOGIC_OUTS_B19_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B19_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCOMMADET"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCOMSASDET->GTPE2_LOGIC_OUTS_B18_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B18_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCOMSASDET"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXCOMWAKEDET->GTPE2_LOGIC_OUTS_B12_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B12_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXCOMWAKEDET"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA0->GTPE2_LOGIC_OUTS_B6_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B6_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA1->GTPE2_LOGIC_OUTS_B2_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B2_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA10->GTPE2_LOGIC_OUTS_B4_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B4_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA10"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA11->GTPE2_LOGIC_OUTS_B0_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B0_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA11"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA12->GTPE2_LOGIC_OUTS_B3_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B3_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA12"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA13->GTPE2_LOGIC_OUTS_B7_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B7_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA13"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA14->GTPE2_LOGIC_OUTS_B1_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B1_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA14"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA15->GTPE2_LOGIC_OUTS_B5_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B5_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA15"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA16->GTPE2_LOGIC_OUTS_B6_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B6_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA16"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA17->GTPE2_LOGIC_OUTS_B2_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B2_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA17"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA18->GTPE2_LOGIC_OUTS_B4_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B4_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA18"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA19->GTPE2_LOGIC_OUTS_B0_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B0_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA19"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA2->GTPE2_LOGIC_OUTS_B4_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B4_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA2"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA20->GTPE2_LOGIC_OUTS_B3_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B3_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA20"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA21->GTPE2_LOGIC_OUTS_B7_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B7_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA21"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA22->GTPE2_LOGIC_OUTS_B1_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B1_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA22"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA23->GTPE2_LOGIC_OUTS_B5_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B5_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA23"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA24->GTPE2_LOGIC_OUTS_B6_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B6_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA24"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA25->GTPE2_LOGIC_OUTS_B2_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B2_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA25"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA26->GTPE2_LOGIC_OUTS_B4_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B4_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA26"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA27->GTPE2_LOGIC_OUTS_B0_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B0_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA27"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA28->GTPE2_LOGIC_OUTS_B3_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B3_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA28"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA29->GTPE2_LOGIC_OUTS_B7_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B7_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA29"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA3->GTPE2_LOGIC_OUTS_B0_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B0_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA3"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA30->GTPE2_LOGIC_OUTS_B1_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B1_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA30"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA31->GTPE2_LOGIC_OUTS_B5_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B5_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA31"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA4->GTPE2_LOGIC_OUTS_B3_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B3_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA4"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA5->GTPE2_LOGIC_OUTS_B7_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B7_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA5"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA6->GTPE2_LOGIC_OUTS_B1_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B1_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA6"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA7->GTPE2_LOGIC_OUTS_B5_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B5_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA7"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA8->GTPE2_LOGIC_OUTS_B6_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B6_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA8"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATA9->GTPE2_LOGIC_OUTS_B2_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B2_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATA9"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATAVALID0->GTPE2_LOGIC_OUTS_B13_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B13_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATAVALID0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDATAVALID1->GTPE2_LOGIC_OUTS_B5_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B5_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDATAVALID1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDISPERR0->GTPE2_LOGIC_OUTS_B22_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B22_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDISPERR0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDISPERR1->GTPE2_LOGIC_OUTS_B22_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B22_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDISPERR1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDISPERR2->GTPE2_LOGIC_OUTS_B22_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B22_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDISPERR2"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDISPERR3->GTPE2_LOGIC_OUTS_B22_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B22_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDISPERR3"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXDLYSRESETDONE->GTPE2_LOGIC_OUTS_B12_0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B12_0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXDLYSRESETDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXELECIDLE->GTPE2_LOGIC_OUTS_B19_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B19_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXELECIDLE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXHEADER0->GTPE2_LOGIC_OUTS_B19_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B19_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXHEADER0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXHEADER1->GTPE2_LOGIC_OUTS_B23_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B23_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXHEADER1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXHEADER2->GTPE2_LOGIC_OUTS_B17_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B17_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXHEADER2"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXHEADERVALID->GTPE2_LOGIC_OUTS_B14_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B14_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXHEADERVALID"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXNOTINTABLE0->GTPE2_LOGIC_OUTS_B14_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B14_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXNOTINTABLE0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXNOTINTABLE1->GTPE2_LOGIC_OUTS_B14_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B14_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXNOTINTABLE1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXNOTINTABLE2->GTPE2_LOGIC_OUTS_B14_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B14_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXNOTINTABLE2"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXNOTINTABLE3->GTPE2_LOGIC_OUTS_B14_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B14_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXNOTINTABLE3"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXN_PAD->GTPE2_CHANNEL_RXN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXN_PAD"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXOSINTDONE->GTPE2_LOGIC_OUTS_B3_6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B3_6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXOSINTDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXOSINTSTARTED->GTPE2_LOGIC_OUTS_B6_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B6_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXOSINTSTARTED"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXOSINTSTROBEDONE->GTPE2_LOGIC_OUTS_B0_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B0_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXOSINTSTROBEDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXOSINTSTROBESTARTED->GTPE2_LOGIC_OUTS_B0_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B0_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXOSINTSTROBESTARTED"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXOUTCLKFABRIC->GTPE2_LOGIC_OUTS_B22_0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B22_0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXOUTCLKFABRIC"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXOUTCLKPCS->GTPE2_LOGIC_OUTS_B22_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B22_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXOUTCLKPCS"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXPHALIGNDONE->GTPE2_LOGIC_OUTS_B18_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B18_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXPHALIGNDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXPHMONITOR0->GTPE2_LOGIC_OUTS_B16_0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B16_0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXPHMONITOR0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXPHMONITOR1->GTPE2_LOGIC_OUTS_B10_0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B10_0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXPHMONITOR1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXPHMONITOR2->GTPE2_LOGIC_OUTS_B7_2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B7_2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXPHMONITOR2"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXPHMONITOR3->GTPE2_LOGIC_OUTS_B3_2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B3_2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXPHMONITOR3"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXPHMONITOR4->GTPE2_LOGIC_OUTS_B17_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B17_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXPHMONITOR4"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXPHSLIPMONITOR0->GTPE2_LOGIC_OUTS_B13_0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B13_0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXPHSLIPMONITOR0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXPHSLIPMONITOR1->GTPE2_LOGIC_OUTS_B19_0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B19_0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXPHSLIPMONITOR1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXPHSLIPMONITOR2->GTPE2_LOGIC_OUTS_B9_0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B9_0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXPHSLIPMONITOR2"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXPHSLIPMONITOR3->GTPE2_LOGIC_OUTS_B6_2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B6_2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXPHSLIPMONITOR3"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXPHSLIPMONITOR4->GTPE2_LOGIC_OUTS_B16_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B16_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXPHSLIPMONITOR4"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXPMARESETDONE->GTPE2_LOGIC_OUTS_B12_2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B12_2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXPMARESETDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXPRBSERR->GTPE2_LOGIC_OUTS_B16_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B16_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXPRBSERR"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXP_PAD->GTPE2_CHANNEL_RXP": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXP",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXP_PAD"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXRATEDONE->GTPE2_LOGIC_OUTS_B23_5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B23_5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXRATEDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXRESETDONE->GTPE2_LOGIC_OUTS_B18_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B18_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXRESETDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXSTARTOFSEQ0->GTPE2_LOGIC_OUTS_B18_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B18_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXSTARTOFSEQ0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXSTARTOFSEQ1->GTPE2_LOGIC_OUTS_B11_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B11_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXSTARTOFSEQ1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXSTATUS0->GTPE2_LOGIC_OUTS_B21_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B21_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXSTATUS0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXSTATUS1->GTPE2_LOGIC_OUTS_B17_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B17_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXSTATUS1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXSTATUS2->GTPE2_LOGIC_OUTS_B23_8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B23_8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXSTATUS2"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXSYNCDONE->GTPE2_LOGIC_OUTS_B14_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B14_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXSYNCDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXSYNCOUT->GTPE2_LOGIC_OUTS_B10_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B10_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXSYNCOUT"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_RXVALID->GTPE2_LOGIC_OUTS_B20_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B20_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_RXVALID"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXBUFSTATUS0->GTPE2_LOGIC_OUTS_B17_2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B17_2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXBUFSTATUS0"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXBUFSTATUS1->GTPE2_LOGIC_OUTS_B20_0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B20_0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXBUFSTATUS1"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXCOMFINISH->GTPE2_LOGIC_OUTS_B23_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B23_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXCOMFINISH"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXDLYSRESETDONE->GTPE2_LOGIC_OUTS_B17_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B17_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXDLYSRESETDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXGEARBOXREADY->GTPE2_LOGIC_OUTS_B23_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B23_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXGEARBOXREADY"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXN->GTPE2_CHANNEL_TXN_PAD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXN_PAD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXN"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXOUTCLKFABRIC->GTPE2_LOGIC_OUTS_B15_1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B15_1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXOUTCLKFABRIC"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXOUTCLKPCS->GTPE2_LOGIC_OUTS_B17_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B17_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXOUTCLKPCS"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXP->GTPE2_CHANNEL_TXP_PAD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXP_PAD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXP"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXPHALIGNDONE->GTPE2_LOGIC_OUTS_B18_3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B18_3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXPHALIGNDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXPHINITDONE->GTPE2_LOGIC_OUTS_B1_10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B1_10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXPHINITDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXPMARESETDONE->GTPE2_LOGIC_OUTS_B14_2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B14_2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXPMARESETDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXRATEDONE->GTPE2_LOGIC_OUTS_B20_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B20_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXRATEDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXRESETDONE->GTPE2_LOGIC_OUTS_B16_4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B16_4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXRESETDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXSYNCDONE->GTPE2_LOGIC_OUTS_B22_9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B22_9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXSYNCDONE"
        },
        "GTP_CHANNEL_1.GTPE2_CHANNEL_TXSYNCOUT->GTPE2_LOGIC_OUTS_B14_7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_LOGIC_OUTS_B14_7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CHANNEL_TXSYNCOUT"
        },
        "GTP_CHANNEL_1.GTPE2_CLK0_4->GTPE2_CHANNEL_TXUSRCLK": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXUSRCLK",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CLK0_4"
        },
        "GTP_CHANNEL_1.GTPE2_CLK0_5->GTPE2_CHANNEL_TXUSRCLK2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXUSRCLK2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CLK0_5"
        },
        "GTP_CHANNEL_1.GTPE2_CLK0_6->GTPE2_CHANNEL_RXUSRCLK": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXUSRCLK",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CLK0_6"
        },
        "GTP_CHANNEL_1.GTPE2_CLK0_7->GTPE2_CHANNEL_RXUSRCLK2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXUSRCLK2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CLK0_7"
        },
        "GTP_CHANNEL_1.GTPE2_CLK0_9->GTPE2_CHANNEL_DRPCLK": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPCLK",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CLK0_9"
        },
        "GTP_CHANNEL_1.GTPE2_CLK1_2->GTPE2_CHANNEL_TXPHDLYTSTCLK": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPHDLYTSTCLK",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CLK1_2"
        },
        "GTP_CHANNEL_1.GTPE2_CLK1_4->GTPE2_CHANNEL_SIGVALIDCLK": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_SIGVALIDCLK",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CLK1_4"
        },
        "GTP_CHANNEL_1.GTPE2_CLK1_5->GTPE2_CHANNEL_DMONITORCLK": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DMONITORCLK",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CLK1_5"
        },
        "GTP_CHANNEL_1.GTPE2_CLK1_7->GTPE2_CHANNEL_CLKRSVD0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_CLKRSVD0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CLK1_7"
        },
        "GTP_CHANNEL_1.GTPE2_CLK1_8->GTPE2_CHANNEL_CLKRSVD1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_CLKRSVD1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CLK1_8"
        },
        "GTP_CHANNEL_1.GTPE2_CTRL0_10->GTPE2_CHANNEL_GTRESETSEL": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRESETSEL",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CTRL0_10"
        },
        "GTP_CHANNEL_1.GTPE2_CTRL0_5->GTPE2_CHANNEL_GTTXRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTTXRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CTRL0_5"
        },
        "GTP_CHANNEL_1.GTPE2_CTRL0_6->GTPE2_CHANNEL_RXDLYSRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXDLYSRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CTRL0_6"
        },
        "GTP_CHANNEL_1.GTPE2_CTRL0_7->GTPE2_CHANNEL_RXCDRFREQRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCDRFREQRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CTRL0_7"
        },
        "GTP_CHANNEL_1.GTPE2_CTRL0_8->GTPE2_CHANNEL_GTRXRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRXRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CTRL0_8"
        },
        "GTP_CHANNEL_1.GTPE2_CTRL0_9->GTPE2_CHANNEL_RXLPMRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXLPMRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CTRL0_9"
        },
        "GTP_CHANNEL_1.GTPE2_CTRL1_10->GTPE2_CHANNEL_RXOOBRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOOBRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CTRL1_10"
        },
        "GTP_CHANNEL_1.GTPE2_CTRL1_3->GTPE2_CHANNEL_TXPMARESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPMARESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CTRL1_3"
        },
        "GTP_CHANNEL_1.GTPE2_CTRL1_4->GTPE2_CHANNEL_RXPHDLYRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPHDLYRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CTRL1_4"
        },
        "GTP_CHANNEL_1.GTPE2_CTRL1_5->GTPE2_CHANNEL_CFGRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_CFGRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CTRL1_5"
        },
        "GTP_CHANNEL_1.GTPE2_CTRL1_6->GTPE2_CHANNEL_RXBUFRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXBUFRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CTRL1_6"
        },
        "GTP_CHANNEL_1.GTPE2_CTRL1_7->GTPE2_CHANNEL_RXPMARESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPMARESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CTRL1_7"
        },
        "GTP_CHANNEL_1.GTPE2_CTRL1_8->GTPE2_CHANNEL_RXCDRRESETRSV": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCDRRESETRSV",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CTRL1_8"
        },
        "GTP_CHANNEL_1.GTPE2_CTRL1_9->GTPE2_CHANNEL_RXCDRRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCDRRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_CTRL1_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX0_10->GTPE2_CHANNEL_RXELECIDLEMODE0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXELECIDLEMODE0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX0_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX0_2->GTPE2_CHANNEL_TX8B10BEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TX8B10BEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX0_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX0_3->GTPE2_CHANNEL_TXMAINCURSOR3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXMAINCURSOR3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX0_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX0_7->GTPE2_CHANNEL_RXADAPTSELTEST0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXADAPTSELTEST0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX0_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX0_8->GTPE2_CHANNEL_RXADAPTSELTEST10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXADAPTSELTEST10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX0_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX0_9->GTPE2_CHANNEL_RXOSINTOVRDEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTOVRDEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX0_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX10_10->GTPE2_CHANNEL_RXOSINTID02": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTID02",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX10_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX10_3->GTPE2_CHANNEL_TXPIPPMOVRDEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPIPPMOVRDEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX10_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX10_6->GTPE2_CHANNEL_DRPDI1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX10_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX10_7->GTPE2_CHANNEL_TXBUFDIFFCTRL2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXBUFDIFFCTRL2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX10_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX10_9->GTPE2_CHANNEL_PMARSVDIN2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PMARSVDIN2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX10_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX11_10->GTPE2_CHANNEL_RXOSINTID03": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTID03",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX11_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX11_3->GTPE2_CHANNEL_TXRATEMODE": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXRATEMODE",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX11_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX11_5->GTPE2_CHANNEL_TXDLYHOLD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDLYHOLD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX11_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX11_6->GTPE2_CHANNEL_RXRATE2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXRATE2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX11_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX11_7->GTPE2_CHANNEL_RXADAPTSELTEST9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXADAPTSELTEST9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX11_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX12_3->GTPE2_CHANNEL_TXCHARDISPMODE3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCHARDISPMODE3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX12_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX12_5->GTPE2_CHANNEL_TXDLYOVRDEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDLYOVRDEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX12_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX12_7->GTPE2_CHANNEL_TXBUFDIFFCTRL0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXBUFDIFFCTRL0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX12_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX13_0->GTPE2_CHANNEL_TXSYNCMODE": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXSYNCMODE",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX13_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX13_10->GTPE2_CHANNEL_RXPRBSCNTRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPRBSCNTRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX13_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX13_4->GTPE2_CHANNEL_TSTIN10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX13_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX13_6->GTPE2_CHANNEL_DRPDI2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX13_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX13_7->GTPE2_CHANNEL_TXBUFDIFFCTRL1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXBUFDIFFCTRL1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX13_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX13_8->GTPE2_CHANNEL_RXOSOVRDEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSOVRDEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX13_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX13_9->GTPE2_CHANNEL_TXPIPPMSTEPSIZE2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPIPPMSTEPSIZE2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX13_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX14_0->GTPE2_CHANNEL_TXPDELECIDLEMODE": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPDELECIDLEMODE",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX14_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX14_1->GTPE2_CHANNEL_TXPRBSFORCEERR": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPRBSFORCEERR",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX14_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX14_10->GTPE2_CHANNEL_RXPHOVRDEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPHOVRDEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX14_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX14_5->GTPE2_CHANNEL_TXDLYEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDLYEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX14_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX14_6->GTPE2_CHANNEL_RXRATE1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXRATE1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX14_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX14_8->GTPE2_CHANNEL_RXCDROVRDEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCDROVRDEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX14_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX14_9->GTPE2_CHANNEL_RXPHALIGN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPHALIGN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX14_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX15_10->GTPE2_CHANNEL_RXOSINTID00": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTID00",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX15_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX15_3->GTPE2_CHANNEL_TX8B10BBYPASS2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TX8B10BBYPASS2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX15_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX15_5->GTPE2_CHANNEL_TX8B10BBYPASS1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TX8B10BBYPASS1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX15_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX15_6->GTPE2_CHANNEL_RXRATE0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXRATE0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX15_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX15_7->GTPE2_CHANNEL_TX8B10BBYPASS0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TX8B10BBYPASS0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX15_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX15_9->GTPE2_CHANNEL_RXOSINTEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX15_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX16_0->GTPE2_CHANNEL_TXSEQUENCE5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXSEQUENCE5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX16_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX16_1->GTPE2_CHANNEL_TXDATA28": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA28",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX16_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX16_10->GTPE2_CHANNEL_DRPDI15": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI15",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX16_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX16_2->GTPE2_CHANNEL_TXDATA20": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA20",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX16_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX16_4->GTPE2_CHANNEL_TXDATA12": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA12",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX16_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX16_6->GTPE2_CHANNEL_TXDATA4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX16_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX17_1->GTPE2_CHANNEL_TXDATA29": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA29",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX17_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX17_10->GTPE2_CHANNEL_DRPDI14": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI14",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX17_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX17_2->GTPE2_CHANNEL_TXDATA21": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA21",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX17_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX17_4->GTPE2_CHANNEL_TXDATA13": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA13",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX17_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX17_6->GTPE2_CHANNEL_TXDATA5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX17_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX17_8->GTPE2_CHANNEL_RXADAPTSELTEST11": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXADAPTSELTEST11",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX17_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX17_9->GTPE2_CHANNEL_RXCHBONDEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCHBONDEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX17_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX18_3->GTPE2_CHANNEL_TXDATA16": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA16",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX18_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX18_5->GTPE2_CHANNEL_TXDATA8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX18_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX18_7->GTPE2_CHANNEL_TXDATA0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX18_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX18_9->GTPE2_CHANNEL_RXCHBONDI0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCHBONDI0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX18_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX19_3->GTPE2_CHANNEL_TXDATA17": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA17",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX19_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX19_5->GTPE2_CHANNEL_TXDATA9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX19_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX19_7->GTPE2_CHANNEL_TXDATA1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX19_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX19_9->GTPE2_CHANNEL_RXCHBONDI1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCHBONDI1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX19_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX1_0->GTPE2_CHANNEL_RXCHBONDLEVEL0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCHBONDLEVEL0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX1_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX1_10->GTPE2_CHANNEL_RXELECIDLEMODE1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXELECIDLEMODE1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX1_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX1_3->GTPE2_CHANNEL_TXMAINCURSOR2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXMAINCURSOR2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX1_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX1_4->GTPE2_CHANNEL_TXMAINCURSOR6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXMAINCURSOR6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX1_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX1_7->GTPE2_CHANNEL_RXADAPTSELTEST1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXADAPTSELTEST1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX1_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX1_8->GTPE2_CHANNEL_TXOUTCLKSEL2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXOUTCLKSEL2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX1_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX1_9->GTPE2_CHANNEL_RXOSINTHOLD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTHOLD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX1_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX20_1->GTPE2_CHANNEL_TXDATA30": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA30",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX20_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX20_2->GTPE2_CHANNEL_TXDATA22": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA22",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX20_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX20_4->GTPE2_CHANNEL_TXDATA14": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA14",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX20_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX20_6->GTPE2_CHANNEL_TXDATA6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX20_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX21_1->GTPE2_CHANNEL_TXDATA31": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA31",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX21_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX21_2->GTPE2_CHANNEL_TXDATA23": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA23",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX21_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX21_4->GTPE2_CHANNEL_TXDATA15": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA15",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX21_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX21_6->GTPE2_CHANNEL_TXDATA7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX21_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX21_8->GTPE2_CHANNEL_RXADAPTSELTEST13": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXADAPTSELTEST13",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX21_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX22_3->GTPE2_CHANNEL_TXDATA18": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA18",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX22_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX22_5->GTPE2_CHANNEL_TXDATA10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX22_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX22_6->GTPE2_CHANNEL_TXPIPPMSTEPSIZE4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPIPPMSTEPSIZE4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX22_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX22_7->GTPE2_CHANNEL_TXDATA2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX22_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX22_8->GTPE2_CHANNEL_RXPRBSSEL0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPRBSSEL0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX22_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX22_9->GTPE2_CHANNEL_RXCHBONDI2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCHBONDI2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX22_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX23_3->GTPE2_CHANNEL_TXDATA19": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA19",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX23_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX23_5->GTPE2_CHANNEL_TXDATA11": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA11",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX23_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX23_7->GTPE2_CHANNEL_TXDATA3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX23_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX23_8->GTPE2_CHANNEL_RXPRBSSEL2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPRBSSEL2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX23_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX23_9->GTPE2_CHANNEL_RXCHBONDI3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCHBONDI3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX23_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX24_10->GTPE2_CHANNEL_TSTIN19": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN19",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX24_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX24_2->GTPE2_CHANNEL_TSTIN11": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN11",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX24_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX24_3->GTPE2_CHANNEL_TSTIN12": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN12",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX24_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX24_4->GTPE2_CHANNEL_TSTIN13": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN13",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX24_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX24_5->GTPE2_CHANNEL_TSTIN14": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN14",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX24_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX24_6->GTPE2_CHANNEL_TSTIN15": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN15",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX24_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX24_7->GTPE2_CHANNEL_TSTIN16": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN16",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX24_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX24_8->GTPE2_CHANNEL_TSTIN17": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN17",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX24_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX24_9->GTPE2_CHANNEL_TSTIN18": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN18",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX24_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX25_10->GTPE2_CHANNEL_PCSRSVDIN7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX25_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX25_2->GTPE2_CHANNEL_TXPHALIGN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPHALIGN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX25_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX25_3->GTPE2_CHANNEL_PCSRSVDIN0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX25_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX25_4->GTPE2_CHANNEL_PCSRSVDIN1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX25_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX25_5->GTPE2_CHANNEL_PCSRSVDIN2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX25_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX25_6->GTPE2_CHANNEL_PCSRSVDIN3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX25_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX25_7->GTPE2_CHANNEL_PCSRSVDIN4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX25_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX25_8->GTPE2_CHANNEL_PCSRSVDIN5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX25_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX25_9->GTPE2_CHANNEL_PCSRSVDIN6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX25_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX26_10->GTPE2_CHANNEL_GTRSVD15": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD15",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX26_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX26_3->GTPE2_CHANNEL_GTRSVD8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX26_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX26_4->GTPE2_CHANNEL_GTRSVD9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX26_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX26_5->GTPE2_CHANNEL_GTRSVD10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX26_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX26_6->GTPE2_CHANNEL_GTRSVD11": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD11",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX26_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX26_7->GTPE2_CHANNEL_GTRSVD12": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD12",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX26_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX26_8->GTPE2_CHANNEL_GTRSVD13": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD13",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX26_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX26_9->GTPE2_CHANNEL_GTRSVD14": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD14",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX26_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX27_0->GTPE2_CHANNEL_TXSEQUENCE3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXSEQUENCE3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX27_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX27_1->GTPE2_CHANNEL_TXSEQUENCE1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXSEQUENCE1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX27_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX27_10->GTPE2_CHANNEL_RXLPMHFOVRDEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXLPMHFOVRDEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX27_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX27_5->GTPE2_CHANNEL_TXPHINIT": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPHINIT",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX27_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX27_7->GTPE2_CHANNEL_RXPOLARITY": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPOLARITY",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX27_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX27_8->GTPE2_CHANNEL_TXCOMSAS": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCOMSAS",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX27_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX28_10->GTPE2_CHANNEL_RXOSINTID01": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTID01",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX28_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX28_3->GTPE2_CHANNEL_DRPWE": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPWE",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX28_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX28_4->GTPE2_CHANNEL_TXSYSCLKSEL1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXSYSCLKSEL1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX28_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX28_5->GTPE2_CHANNEL_TXSYSCLKSEL0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXSYSCLKSEL0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX28_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX28_6->GTPE2_CHANNEL_RXDLYEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXDLYEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX28_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX28_8->GTPE2_CHANNEL_RXPD1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPD1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX28_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX29_10->GTPE2_CHANNEL_TXDATA27": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA27",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX29_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX29_2->GTPE2_CHANNEL_TXCHARDISPMODE2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCHARDISPMODE2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX29_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX29_4->GTPE2_CHANNEL_TXCHARDISPMODE1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCHARDISPMODE1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX29_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX29_6->GTPE2_CHANNEL_TXCHARDISPMODE0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCHARDISPMODE0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX29_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX29_7->GTPE2_CHANNEL_RXADAPTSELTEST8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXADAPTSELTEST8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX29_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX29_8->GTPE2_CHANNEL_RXOSHOLD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSHOLD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX29_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX2_0->GTPE2_CHANNEL_EYESCANMODE": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_EYESCANMODE",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX2_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX2_1->GTPE2_CHANNEL_TXCOMINIT": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCOMINIT",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX2_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX2_10->GTPE2_CHANNEL_RXOUTCLKSEL2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOUTCLKSEL2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX2_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX2_3->GTPE2_CHANNEL_DRPADDR8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPADDR8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX2_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX2_4->GTPE2_CHANNEL_TXPOSTCURSOR3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPOSTCURSOR3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX2_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX2_5->GTPE2_CHANNEL_TXDIFFCTRL3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDIFFCTRL3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX2_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX2_6->GTPE2_CHANNEL_TXPRECURSOR3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPRECURSOR3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX2_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX2_7->GTPE2_CHANNEL_RXRATEMODE": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXRATEMODE",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX2_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX30_10->GTPE2_CHANNEL_RXCHBONDSLAVE": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCHBONDSLAVE",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX30_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX30_3->GTPE2_CHANNEL_TXPOLARITY": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPOLARITY",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX30_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX30_6->GTPE2_CHANNEL_TXPOSTCURSORINV": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPOSTCURSORINV",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX30_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX30_7->GTPE2_CHANNEL_RXPD0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPD0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX30_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX30_8->GTPE2_CHANNEL_RXCDRHOLD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCDRHOLD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX30_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX30_9->GTPE2_CHANNEL_RXCHBONDMASTER": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCHBONDMASTER",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX30_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX31_0->GTPE2_CHANNEL_TXUSERRDY": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXUSERRDY",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX31_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX31_1->GTPE2_CHANNEL_TXHEADER1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXHEADER1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX31_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX31_3->GTPE2_CHANNEL_TXCHARISK2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCHARISK2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX31_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX31_4->GTPE2_CHANNEL_TX8B10BBYPASS3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TX8B10BBYPASS3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX31_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX31_5->GTPE2_CHANNEL_TXCHARISK1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCHARISK1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX31_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX31_7->GTPE2_CHANNEL_TXCHARISK0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCHARISK0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX31_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX31_8->GTPE2_CHANNEL_EYESCANTRIGGER": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_EYESCANTRIGGER",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX31_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX32_2->GTPE2_CHANNEL_TXINHIBIT": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXINHIBIT",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX32_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX32_5->GTPE2_CHANNEL_DRPDI11": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI11",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX32_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX32_6->GTPE2_CHANNEL_DRPDI3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX32_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX32_7->GTPE2_CHANNEL_TXPRECURSORINV": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPRECURSORINV",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX32_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX32_8->GTPE2_CHANNEL_RXDLYBYPASS": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXDLYBYPASS",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX32_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX32_9->GTPE2_CHANNEL_RXOSINTSTROBE": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTSTROBE",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX32_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX33_2->GTPE2_CHANNEL_TXPHALIGNEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPHALIGNEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX33_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX33_5->GTPE2_CHANNEL_DRPDI10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX33_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX34_2->GTPE2_CHANNEL_DRPADDR3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPADDR3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX34_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX34_3->GTPE2_CHANNEL_DRPADDR7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPADDR7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX34_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX34_4->GTPE2_CHANNEL_SETERRSTATUS": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_SETERRSTATUS",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX34_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX34_6->GTPE2_CHANNEL_DRPDI8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX34_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX34_7->GTPE2_CHANNEL_RXADAPTSELTEST4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXADAPTSELTEST4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX34_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX35_0->GTPE2_CHANNEL_TXSEQUENCE2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXSEQUENCE2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX35_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX35_1->GTPE2_CHANNEL_TXSEQUENCE0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXSEQUENCE0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX35_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX35_10->GTPE2_CHANNEL_RXOSINTCFG2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTCFG2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX35_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX35_2->GTPE2_CHANNEL_DRPADDR2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPADDR2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX35_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX35_3->GTPE2_CHANNEL_DRPADDR6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPADDR6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX35_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX35_4->GTPE2_CHANNEL_TXMARGIN2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXMARGIN2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX35_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX35_5->GTPE2_CHANNEL_TXDEEMPH": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDEEMPH",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX35_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX35_6->GTPE2_CHANNEL_TXPD1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPD1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX35_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX35_8->GTPE2_CHANNEL_TXPIPPMSTEPSIZE3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPIPPMSTEPSIZE3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX35_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX36_10->GTPE2_CHANNEL_DRPDI13": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI13",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX36_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX36_2->GTPE2_CHANNEL_RXSYNCALLIN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXSYNCALLIN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX36_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX36_5->GTPE2_CHANNEL_TXPHDLYRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPHDLYRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX36_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX36_7->GTPE2_CHANNEL_RXOSINTNTRLEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTNTRLEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX36_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX36_8->GTPE2_CHANNEL_RXADAPTSELTEST12": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXADAPTSELTEST12",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX36_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX37_10->GTPE2_CHANNEL_DRPDI12": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI12",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX37_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX37_3->GTPE2_CHANNEL_TXPHDLYPD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPHDLYPD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX37_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX37_4->GTPE2_CHANNEL_TXDIFFPD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDIFFPD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX37_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX37_7->GTPE2_CHANNEL_PMARSVDIN1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PMARSVDIN1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX37_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX37_8->GTPE2_CHANNEL_PMARSVDIN0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PMARSVDIN0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX37_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX38_10->GTPE2_CHANNEL_RXOSINTCFG0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTCFG0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX38_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX38_2->GTPE2_CHANNEL_DRPADDR1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPADDR1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX38_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX38_3->GTPE2_CHANNEL_DRPADDR5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPADDR5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX38_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX38_4->GTPE2_CHANNEL_TXMARGIN1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXMARGIN1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX38_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX38_5->GTPE2_CHANNEL_TXSWING": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXSWING",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX38_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX38_6->GTPE2_CHANNEL_TXPD0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPD0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX38_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX38_8->GTPE2_CHANNEL_RXPRBSSEL1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPRBSSEL1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX38_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX38_9->GTPE2_CHANNEL_DRPDI5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX38_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX39_0->GTPE2_CHANNEL_TXHEADER2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXHEADER2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX39_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX39_1->GTPE2_CHANNEL_TXHEADER0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXHEADER0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX39_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX39_2->GTPE2_CHANNEL_DRPADDR0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPADDR0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX39_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX39_3->GTPE2_CHANNEL_DRPADDR4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPADDR4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX39_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX39_4->GTPE2_CHANNEL_TXMARGIN0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXMARGIN0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX39_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX39_5->GTPE2_CHANNEL_TXDETECTRX": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDETECTRX",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX39_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX39_6->GTPE2_CHANNEL_TXELECIDLE": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXELECIDLE",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX39_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX3_0->GTPE2_CHANNEL_RXOSINTPD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTPD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX3_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX3_1->GTPE2_CHANNEL_TXCOMWAKE": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCOMWAKE",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX3_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX3_10->GTPE2_CHANNEL_RXLPMLFOVRDEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXLPMLFOVRDEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX3_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX3_2->GTPE2_CHANNEL_PMARSVDIN4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PMARSVDIN4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX3_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX3_3->GTPE2_CHANNEL_TXSTARTSEQ": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXSTARTSEQ",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX3_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX3_4->GTPE2_CHANNEL_TXPOSTCURSOR2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPOSTCURSOR2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX3_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX3_5->GTPE2_CHANNEL_TXDIFFCTRL2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDIFFCTRL2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX3_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX3_6->GTPE2_CHANNEL_TXPRECURSOR2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPRECURSOR2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX3_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX3_8->GTPE2_CHANNEL_TXPRBSSEL0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPRBSSEL0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX3_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX3_9->GTPE2_CHANNEL_DRPDI7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX3_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX40_0->GTPE2_CHANNEL_RXSYNCMODE": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXSYNCMODE",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX40_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX40_1->GTPE2_CHANNEL_RXPCOMMAALIGNEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPCOMMAALIGNEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX40_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX40_10->GTPE2_CHANNEL_TSTIN9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX40_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX40_2->GTPE2_CHANNEL_TSTIN1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX40_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX40_3->GTPE2_CHANNEL_TSTIN2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX40_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX40_4->GTPE2_CHANNEL_TSTIN3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX40_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX40_5->GTPE2_CHANNEL_TSTIN4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX40_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX40_6->GTPE2_CHANNEL_TSTIN5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX40_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX40_7->GTPE2_CHANNEL_TSTIN6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX40_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX40_8->GTPE2_CHANNEL_TSTIN7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX40_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX40_9->GTPE2_CHANNEL_TSTIN8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX40_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX41_0->GTPE2_CHANNEL_RXDLYOVRDEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXDLYOVRDEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX41_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX41_1->GTPE2_CHANNEL_RXMCOMMAALIGNEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXMCOMMAALIGNEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX41_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX41_10->GTPE2_CHANNEL_TXDATA25": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA25",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX41_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX41_5->GTPE2_CHANNEL_RESETOVRD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RESETOVRD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX41_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX41_6->GTPE2_CHANNEL_RXPHALIGNEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPHALIGNEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX41_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX41_7->GTPE2_CHANNEL_RXADAPTSELTEST6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXADAPTSELTEST6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX41_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX41_9->GTPE2_CHANNEL_TXPIPPMSTEPSIZE1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPIPPMSTEPSIZE1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX41_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX42_0->GTPE2_CHANNEL_TXPIPPMEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPIPPMEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX42_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX42_1->GTPE2_CHANNEL_RXSLIDE": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXSLIDE",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX42_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX42_10->GTPE2_CHANNEL_GTRSVD7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX42_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX42_2->GTPE2_CHANNEL_RXSYSCLKSEL1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXSYSCLKSEL1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX42_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX42_3->GTPE2_CHANNEL_GTRSVD0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX42_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX42_4->GTPE2_CHANNEL_GTRSVD1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX42_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX42_5->GTPE2_CHANNEL_GTRSVD2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX42_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX42_6->GTPE2_CHANNEL_GTRSVD3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX42_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX42_7->GTPE2_CHANNEL_GTRSVD4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX42_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX42_8->GTPE2_CHANNEL_GTRSVD5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX42_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX42_9->GTPE2_CHANNEL_GTRSVD6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_GTRSVD6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX42_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX43_10->GTPE2_CHANNEL_RXLPMHFHOLD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXLPMHFHOLD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX43_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX43_5->GTPE2_CHANNEL_TXDLYUPDOWN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDLYUPDOWN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX43_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX43_6->GTPE2_CHANNEL_TXRATE2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXRATE2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX43_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX43_9->GTPE2_CHANNEL_LOOPBACK0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_LOOPBACK0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX43_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX44_0->GTPE2_CHANNEL_TXPHOVRDEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPHOVRDEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX44_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX44_1->GTPE2_CHANNEL_DMONFIFORESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DMONFIFORESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX44_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX44_10->GTPE2_CHANNEL_TXDATA26": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA26",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX44_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX44_2->GTPE2_CHANNEL_TXSYNCALLIN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXSYNCALLIN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX44_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX44_3->GTPE2_CHANNEL_DRPEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX44_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX44_5->GTPE2_CHANNEL_TXDLYBYPASS": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDLYBYPASS",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX44_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX44_7->GTPE2_CHANNEL_RXADAPTSELTEST7": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXADAPTSELTEST7",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX44_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX44_9->GTPE2_CHANNEL_RXCOMMADETEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCOMMADETEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX44_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX45_0->GTPE2_CHANNEL_RXDFEXYDEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXDFEXYDEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX45_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX45_1->GTPE2_CHANNEL_RX8B10BEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RX8B10BEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX45_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX45_2->GTPE2_CHANNEL_RXSYSCLKSEL0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXSYSCLKSEL0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX45_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX45_3->GTPE2_CHANNEL_TXDLYSRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDLYSRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX45_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX45_4->GTPE2_CHANNEL_TSTIN0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TSTIN0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX45_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX45_5->GTPE2_CHANNEL_DRPDI9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX45_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX45_6->GTPE2_CHANNEL_DRPDI0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX45_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX45_7->GTPE2_CHANNEL_TXPISOPD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPISOPD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX45_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX45_8->GTPE2_CHANNEL_EYESCANRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_EYESCANRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX45_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX46_0->GTPE2_CHANNEL_TXPCSRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPCSRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX46_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX46_1->GTPE2_CHANNEL_RXPCSRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPCSRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX46_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX46_10->GTPE2_CHANNEL_RXOSINTCFG3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTCFG3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX46_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX46_2->GTPE2_CHANNEL_RXOSCALRESET": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSCALRESET",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX46_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX46_3->GTPE2_CHANNEL_TXPIPPMPD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPIPPMPD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX46_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX46_4->GTPE2_CHANNEL_TXCHARDISPVAL3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCHARDISPVAL3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX46_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX46_6->GTPE2_CHANNEL_TXRATE1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXRATE1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX46_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX46_9->GTPE2_CHANNEL_LOOPBACK1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_LOOPBACK1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX46_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX47_4->GTPE2_CHANNEL_TXCHARISK3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCHARISK3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX47_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX47_6->GTPE2_CHANNEL_TXRATE0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXRATE0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX47_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX47_9->GTPE2_CHANNEL_LOOPBACK2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_LOOPBACK2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX47_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX4_0->GTPE2_CHANNEL_RXCHBONDLEVEL1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCHBONDLEVEL1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX4_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX4_10->GTPE2_CHANNEL_RXOUTCLKSEL0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOUTCLKSEL0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX4_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX4_3->GTPE2_CHANNEL_TXMAINCURSOR1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXMAINCURSOR1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX4_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX4_4->GTPE2_CHANNEL_TXMAINCURSOR5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXMAINCURSOR5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX4_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX4_7->GTPE2_CHANNEL_RXADAPTSELTEST2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXADAPTSELTEST2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX4_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX4_8->GTPE2_CHANNEL_TXOUTCLKSEL1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXOUTCLKSEL1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX4_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX5_0->GTPE2_CHANNEL_RXCHBONDLEVEL2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXCHBONDLEVEL2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX5_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX5_10->GTPE2_CHANNEL_RXOUTCLKSEL1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOUTCLKSEL1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX5_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX5_2->GTPE2_CHANNEL_PMARSVDIN3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PMARSVDIN3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX5_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX5_3->GTPE2_CHANNEL_TXMAINCURSOR0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXMAINCURSOR0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX5_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX5_4->GTPE2_CHANNEL_TXMAINCURSOR4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXMAINCURSOR4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX5_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX5_5->GTPE2_CHANNEL_RXLPMLFHOLD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXLPMLFHOLD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX5_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX5_7->GTPE2_CHANNEL_RXADAPTSELTEST3": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXADAPTSELTEST3",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX5_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX5_8->GTPE2_CHANNEL_TXOUTCLKSEL0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXOUTCLKSEL0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX5_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX5_9->GTPE2_CHANNEL_RXOSINTTESTOVRDEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTTESTOVRDEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX5_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX6_0->GTPE2_CHANNEL_RXUSERRDY": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXUSERRDY",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX6_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX6_1->GTPE2_CHANNEL_RXGEARBOXSLIP": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXGEARBOXSLIP",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX6_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX6_10->GTPE2_CHANNEL_RXOSINTCFG1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXOSINTCFG1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX6_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX6_4->GTPE2_CHANNEL_TXPOSTCURSOR1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPOSTCURSOR1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX6_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX6_5->GTPE2_CHANNEL_TXDIFFCTRL1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDIFFCTRL1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX6_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX6_6->GTPE2_CHANNEL_TXPRECURSOR1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPRECURSOR1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX6_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX6_7->GTPE2_CHANNEL_RXADAPTSELTEST5": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXADAPTSELTEST5",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX6_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX6_8->GTPE2_CHANNEL_TXPRBSSEL1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPRBSSEL1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX6_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX6_9->GTPE2_CHANNEL_DRPDI6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX6_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX7_0->GTPE2_CHANNEL_RXSYNCIN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXSYNCIN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX7_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX7_1->GTPE2_CHANNEL_TXSYNCIN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXSYNCIN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX7_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX7_2->GTPE2_CHANNEL_RXLPMOSINTNTRLEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXLPMOSINTNTRLEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX7_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX7_3->GTPE2_CHANNEL_TXPOSTCURSOR4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPOSTCURSOR4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX7_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX7_4->GTPE2_CHANNEL_TXPOSTCURSOR0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPOSTCURSOR0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX7_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX7_5->GTPE2_CHANNEL_TXDIFFCTRL0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDIFFCTRL0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX7_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX7_6->GTPE2_CHANNEL_TXPRECURSOR0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPRECURSOR0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX7_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX7_7->GTPE2_CHANNEL_TXPRECURSOR4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPRECURSOR4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX7_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX7_8->GTPE2_CHANNEL_TXPRBSSEL2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPRBSSEL2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX7_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX7_9->GTPE2_CHANNEL_DRPDI4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_DRPDI4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX7_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX8_0->GTPE2_CHANNEL_TXSEQUENCE6": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXSEQUENCE6",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX8_0"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX8_1->GTPE2_CHANNEL_TXSEQUENCE4": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXSEQUENCE4",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX8_1"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX8_10->GTPE2_CHANNEL_TXDATA24": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXDATA24",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX8_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX8_2->GTPE2_CHANNEL_TXCHARDISPVAL2": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCHARDISPVAL2",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX8_2"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX8_3->GTPE2_CHANNEL_TXPIPPMSEL": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPIPPMSEL",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX8_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX8_4->GTPE2_CHANNEL_TXCHARDISPVAL1": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCHARDISPVAL1",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX8_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX8_6->GTPE2_CHANNEL_TXCHARDISPVAL0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXCHARDISPVAL0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX8_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX8_7->GTPE2_CHANNEL_RXPHDLYPD": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXPHDLYPD",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX8_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX8_8->GTPE2_CHANNEL_RXDDIEN": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_RXDDIEN",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX8_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX8_9->GTPE2_CHANNEL_TXPIPPMSTEPSIZE0": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_TXPIPPMSTEPSIZE0",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX8_9"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX9_10->GTPE2_CHANNEL_PCSRSVDIN15": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN15",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX9_10"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX9_3->GTPE2_CHANNEL_PCSRSVDIN8": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN8",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX9_3"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX9_4->GTPE2_CHANNEL_PCSRSVDIN9": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN9",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX9_4"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX9_5->GTPE2_CHANNEL_PCSRSVDIN10": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN10",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX9_5"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX9_6->GTPE2_CHANNEL_PCSRSVDIN11": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN11",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX9_6"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX9_7->GTPE2_CHANNEL_PCSRSVDIN12": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN12",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX9_7"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX9_8->GTPE2_CHANNEL_PCSRSVDIN13": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN13",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX9_8"
        },
        "GTP_CHANNEL_1.GTPE2_IMUX9_9->GTPE2_CHANNEL_PCSRSVDIN14": {
            "can_invert": "0",
            "dst_to_src": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "dst_wire": "GTPE2_CHANNEL_PCSRSVDIN14",
            "is_directional": "1",
            "is_pass_transistor": 1,
            "is_pseudo": "0",
            "src_to_dst": {
                "delay": null,
                "in_cap": null,
                "res": "0.000"
            },
            "src_wire": "GTPE2_IMUX9_9"
        }
    },
    "sites": [
        {
            "name": "X0Y0",
            "prefix": "GTPE2_CHANNEL",
            "site_pins": {
                "CFGRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_CFGRESET"
                },
                "CLKRSVD0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_CLKRSVD0"
                },
                "CLKRSVD1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_CLKRSVD1"
                },
                "DMONFIFORESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DMONFIFORESET"
                },
                "DMONITORCLK": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DMONITORCLK"
                },
                "DMONITOROUT0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT0"
                },
                "DMONITOROUT1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT1"
                },
                "DMONITOROUT10": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT10"
                },
                "DMONITOROUT11": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT11"
                },
                "DMONITOROUT12": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT12"
                },
                "DMONITOROUT13": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT13"
                },
                "DMONITOROUT14": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT14"
                },
                "DMONITOROUT2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT2"
                },
                "DMONITOROUT3": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT3"
                },
                "DMONITOROUT4": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT4"
                },
                "DMONITOROUT5": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT5"
                },
                "DMONITOROUT6": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT6"
                },
                "DMONITOROUT7": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT7"
                },
                "DMONITOROUT8": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT8"
                },
                "DMONITOROUT9": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DMONITOROUT9"
                },
                "DRPADDR0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPADDR0"
                },
                "DRPADDR1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPADDR1"
                },
                "DRPADDR2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPADDR2"
                },
                "DRPADDR3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPADDR3"
                },
                "DRPADDR4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPADDR4"
                },
                "DRPADDR5": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPADDR5"
                },
                "DRPADDR6": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPADDR6"
                },
                "DRPADDR7": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPADDR7"
                },
                "DRPADDR8": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPADDR8"
                },
                "DRPCLK": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPCLK"
                },
                "DRPDI0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI0"
                },
                "DRPDI1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI1"
                },
                "DRPDI10": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI10"
                },
                "DRPDI11": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI11"
                },
                "DRPDI12": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI12"
                },
                "DRPDI13": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI13"
                },
                "DRPDI14": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI14"
                },
                "DRPDI15": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI15"
                },
                "DRPDI2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI2"
                },
                "DRPDI3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI3"
                },
                "DRPDI4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI4"
                },
                "DRPDI5": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI5"
                },
                "DRPDI6": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI6"
                },
                "DRPDI7": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI7"
                },
                "DRPDI8": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI8"
                },
                "DRPDI9": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPDI9"
                },
                "DRPDO0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO0"
                },
                "DRPDO1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO1"
                },
                "DRPDO10": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO10"
                },
                "DRPDO11": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO11"
                },
                "DRPDO12": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO12"
                },
                "DRPDO13": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO13"
                },
                "DRPDO14": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO14"
                },
                "DRPDO15": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO15"
                },
                "DRPDO2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO2"
                },
                "DRPDO3": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO3"
                },
                "DRPDO4": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO4"
                },
                "DRPDO5": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO5"
                },
                "DRPDO6": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO6"
                },
                "DRPDO7": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO7"
                },
                "DRPDO8": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO8"
                },
                "DRPDO9": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPDO9"
                },
                "DRPEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPEN"
                },
                "DRPRDY": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_DRPRDY"
                },
                "DRPWE": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_DRPWE"
                },
                "EYESCANDATAERROR": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_EYESCANDATAERROR"
                },
                "EYESCANMODE": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_EYESCANMODE"
                },
                "EYESCANRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_EYESCANRESET"
                },
                "EYESCANTRIGGER": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_EYESCANTRIGGER"
                },
                "GTPRXN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXN"
                },
                "GTPRXP": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXP"
                },
                "GTPTXN": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXN"
                },
                "GTPTXP": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXP"
                },
                "GTRESETSEL": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRESETSEL"
                },
                "GTRSVD0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD0"
                },
                "GTRSVD1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD1"
                },
                "GTRSVD10": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD10"
                },
                "GTRSVD11": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD11"
                },
                "GTRSVD12": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD12"
                },
                "GTRSVD13": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD13"
                },
                "GTRSVD14": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD14"
                },
                "GTRSVD15": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD15"
                },
                "GTRSVD2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD2"
                },
                "GTRSVD3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD3"
                },
                "GTRSVD4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD4"
                },
                "GTRSVD5": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD5"
                },
                "GTRSVD6": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD6"
                },
                "GTRSVD7": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD7"
                },
                "GTRSVD8": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD8"
                },
                "GTRSVD9": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRSVD9"
                },
                "GTRXRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTRXRESET"
                },
                "GTTXRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_GTTXRESET"
                },
                "LOOPBACK0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_LOOPBACK0"
                },
                "LOOPBACK1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_LOOPBACK1"
                },
                "LOOPBACK2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_LOOPBACK2"
                },
                "PCSRSVDIN0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN0"
                },
                "PCSRSVDIN1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN1"
                },
                "PCSRSVDIN10": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN10"
                },
                "PCSRSVDIN11": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN11"
                },
                "PCSRSVDIN12": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN12"
                },
                "PCSRSVDIN13": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN13"
                },
                "PCSRSVDIN14": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN14"
                },
                "PCSRSVDIN15": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN15"
                },
                "PCSRSVDIN2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN2"
                },
                "PCSRSVDIN3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN3"
                },
                "PCSRSVDIN4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN4"
                },
                "PCSRSVDIN5": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN5"
                },
                "PCSRSVDIN6": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN6"
                },
                "PCSRSVDIN7": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN7"
                },
                "PCSRSVDIN8": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN8"
                },
                "PCSRSVDIN9": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PCSRSVDIN9"
                },
                "PCSRSVDOUT0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT0"
                },
                "PCSRSVDOUT1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT1"
                },
                "PCSRSVDOUT10": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT10"
                },
                "PCSRSVDOUT11": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT11"
                },
                "PCSRSVDOUT12": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT12"
                },
                "PCSRSVDOUT13": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT13"
                },
                "PCSRSVDOUT14": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT14"
                },
                "PCSRSVDOUT15": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT15"
                },
                "PCSRSVDOUT2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT2"
                },
                "PCSRSVDOUT3": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT3"
                },
                "PCSRSVDOUT4": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT4"
                },
                "PCSRSVDOUT5": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT5"
                },
                "PCSRSVDOUT6": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT6"
                },
                "PCSRSVDOUT7": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT7"
                },
                "PCSRSVDOUT8": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT8"
                },
                "PCSRSVDOUT9": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PCSRSVDOUT9"
                },
                "PHYSTATUS": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PHYSTATUS"
                },
                "PLL0CLK": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PLL0CLK"
                },
                "PLL0REFCLK": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PLL0REFCLK"
                },
                "PLL1CLK": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PLL1CLK"
                },
                "PLL1REFCLK": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PLL1REFCLK"
                },
                "PMARSVDIN0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMARSVDIN0"
                },
                "PMARSVDIN1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMARSVDIN1"
                },
                "PMARSVDIN2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMARSVDIN2"
                },
                "PMARSVDIN3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMARSVDIN3"
                },
                "PMARSVDIN4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMARSVDIN4"
                },
                "PMARSVDOUT0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PMARSVDOUT0"
                },
                "PMARSVDOUT1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PMARSVDOUT1"
                },
                "PMASCANCLK0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMASCANCLK0"
                },
                "PMASCANCLK1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMASCANCLK1"
                },
                "PMASCANCLK2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMASCANCLK2"
                },
                "PMASCANCLK3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMASCANCLK3"
                },
                "PMASCANENB": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMASCANENB"
                },
                "PMASCANIN0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMASCANIN0"
                },
                "PMASCANIN1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMASCANIN1"
                },
                "PMASCANIN2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMASCANIN2"
                },
                "PMASCANIN3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMASCANIN3"
                },
                "PMASCANIN4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMASCANIN4"
                },
                "PMASCANIN5": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMASCANIN5"
                },
                "PMASCANIN6": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMASCANIN6"
                },
                "PMASCANMODEB": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMASCANMODEB"
                },
                "PMASCANOUT0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PMASCANOUT0"
                },
                "PMASCANOUT1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PMASCANOUT1"
                },
                "PMASCANOUT2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PMASCANOUT2"
                },
                "PMASCANOUT3": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PMASCANOUT3"
                },
                "PMASCANOUT4": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PMASCANOUT4"
                },
                "PMASCANOUT5": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PMASCANOUT5"
                },
                "PMASCANOUT6": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_PMASCANOUT6"
                },
                "PMASCANRSTEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_PMASCANRSTEN"
                },
                "RESETOVRD": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RESETOVRD"
                },
                "RX8B10BEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RX8B10BEN"
                },
                "RXADAPTSELTEST0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXADAPTSELTEST0"
                },
                "RXADAPTSELTEST1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXADAPTSELTEST1"
                },
                "RXADAPTSELTEST10": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXADAPTSELTEST10"
                },
                "RXADAPTSELTEST11": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXADAPTSELTEST11"
                },
                "RXADAPTSELTEST12": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXADAPTSELTEST12"
                },
                "RXADAPTSELTEST13": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXADAPTSELTEST13"
                },
                "RXADAPTSELTEST2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXADAPTSELTEST2"
                },
                "RXADAPTSELTEST3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXADAPTSELTEST3"
                },
                "RXADAPTSELTEST4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXADAPTSELTEST4"
                },
                "RXADAPTSELTEST5": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXADAPTSELTEST5"
                },
                "RXADAPTSELTEST6": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXADAPTSELTEST6"
                },
                "RXADAPTSELTEST7": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXADAPTSELTEST7"
                },
                "RXADAPTSELTEST8": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXADAPTSELTEST8"
                },
                "RXADAPTSELTEST9": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXADAPTSELTEST9"
                },
                "RXBUFRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXBUFRESET"
                },
                "RXBUFSTATUS0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXBUFSTATUS0"
                },
                "RXBUFSTATUS1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXBUFSTATUS1"
                },
                "RXBUFSTATUS2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXBUFSTATUS2"
                },
                "RXBYTEISALIGNED": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXBYTEISALIGNED"
                },
                "RXBYTEREALIGN": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXBYTEREALIGN"
                },
                "RXCDRFREQRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCDRFREQRESET"
                },
                "RXCDRHOLD": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCDRHOLD"
                },
                "RXCDRLOCK": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCDRLOCK"
                },
                "RXCDROVRDEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCDROVRDEN"
                },
                "RXCDRRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCDRRESET"
                },
                "RXCDRRESETRSV": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCDRRESETRSV"
                },
                "RXCHANBONDSEQ": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHANBONDSEQ"
                },
                "RXCHANISALIGNED": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHANISALIGNED"
                },
                "RXCHANREALIGN": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHANREALIGN"
                },
                "RXCHARISCOMMA0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHARISCOMMA0"
                },
                "RXCHARISCOMMA1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHARISCOMMA1"
                },
                "RXCHARISCOMMA2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHARISCOMMA2"
                },
                "RXCHARISCOMMA3": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHARISCOMMA3"
                },
                "RXCHARISK0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHARISK0"
                },
                "RXCHARISK1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHARISK1"
                },
                "RXCHARISK2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHARISK2"
                },
                "RXCHARISK3": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHARISK3"
                },
                "RXCHBONDEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCHBONDEN"
                },
                "RXCHBONDI0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCHBONDI0"
                },
                "RXCHBONDI1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCHBONDI1"
                },
                "RXCHBONDI2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCHBONDI2"
                },
                "RXCHBONDI3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCHBONDI3"
                },
                "RXCHBONDLEVEL0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCHBONDLEVEL0"
                },
                "RXCHBONDLEVEL1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCHBONDLEVEL1"
                },
                "RXCHBONDLEVEL2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCHBONDLEVEL2"
                },
                "RXCHBONDMASTER": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCHBONDMASTER"
                },
                "RXCHBONDO0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHBONDO0"
                },
                "RXCHBONDO1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHBONDO1"
                },
                "RXCHBONDO2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHBONDO2"
                },
                "RXCHBONDO3": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCHBONDO3"
                },
                "RXCHBONDSLAVE": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCHBONDSLAVE"
                },
                "RXCLKCORCNT0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCLKCORCNT0"
                },
                "RXCLKCORCNT1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCLKCORCNT1"
                },
                "RXCOMINITDET": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCOMINITDET"
                },
                "RXCOMMADET": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCOMMADET"
                },
                "RXCOMMADETEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXCOMMADETEN"
                },
                "RXCOMSASDET": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCOMSASDET"
                },
                "RXCOMWAKEDET": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXCOMWAKEDET"
                },
                "RXDATA0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA0"
                },
                "RXDATA1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA1"
                },
                "RXDATA10": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA10"
                },
                "RXDATA11": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA11"
                },
                "RXDATA12": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA12"
                },
                "RXDATA13": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA13"
                },
                "RXDATA14": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA14"
                },
                "RXDATA15": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA15"
                },
                "RXDATA16": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA16"
                },
                "RXDATA17": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA17"
                },
                "RXDATA18": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA18"
                },
                "RXDATA19": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA19"
                },
                "RXDATA2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA2"
                },
                "RXDATA20": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA20"
                },
                "RXDATA21": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA21"
                },
                "RXDATA22": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA22"
                },
                "RXDATA23": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA23"
                },
                "RXDATA24": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA24"
                },
                "RXDATA25": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA25"
                },
                "RXDATA26": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA26"
                },
                "RXDATA27": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA27"
                },
                "RXDATA28": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA28"
                },
                "RXDATA29": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA29"
                },
                "RXDATA3": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA3"
                },
                "RXDATA30": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA30"
                },
                "RXDATA31": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA31"
                },
                "RXDATA4": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA4"
                },
                "RXDATA5": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA5"
                },
                "RXDATA6": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA6"
                },
                "RXDATA7": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA7"
                },
                "RXDATA8": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA8"
                },
                "RXDATA9": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATA9"
                },
                "RXDATAVALID0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATAVALID0"
                },
                "RXDATAVALID1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDATAVALID1"
                },
                "RXDDIEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXDDIEN"
                },
                "RXDEBUGPULSE": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXDEBUGPULSE"
                },
                "RXDFEXYDEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXDFEXYDEN"
                },
                "RXDISPERR0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDISPERR0"
                },
                "RXDISPERR1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDISPERR1"
                },
                "RXDISPERR2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDISPERR2"
                },
                "RXDISPERR3": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDISPERR3"
                },
                "RXDLYBYPASS": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXDLYBYPASS"
                },
                "RXDLYEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXDLYEN"
                },
                "RXDLYOVRDEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXDLYOVRDEN"
                },
                "RXDLYSRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXDLYSRESET"
                },
                "RXDLYSRESETDONE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXDLYSRESETDONE"
                },
                "RXDLYTESTENB": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXDLYTESTENB"
                },
                "RXELECIDLE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXELECIDLE"
                },
                "RXELECIDLEMODE0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXELECIDLEMODE0"
                },
                "RXELECIDLEMODE1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXELECIDLEMODE1"
                },
                "RXGEARBOXSLIP": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXGEARBOXSLIP"
                },
                "RXHEADER0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXHEADER0"
                },
                "RXHEADER1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXHEADER1"
                },
                "RXHEADER2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXHEADER2"
                },
                "RXHEADERVALID": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXHEADERVALID"
                },
                "RXLPMHFHOLD": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXLPMHFHOLD"
                },
                "RXLPMHFOVRDEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXLPMHFOVRDEN"
                },
                "RXLPMLFHOLD": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXLPMLFHOLD"
                },
                "RXLPMLFOVRDEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXLPMLFOVRDEN"
                },
                "RXLPMOSINTNTRLEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXLPMOSINTNTRLEN"
                },
                "RXLPMRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXLPMRESET"
                },
                "RXMCOMMAALIGNEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXMCOMMAALIGNEN"
                },
                "RXNOTINTABLE0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXNOTINTABLE0"
                },
                "RXNOTINTABLE1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXNOTINTABLE1"
                },
                "RXNOTINTABLE2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXNOTINTABLE2"
                },
                "RXNOTINTABLE3": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXNOTINTABLE3"
                },
                "RXOOBRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOOBRESET"
                },
                "RXOSCALRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSCALRESET"
                },
                "RXOSHOLD": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSHOLD"
                },
                "RXOSINTCFG0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTCFG0"
                },
                "RXOSINTCFG1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTCFG1"
                },
                "RXOSINTCFG2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTCFG2"
                },
                "RXOSINTCFG3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTCFG3"
                },
                "RXOSINTDONE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXOSINTDONE"
                },
                "RXOSINTEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTEN"
                },
                "RXOSINTHOLD": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTHOLD"
                },
                "RXOSINTID00": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTID00"
                },
                "RXOSINTID01": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTID01"
                },
                "RXOSINTID02": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTID02"
                },
                "RXOSINTID03": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTID03"
                },
                "RXOSINTNTRLEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTNTRLEN"
                },
                "RXOSINTOVRDEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTOVRDEN"
                },
                "RXOSINTPD": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTPD"
                },
                "RXOSINTSTARTED": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXOSINTSTARTED"
                },
                "RXOSINTSTROBE": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTSTROBE"
                },
                "RXOSINTSTROBEDONE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXOSINTSTROBEDONE"
                },
                "RXOSINTSTROBESTARTED": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXOSINTSTROBESTARTED"
                },
                "RXOSINTTESTOVRDEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSINTTESTOVRDEN"
                },
                "RXOSOVRDEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOSOVRDEN"
                },
                "RXOUTCLK": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_GTRXOUTCLK_1"
                },
                "RXOUTCLKFABRIC": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXOUTCLKFABRIC"
                },
                "RXOUTCLKPCS": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXOUTCLKPCS"
                },
                "RXOUTCLKSEL0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOUTCLKSEL0"
                },
                "RXOUTCLKSEL1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOUTCLKSEL1"
                },
                "RXOUTCLKSEL2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXOUTCLKSEL2"
                },
                "RXPCOMMAALIGNEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPCOMMAALIGNEN"
                },
                "RXPCSRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPCSRESET"
                },
                "RXPD0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPD0"
                },
                "RXPD1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPD1"
                },
                "RXPHALIGN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPHALIGN"
                },
                "RXPHALIGNDONE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXPHALIGNDONE"
                },
                "RXPHALIGNEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPHALIGNEN"
                },
                "RXPHDLYPD": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPHDLYPD"
                },
                "RXPHDLYRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPHDLYRESET"
                },
                "RXPHMONITOR0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXPHMONITOR0"
                },
                "RXPHMONITOR1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXPHMONITOR1"
                },
                "RXPHMONITOR2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXPHMONITOR2"
                },
                "RXPHMONITOR3": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXPHMONITOR3"
                },
                "RXPHMONITOR4": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXPHMONITOR4"
                },
                "RXPHOVRDEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPHOVRDEN"
                },
                "RXPHSLIPMONITOR0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXPHSLIPMONITOR0"
                },
                "RXPHSLIPMONITOR1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXPHSLIPMONITOR1"
                },
                "RXPHSLIPMONITOR2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXPHSLIPMONITOR2"
                },
                "RXPHSLIPMONITOR3": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXPHSLIPMONITOR3"
                },
                "RXPHSLIPMONITOR4": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXPHSLIPMONITOR4"
                },
                "RXPMARESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPMARESET"
                },
                "RXPMARESETDONE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXPMARESETDONE"
                },
                "RXPOLARITY": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPOLARITY"
                },
                "RXPRBSCNTRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPRBSCNTRESET"
                },
                "RXPRBSERR": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXPRBSERR"
                },
                "RXPRBSSEL0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPRBSSEL0"
                },
                "RXPRBSSEL1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPRBSSEL1"
                },
                "RXPRBSSEL2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXPRBSSEL2"
                },
                "RXRATE0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXRATE0"
                },
                "RXRATE1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXRATE1"
                },
                "RXRATE2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXRATE2"
                },
                "RXRATEDONE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXRATEDONE"
                },
                "RXRATEMODE": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXRATEMODE"
                },
                "RXRESETDONE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXRESETDONE"
                },
                "RXSLIDE": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXSLIDE"
                },
                "RXSTARTOFSEQ0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXSTARTOFSEQ0"
                },
                "RXSTARTOFSEQ1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXSTARTOFSEQ1"
                },
                "RXSTATUS0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXSTATUS0"
                },
                "RXSTATUS1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXSTATUS1"
                },
                "RXSTATUS2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXSTATUS2"
                },
                "RXSYNCALLIN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXSYNCALLIN"
                },
                "RXSYNCDONE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXSYNCDONE"
                },
                "RXSYNCIN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXSYNCIN"
                },
                "RXSYNCMODE": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXSYNCMODE"
                },
                "RXSYNCOUT": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXSYNCOUT"
                },
                "RXSYSCLKSEL0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXSYSCLKSEL0"
                },
                "RXSYSCLKSEL1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXSYSCLKSEL1"
                },
                "RXUSERRDY": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXUSERRDY"
                },
                "RXUSRCLK": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXUSRCLK"
                },
                "RXUSRCLK2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_RXUSRCLK2"
                },
                "RXVALID": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_RXVALID"
                },
                "SCANCLK": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_SCANCLK"
                },
                "SCANENB": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_SCANENB"
                },
                "SCANIN0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_SCANIN0"
                },
                "SCANIN1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_SCANIN1"
                },
                "SCANIN2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_SCANIN2"
                },
                "SCANIN3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_SCANIN3"
                },
                "SCANIN4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_SCANIN4"
                },
                "SCANIN5": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_SCANIN5"
                },
                "SCANMODEB": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_SCANMODEB"
                },
                "SCANOUT0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_SCANOUT0"
                },
                "SCANOUT1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_SCANOUT1"
                },
                "SCANOUT2": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_SCANOUT2"
                },
                "SCANOUT3": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_SCANOUT3"
                },
                "SCANOUT4": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_SCANOUT4"
                },
                "SCANOUT5": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_SCANOUT5"
                },
                "SETERRSTATUS": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_SETERRSTATUS"
                },
                "SIGVALIDCLK": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_SIGVALIDCLK"
                },
                "TSTCLK0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTCLK0"
                },
                "TSTCLK1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTCLK1"
                },
                "TSTIN0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN0"
                },
                "TSTIN1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN1"
                },
                "TSTIN10": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN10"
                },
                "TSTIN11": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN11"
                },
                "TSTIN12": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN12"
                },
                "TSTIN13": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN13"
                },
                "TSTIN14": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN14"
                },
                "TSTIN15": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN15"
                },
                "TSTIN16": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN16"
                },
                "TSTIN17": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN17"
                },
                "TSTIN18": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN18"
                },
                "TSTIN19": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN19"
                },
                "TSTIN2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN2"
                },
                "TSTIN3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN3"
                },
                "TSTIN4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN4"
                },
                "TSTIN5": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN5"
                },
                "TSTIN6": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN6"
                },
                "TSTIN7": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN7"
                },
                "TSTIN8": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN8"
                },
                "TSTIN9": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTIN9"
                },
                "TSTPD0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTPD0"
                },
                "TSTPD1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTPD1"
                },
                "TSTPD2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTPD2"
                },
                "TSTPD3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTPD3"
                },
                "TSTPD4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTPD4"
                },
                "TSTPDOVRDB": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TSTPDOVRDB"
                },
                "TX8B10BBYPASS0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TX8B10BBYPASS0"
                },
                "TX8B10BBYPASS1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TX8B10BBYPASS1"
                },
                "TX8B10BBYPASS2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TX8B10BBYPASS2"
                },
                "TX8B10BBYPASS3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TX8B10BBYPASS3"
                },
                "TX8B10BEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TX8B10BEN"
                },
                "TXBUFDIFFCTRL0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXBUFDIFFCTRL0"
                },
                "TXBUFDIFFCTRL1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXBUFDIFFCTRL1"
                },
                "TXBUFDIFFCTRL2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXBUFDIFFCTRL2"
                },
                "TXBUFSTATUS0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXBUFSTATUS0"
                },
                "TXBUFSTATUS1": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXBUFSTATUS1"
                },
                "TXCHARDISPMODE0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCHARDISPMODE0"
                },
                "TXCHARDISPMODE1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCHARDISPMODE1"
                },
                "TXCHARDISPMODE2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCHARDISPMODE2"
                },
                "TXCHARDISPMODE3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCHARDISPMODE3"
                },
                "TXCHARDISPVAL0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCHARDISPVAL0"
                },
                "TXCHARDISPVAL1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCHARDISPVAL1"
                },
                "TXCHARDISPVAL2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCHARDISPVAL2"
                },
                "TXCHARDISPVAL3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCHARDISPVAL3"
                },
                "TXCHARISK0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCHARISK0"
                },
                "TXCHARISK1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCHARISK1"
                },
                "TXCHARISK2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCHARISK2"
                },
                "TXCHARISK3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCHARISK3"
                },
                "TXCOMFINISH": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXCOMFINISH"
                },
                "TXCOMINIT": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCOMINIT"
                },
                "TXCOMSAS": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCOMSAS"
                },
                "TXCOMWAKE": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXCOMWAKE"
                },
                "TXDATA0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA0"
                },
                "TXDATA1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA1"
                },
                "TXDATA10": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA10"
                },
                "TXDATA11": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA11"
                },
                "TXDATA12": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA12"
                },
                "TXDATA13": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA13"
                },
                "TXDATA14": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA14"
                },
                "TXDATA15": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA15"
                },
                "TXDATA16": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA16"
                },
                "TXDATA17": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA17"
                },
                "TXDATA18": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA18"
                },
                "TXDATA19": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA19"
                },
                "TXDATA2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA2"
                },
                "TXDATA20": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA20"
                },
                "TXDATA21": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA21"
                },
                "TXDATA22": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA22"
                },
                "TXDATA23": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA23"
                },
                "TXDATA24": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA24"
                },
                "TXDATA25": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA25"
                },
                "TXDATA26": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA26"
                },
                "TXDATA27": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA27"
                },
                "TXDATA28": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA28"
                },
                "TXDATA29": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA29"
                },
                "TXDATA3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA3"
                },
                "TXDATA30": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA30"
                },
                "TXDATA31": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA31"
                },
                "TXDATA4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA4"
                },
                "TXDATA5": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA5"
                },
                "TXDATA6": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA6"
                },
                "TXDATA7": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA7"
                },
                "TXDATA8": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA8"
                },
                "TXDATA9": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDATA9"
                },
                "TXDEEMPH": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDEEMPH"
                },
                "TXDETECTRX": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDETECTRX"
                },
                "TXDIFFCTRL0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDIFFCTRL0"
                },
                "TXDIFFCTRL1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDIFFCTRL1"
                },
                "TXDIFFCTRL2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDIFFCTRL2"
                },
                "TXDIFFCTRL3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDIFFCTRL3"
                },
                "TXDIFFPD": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDIFFPD"
                },
                "TXDLYBYPASS": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDLYBYPASS"
                },
                "TXDLYEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDLYEN"
                },
                "TXDLYHOLD": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDLYHOLD"
                },
                "TXDLYOVRDEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDLYOVRDEN"
                },
                "TXDLYSRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDLYSRESET"
                },
                "TXDLYSRESETDONE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXDLYSRESETDONE"
                },
                "TXDLYTESTENB": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDLYTESTENB"
                },
                "TXDLYUPDOWN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXDLYUPDOWN"
                },
                "TXELECIDLE": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXELECIDLE"
                },
                "TXGEARBOXREADY": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXGEARBOXREADY"
                },
                "TXHEADER0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXHEADER0"
                },
                "TXHEADER1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXHEADER1"
                },
                "TXHEADER2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXHEADER2"
                },
                "TXINHIBIT": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXINHIBIT"
                },
                "TXMAINCURSOR0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXMAINCURSOR0"
                },
                "TXMAINCURSOR1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXMAINCURSOR1"
                },
                "TXMAINCURSOR2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXMAINCURSOR2"
                },
                "TXMAINCURSOR3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXMAINCURSOR3"
                },
                "TXMAINCURSOR4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXMAINCURSOR4"
                },
                "TXMAINCURSOR5": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXMAINCURSOR5"
                },
                "TXMAINCURSOR6": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXMAINCURSOR6"
                },
                "TXMARGIN0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXMARGIN0"
                },
                "TXMARGIN1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXMARGIN1"
                },
                "TXMARGIN2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXMARGIN2"
                },
                "TXOUTCLK": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_GTTXOUTCLK_1"
                },
                "TXOUTCLKFABRIC": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXOUTCLKFABRIC"
                },
                "TXOUTCLKPCS": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXOUTCLKPCS"
                },
                "TXOUTCLKSEL0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXOUTCLKSEL0"
                },
                "TXOUTCLKSEL1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXOUTCLKSEL1"
                },
                "TXOUTCLKSEL2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXOUTCLKSEL2"
                },
                "TXPCSRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPCSRESET"
                },
                "TXPD0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPD0"
                },
                "TXPD1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPD1"
                },
                "TXPDELECIDLEMODE": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPDELECIDLEMODE"
                },
                "TXPHALIGN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPHALIGN"
                },
                "TXPHALIGNDONE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXPHALIGNDONE"
                },
                "TXPHALIGNEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPHALIGNEN"
                },
                "TXPHDLYPD": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPHDLYPD"
                },
                "TXPHDLYRESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPHDLYRESET"
                },
                "TXPHDLYTSTCLK": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPHDLYTSTCLK"
                },
                "TXPHINIT": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPHINIT"
                },
                "TXPHINITDONE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXPHINITDONE"
                },
                "TXPHOVRDEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPHOVRDEN"
                },
                "TXPIPPMEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPIPPMEN"
                },
                "TXPIPPMOVRDEN": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPIPPMOVRDEN"
                },
                "TXPIPPMPD": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPIPPMPD"
                },
                "TXPIPPMSEL": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPIPPMSEL"
                },
                "TXPIPPMSTEPSIZE0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPIPPMSTEPSIZE0"
                },
                "TXPIPPMSTEPSIZE1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPIPPMSTEPSIZE1"
                },
                "TXPIPPMSTEPSIZE2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPIPPMSTEPSIZE2"
                },
                "TXPIPPMSTEPSIZE3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPIPPMSTEPSIZE3"
                },
                "TXPIPPMSTEPSIZE4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPIPPMSTEPSIZE4"
                },
                "TXPISOPD": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPISOPD"
                },
                "TXPMARESET": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPMARESET"
                },
                "TXPMARESETDONE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXPMARESETDONE"
                },
                "TXPOLARITY": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPOLARITY"
                },
                "TXPOSTCURSOR0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPOSTCURSOR0"
                },
                "TXPOSTCURSOR1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPOSTCURSOR1"
                },
                "TXPOSTCURSOR2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPOSTCURSOR2"
                },
                "TXPOSTCURSOR3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPOSTCURSOR3"
                },
                "TXPOSTCURSOR4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPOSTCURSOR4"
                },
                "TXPOSTCURSORINV": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPOSTCURSORINV"
                },
                "TXPRBSFORCEERR": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPRBSFORCEERR"
                },
                "TXPRBSSEL0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPRBSSEL0"
                },
                "TXPRBSSEL1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPRBSSEL1"
                },
                "TXPRBSSEL2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPRBSSEL2"
                },
                "TXPRECURSOR0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPRECURSOR0"
                },
                "TXPRECURSOR1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPRECURSOR1"
                },
                "TXPRECURSOR2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPRECURSOR2"
                },
                "TXPRECURSOR3": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPRECURSOR3"
                },
                "TXPRECURSOR4": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPRECURSOR4"
                },
                "TXPRECURSORINV": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXPRECURSORINV"
                },
                "TXRATE0": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXRATE0"
                },
                "TXRATE1": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXRATE1"
                },
                "TXRATE2": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXRATE2"
                },
                "TXRATEDONE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXRATEDONE"
                },
                "TXRATEMODE": {
                    "cap": "0.000",
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "wire": "GTPE2_CHANNEL_TXRATEMODE"
                },
                "TXRESETDONE": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXRESETDONE"
                },
                "TXRUNDISP0": {
                    "delay": [
                        "0.000",
                        "0.000",
                        "0.000",
                        "0.000"
                    ],
                    "res": "0.0",
                    "wire": "GTPE2_CHANNEL_TXRUNDISP0"
                },
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