{
    "pips": {
        "CMT_TOP_R_UPPER_B.CMT_FREQ_BB_PREF_IN0->>CMT_FREQ_PHASER_REFMUX_0": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_BB_PREF_IN0"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_BB_PREF_IN0->>CMT_FREQ_PHASER_REFMUX_1": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_BB_PREF_IN0"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_BB_PREF_IN0->>CMT_FREQ_PHASER_REFMUX_2": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_BB_PREF_IN0"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_BB_PREF_IN1->>CMT_FREQ_PHASER_REFMUX_0": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_BB_PREF_IN1"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_BB_PREF_IN1->>CMT_FREQ_PHASER_REFMUX_1": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_BB_PREF_IN1"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_BB_PREF_IN1->>CMT_FREQ_PHASER_REFMUX_2": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_BB_PREF_IN1"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_BB_PREF_IN2->>CMT_FREQ_PHASER_REFMUX_0": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_BB_PREF_IN2"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_BB_PREF_IN2->>CMT_FREQ_PHASER_REFMUX_1": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_BB_PREF_IN2"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_BB_PREF_IN2->>CMT_FREQ_PHASER_REFMUX_2": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_BB_PREF_IN2"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_BB_PREF_IN3->>CMT_FREQ_PHASER_REFMUX_0": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_BB_PREF_IN3"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_BB_PREF_IN3->>CMT_FREQ_PHASER_REFMUX_1": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_BB_PREF_IN3"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_BB_PREF_IN3->>CMT_FREQ_PHASER_REFMUX_2": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_BB_PREF_IN3"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_0->>CMT_PHASER_IN_CA_FREQREFCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_FREQREFCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_0"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_0->>CMT_PHASER_IN_DB_FREQREFCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_FREQREFCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_0"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_0->>CMT_PHASER_OUT_CA_FREQREFCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_FREQREFCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_0"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_0->>CMT_PHASER_OUT_DB_FREQREFCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_FREQREFCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_0"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_0->>CMT_PHASER_REF_CLKIN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_REF_CLKIN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_0"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_1->>CMT_PHASER_IN_CA_MEMREFCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_MEMREFCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_1->>CMT_PHASER_IN_DB_MEMREFCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_MEMREFCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_1->>CMT_PHASER_OUT_CA_MEMREFCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_MEMREFCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_1->>CMT_PHASER_OUT_DB_MEMREFCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_MEMREFCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_1->>CMT_PHY_CONTROL_MEMREFCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_MEMREFCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_2->>CMT_PHASER_IN_CA_SYNCIN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_SYNCIN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_2->>CMT_PHASER_IN_DB_SYNCIN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_SYNCIN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_2->>CMT_PHASER_OUT_CA_SYNCIN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_SYNCIN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_2->>CMT_PHASER_OUT_DB_SYNCIN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_SYNCIN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_FREQ_PHASER_REFMUX_2->>CMT_PHY_CONTROL_SYNCIN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_SYNCIN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_FREQ_PHASER_REFMUX_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASERREF_PHASERIN_C->CMT_PHASER_IN_CA_PHASEREFCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_PHASEREFCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASERREF_PHASERIN_C"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASERREF_PHASERIN_D->CMT_PHASER_IN_DB_PHASEREFCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_PHASEREFCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASERREF_PHASERIN_D"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASERREF_PHASEROUT_C->CMT_PHASER_OUT_CA_PHASEREFCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_PHASEREFCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASERREF_PHASEROUT_C"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASERREF_PHASEROUT_D->CMT_PHASER_OUT_DB_PHASEREFCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_PHASEREFCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASERREF_PHASEROUT_D"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASERTOP_PHYCTLEMPTY->>CMT_PHASER_TOP_SYNC_BB": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_TOP_SYNC_BB",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASERTOP_PHYCTLEMPTY"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASERTOP_PHYCTLMSTREMPTY->CMT_PHY_CONTROL_PHYCTLMSTREMPTY": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLMSTREMPTY",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASERTOP_PHYCTLMSTREMPTY"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLKDIV_TOIOI->>CMT_TOP_ICLKDIV_0": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLKDIV_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLKDIV_TOIOI->>CMT_TOP_ICLKDIV_1": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLKDIV_1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLKDIV_TOIOI->>CMT_TOP_ICLKDIV_10": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLKDIV_10",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLKDIV_TOIOI->>CMT_TOP_ICLKDIV_11": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLKDIV_11",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLKDIV_TOIOI->>CMT_TOP_ICLKDIV_2": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLKDIV_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLKDIV_TOIOI->>CMT_TOP_ICLKDIV_3": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLKDIV_3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLKDIV_TOIOI->>CMT_TOP_ICLKDIV_4": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLKDIV_4",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLKDIV_TOIOI->>CMT_TOP_ICLKDIV_5": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLKDIV_5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLKDIV_TOIOI->>CMT_TOP_ICLKDIV_6": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLKDIV_6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLKDIV_TOIOI->>CMT_TOP_ICLKDIV_7": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLKDIV_7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLKDIV_TOIOI->>CMT_TOP_ICLKDIV_8": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLKDIV_8",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLKDIV_TOIOI->>CMT_TOP_ICLKDIV_9": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLKDIV_9",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLK_TOIOI->>CMT_TOP_ICLK_0": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLK_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLK_TOIOI->>CMT_TOP_ICLK_1": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLK_1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLK_TOIOI->>CMT_TOP_ICLK_10": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLK_10",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLK_TOIOI->>CMT_TOP_ICLK_11": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLK_11",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLK_TOIOI->>CMT_TOP_ICLK_2": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLK_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLK_TOIOI->>CMT_TOP_ICLK_3": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLK_3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLK_TOIOI->>CMT_TOP_ICLK_4": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLK_4",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLK_TOIOI->>CMT_TOP_ICLK_5": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLK_5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLK_TOIOI->>CMT_TOP_ICLK_6": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLK_6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLK_TOIOI->>CMT_TOP_ICLK_7": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLK_7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLK_TOIOI->>CMT_TOP_ICLK_8": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLK_8",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_ICLK_TOIOI->>CMT_TOP_ICLK_9": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_ICLK_9",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_ICLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLK90_TOIOI->>CMT_TOP_OCLK1X_90_7": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLK1X_90_7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLK90_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLKDIV_TOIOI->>CMT_TOP_OCLKDIV_0": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLKDIV_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLKDIV_TOIOI->>CMT_TOP_OCLKDIV_1": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLKDIV_1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLKDIV_TOIOI->>CMT_TOP_OCLKDIV_10": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLKDIV_10",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLKDIV_TOIOI->>CMT_TOP_OCLKDIV_11": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLKDIV_11",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLKDIV_TOIOI->>CMT_TOP_OCLKDIV_2": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLKDIV_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLKDIV_TOIOI->>CMT_TOP_OCLKDIV_3": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLKDIV_3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLKDIV_TOIOI->>CMT_TOP_OCLKDIV_4": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLKDIV_4",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLKDIV_TOIOI->>CMT_TOP_OCLKDIV_5": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLKDIV_5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLKDIV_TOIOI->>CMT_TOP_OCLKDIV_6": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLKDIV_6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLKDIV_TOIOI->>CMT_TOP_OCLKDIV_7": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLKDIV_7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLKDIV_TOIOI->>CMT_TOP_OCLKDIV_8": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLKDIV_8",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLKDIV_TOIOI->>CMT_TOP_OCLKDIV_9": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLKDIV_9",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLKDIV_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLK_TOIOI->>CMT_TOP_OCLK_0": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLK_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLK_TOIOI->>CMT_TOP_OCLK_1": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLK_1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLK_TOIOI->>CMT_TOP_OCLK_10": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLK_10",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLK_TOIOI->>CMT_TOP_OCLK_11": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLK_11",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLK_TOIOI->>CMT_TOP_OCLK_2": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLK_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLK_TOIOI->>CMT_TOP_OCLK_3": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLK_3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLK_TOIOI->>CMT_TOP_OCLK_4": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLK_4",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLK_TOIOI->>CMT_TOP_OCLK_5": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLK_5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLK_TOIOI->>CMT_TOP_OCLK_6": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLK_6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLK_TOIOI->>CMT_TOP_OCLK_7": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLK_7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLK_TOIOI->>CMT_TOP_OCLK_8": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLK_8",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_C_OCLK_TOIOI->>CMT_TOP_OCLK_9": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_OCLK_9",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_C_OCLK_TOIOI"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_COUNTERREADVAL0->CMT_TOP_LOGIC_OUTS_L_B15_2": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B15_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_COUNTERREADVAL0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_COUNTERREADVAL1->CMT_TOP_LOGIC_OUTS_L_B3_2": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B3_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_COUNTERREADVAL1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_COUNTERREADVAL2->CMT_TOP_LOGIC_OUTS_L_B21_2": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B21_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_COUNTERREADVAL2"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_COUNTERREADVAL3->CMT_TOP_LOGIC_OUTS_L_B7_2": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B7_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_COUNTERREADVAL3"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_COUNTERREADVAL4->CMT_TOP_LOGIC_OUTS_L_B3_3": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B3_3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_COUNTERREADVAL4"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_COUNTERREADVAL5->CMT_TOP_LOGIC_OUTS_L_B21_3": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B21_3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_COUNTERREADVAL5"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_DQSFOUND->CMT_TOP_LOGIC_OUTS_L_B6_3": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B6_3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_DQSFOUND"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_DQSOUTOFRANGE->CMT_TOP_LOGIC_OUTS_L_B15_3": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B15_3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_DQSOUTOFRANGE"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_FINEOVERFLOW->CMT_TOP_LOGIC_OUTS_L_B2_2": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B2_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_FINEOVERFLOW"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_ICLK->CMT_PHASER_IN_C_ICLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_C_ICLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_ICLK"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_ICLKDIV->CMT_PHASER_IN_C_WRCLK_TOFIFO": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_C_WRCLK_TOFIFO",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_ICLKDIV"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_ISERDESRST->CMT_TOP_LOGIC_OUTS_L_B10_3": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B10_3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_ISERDESRST"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_PHASELOCKED->CMT_TOP_LOGIC_OUTS_L_B17_2": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B17_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_PHASELOCKED"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_PHASEREFCLK->>CMT_PHASER_IN_CA_RCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_RCLK",
            "is_directional": "1",
            "is_pseudo": "1",
            "src_wire": "CMT_PHASER_IN_CA_PHASEREFCLK"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_RCLK->CMT_PHASER_IN_C_RCLK2": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_C_RCLK2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_RCLK"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_CA_WRENABLE->CMT_PHASER_IN_C_WRENABLE_FIFO": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_C_WRENABLE_FIFO",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_CA_WRENABLE"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_C_ICLK->>CMT_PHASER_C_ICLK_TOIOI": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_C_ICLK_TOIOI",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_C_ICLK"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_C_ICLKDIV->>CMT_PHASER_C_ICLKDIV_TOIOI": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_C_ICLKDIV_TOIOI",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_C_ICLKDIV"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_C_WRCLK_TOFIFO->CMT_PHASER_IN_C_ICLKDIV": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_C_ICLKDIV",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_C_WRCLK_TOFIFO"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_COUNTERREADVAL0->CMT_TOP_LOGIC_OUTS_L_B15_6": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B15_6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_COUNTERREADVAL0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_COUNTERREADVAL1->CMT_TOP_LOGIC_OUTS_L_B21_6": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B21_6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_COUNTERREADVAL1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_COUNTERREADVAL2->CMT_TOP_LOGIC_OUTS_L_B18_7": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B18_7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_COUNTERREADVAL2"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_COUNTERREADVAL3->CMT_TOP_LOGIC_OUTS_L_B1_7": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B1_7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_COUNTERREADVAL3"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_COUNTERREADVAL4->CMT_TOP_LOGIC_OUTS_L_B9_7": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B9_7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_COUNTERREADVAL4"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_COUNTERREADVAL5->CMT_TOP_LOGIC_OUTS_L_B6_7": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B6_7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_COUNTERREADVAL5"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_DQSFOUND->CMT_TOP_LOGIC_OUTS_L_B23_8": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B23_8",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_DQSFOUND"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_DQSOUTOFRANGE->CMT_TOP_LOGIC_OUTS_L_B9_6": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B9_6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_DQSOUTOFRANGE"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_FINEOVERFLOW->CMT_TOP_LOGIC_OUTS_L_B6_6": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B6_6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_FINEOVERFLOW"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_ICLK->CMT_PHASER_IN_D_ICLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_D_ICLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_ICLK"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_ICLKDIV->CMT_PHASER_IN_D_WRCLK_TOFIFO": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_D_WRCLK_TOFIFO",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_ICLKDIV"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_ISERDESRST->CMT_TOP_LOGIC_OUTS_L_B18_8": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B18_8",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_ISERDESRST"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_PHASELOCKED->CMT_TOP_LOGIC_OUTS_L_B17_6": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B17_6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_PHASELOCKED"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_PHASEREFCLK->>CMT_PHASER_IN_DB_RCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_RCLK",
            "is_directional": "1",
            "is_pseudo": "1",
            "src_wire": "CMT_PHASER_IN_DB_PHASEREFCLK"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_RCLK->CMT_PHASER_IN_D_RCLK3": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_D_RCLK3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_RCLK"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_DB_WRENABLE->CMT_PHASER_IN_D_WRENABLE_FIFO": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_D_WRENABLE_FIFO",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_DB_WRENABLE"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_IN_D_WRCLK_TOFIFO->CMT_PHASER_IN_D_ICLKDIV": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_D_ICLKDIV",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_IN_D_WRCLK_TOFIFO"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_COARSEOVERFLOW->CMT_TOP_LOGIC_OUTS_L_B15_0": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B15_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_COARSEOVERFLOW"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_COUNTERREADVAL0->CMT_TOP_LOGIC_OUTS_L_B3_0": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B3_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_COUNTERREADVAL0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_COUNTERREADVAL1->CMT_TOP_LOGIC_OUTS_L_B21_0": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B21_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_COUNTERREADVAL1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_COUNTERREADVAL2->CMT_TOP_LOGIC_OUTS_L_B7_0": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B7_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_COUNTERREADVAL2"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_COUNTERREADVAL3->CMT_TOP_LOGIC_OUTS_L_B17_0": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B17_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_COUNTERREADVAL3"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_COUNTERREADVAL4->CMT_TOP_LOGIC_OUTS_L_B15_1": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B15_1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_COUNTERREADVAL4"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_COUNTERREADVAL5->CMT_TOP_LOGIC_OUTS_L_B3_1": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B3_1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_COUNTERREADVAL5"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_COUNTERREADVAL6->CMT_TOP_LOGIC_OUTS_L_B21_1": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B21_1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_COUNTERREADVAL6"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_COUNTERREADVAL7->CMT_TOP_LOGIC_OUTS_L_B7_1": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B7_1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_COUNTERREADVAL7"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_COUNTERREADVAL8->CMT_TOP_LOGIC_OUTS_L_B23_2": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B23_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_COUNTERREADVAL8"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_CTSBUS0->CMT_TOP_LOGIC_OUTS_L_B14_7": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B14_7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_CTSBUS0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_CTSBUS1->CMT_TOP_LOGIC_OUTS_L_B23_7": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B23_7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_CTSBUS1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_DQSBUS0->CMT_TOP_LOGIC_OUTS_L_B0_7": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B0_7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_DQSBUS0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_DQSBUS1->CMT_TOP_LOGIC_OUTS_L_B5_7": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B5_7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_DQSBUS1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_DTSBUS0->CMT_TOP_LOGIC_OUTS_L_B14_6": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B14_6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_DTSBUS0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_DTSBUS1->CMT_TOP_LOGIC_OUTS_L_B23_6": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B23_6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_DTSBUS1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_FINEOVERFLOW->CMT_TOP_LOGIC_OUTS_L_B2_1": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B2_1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_FINEOVERFLOW"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_OCLK->CMT_PHASER_OUT_C_OCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_C_OCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_OCLK"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_OCLKDELAYED->CMT_PHASER_OUT_C_OCLK1X_90": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_C_OCLK1X_90",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_OCLKDELAYED"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_OCLKDIV->CMT_PHASER_OUT_C_RDCLK_TOFIFO": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_C_RDCLK_TOFIFO",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_OCLKDIV"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_OSERDESRST->CMT_TOP_LOGIC_OUTS_L_B10_2": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B10_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_OSERDESRST"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_CA_RDENABLE->CMT_PHASER_OUT_C_RDENABLE_TOFIFO": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_C_RDENABLE_TOFIFO",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_CA_RDENABLE"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_C_OCLK->>CMT_PHASER_C_OCLK_TOIOI": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_C_OCLK_TOIOI",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_C_OCLK"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_C_OCLK1X_90->>CMT_PHASER_C_OCLK90_TOIOI": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_C_OCLK90_TOIOI",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_C_OCLK1X_90"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_C_OCLKDIV->>CMT_PHASER_C_OCLKDIV_TOIOI": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_C_OCLKDIV_TOIOI",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_C_OCLKDIV"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_C_RDCLK_TOFIFO->CMT_PHASER_OUT_C_OCLKDIV": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_C_OCLKDIV",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_C_RDCLK_TOFIFO"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_COARSEOVERFLOW->CMT_TOP_LOGIC_OUTS_L_B14_5": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B14_5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_COARSEOVERFLOW"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_COUNTERREADVAL0->CMT_TOP_LOGIC_OUTS_L_B3_4": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B3_4",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_COUNTERREADVAL0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_COUNTERREADVAL1->CMT_TOP_LOGIC_OUTS_L_B21_4": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B21_4",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_COUNTERREADVAL1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_COUNTERREADVAL2->CMT_TOP_LOGIC_OUTS_L_B7_4": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B7_4",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_COUNTERREADVAL2"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_COUNTERREADVAL3->CMT_TOP_LOGIC_OUTS_L_B17_4": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B17_4",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_COUNTERREADVAL3"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_COUNTERREADVAL4->CMT_TOP_LOGIC_OUTS_L_B2_5": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B2_5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_COUNTERREADVAL4"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_COUNTERREADVAL5->CMT_TOP_LOGIC_OUTS_L_B15_5": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B15_5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_COUNTERREADVAL5"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_COUNTERREADVAL6->CMT_TOP_LOGIC_OUTS_L_B3_5": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B3_5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_COUNTERREADVAL6"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_COUNTERREADVAL7->CMT_TOP_LOGIC_OUTS_L_B21_5": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B21_5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_COUNTERREADVAL7"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_COUNTERREADVAL8->CMT_TOP_LOGIC_OUTS_L_B6_5": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B6_5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_COUNTERREADVAL8"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_CTSBUS0->CMT_PHASERD_CTSBUS0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERD_CTSBUS0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_CTSBUS0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_CTSBUS1->CMT_PHASERD_CTSBUS1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERD_CTSBUS1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_CTSBUS1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_DQSBUS0->CMT_PHASERD_DQSBUS0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERD_DQSBUS0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_DQSBUS0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_DQSBUS1->CMT_PHASERD_DQSBUS1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERD_DQSBUS1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_DQSBUS1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_DTSBUS0->CMT_PHASERD_DTSBUS0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERD_DTSBUS0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_DTSBUS0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_DTSBUS1->CMT_PHASERD_DTSBUS1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERD_DTSBUS1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_DTSBUS1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_FINEOVERFLOW->CMT_TOP_LOGIC_OUTS_L_B18_6": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B18_6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_FINEOVERFLOW"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_OCLK->CMT_PHASER_OUT_D_OCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_D_OCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_OCLK"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_OCLKDELAYED->CMT_PHASER_OUT_D_OCLK1X_90": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_D_OCLK1X_90",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_OCLKDELAYED"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_OCLKDIV->CMT_PHASER_OUT_D_RDCLK_TOFIFO": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_D_RDCLK_TOFIFO",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_OCLKDIV"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_OSERDESRST->CMT_TOP_LOGIC_OUTS_L_B16_5": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B16_5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_OSERDESRST"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_DB_RDENABLE->CMT_PHASER_OUT_D_RDENABLE_TOFIFO": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_D_RDENABLE_TOFIFO",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_DB_RDENABLE"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_OUT_D_RDCLK_TOFIFO->CMT_PHASER_OUT_D_OCLKDIV": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_D_OCLKDIV",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_OUT_D_RDCLK_TOFIFO"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_REF_CLKOUT->CMT_PHASER_REF_CLKOUT_TOHCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_REF_CLKOUT_TOHCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_REF_CLKOUT"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_REF_LOCKED->CMT_TOP_LOGIC_OUTS_L_B14_0": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B14_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_REF_LOCKED"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_REF_TMUXOUT->CMT_PHASER_REF_TMUXOUT_TOHCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_REF_TMUXOUT_TOHCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_REF_TMUXOUT"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_TOP_SYNC_BB->>CMT_PHASERTOP_PHYCTLMSTREMPTY": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERTOP_PHYCTLMSTREMPTY",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_TOP_SYNC_BB"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_DQS_TO_PHASER_C->>CMT_PHASERREF_PHASERIN_C": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASERIN_C",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_DQS_TO_PHASER_C"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_DQS_TO_PHASER_D->>CMT_PHASERREF_PHASERIN_D": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASERIN_D",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_DQS_TO_PHASER_D"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF0->>CMT_PHASERREF_PHASERIN_C": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASERIN_C",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF0->>CMT_PHASERREF_PHASERIN_D": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASERIN_D",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF0->>CMT_PHASERREF_PHASEROUT_C": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASEROUT_C",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF0->>CMT_PHASERREF_PHASEROUT_D": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASEROUT_D",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF1->>CMT_PHASERREF_PHASERIN_C": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASERIN_C",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF1->>CMT_PHASERREF_PHASERIN_D": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASERIN_D",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF1->>CMT_PHASERREF_PHASEROUT_C": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASEROUT_C",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF1->>CMT_PHASERREF_PHASEROUT_D": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASEROUT_D",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_ABOVE0->>CMT_PHASERREF_PHASERIN_C": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASERIN_C",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_ABOVE0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_ABOVE0->>CMT_PHASERREF_PHASERIN_D": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASERIN_D",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_ABOVE0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_ABOVE0->>CMT_PHASERREF_PHASEROUT_C": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASEROUT_C",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_ABOVE0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_ABOVE0->>CMT_PHASERREF_PHASEROUT_D": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASEROUT_D",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_ABOVE0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_ABOVE1->>CMT_PHASERREF_PHASERIN_C": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASERIN_C",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_ABOVE1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_ABOVE1->>CMT_PHASERREF_PHASERIN_D": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASERIN_D",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_ABOVE1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_ABOVE1->>CMT_PHASERREF_PHASEROUT_C": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASEROUT_C",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_ABOVE1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_ABOVE1->>CMT_PHASERREF_PHASEROUT_D": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASEROUT_D",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_ABOVE1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_BELOW0->>CMT_PHASERREF_PHASERIN_C": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASERIN_C",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_BELOW0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_BELOW0->>CMT_PHASERREF_PHASERIN_D": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASERIN_D",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_BELOW0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_BELOW0->>CMT_PHASERREF_PHASEROUT_C": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASEROUT_C",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_BELOW0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_BELOW0->>CMT_PHASERREF_PHASEROUT_D": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASEROUT_D",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_BELOW0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_BELOW1->>CMT_PHASERREF_PHASERIN_C": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASERIN_C",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_BELOW1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_BELOW1->>CMT_PHASERREF_PHASERIN_D": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASERIN_D",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_BELOW1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_BELOW1->>CMT_PHASERREF_PHASEROUT_C": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASEROUT_C",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_BELOW1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHASER_UP_PHASERREF_BELOW1->>CMT_PHASERREF_PHASEROUT_D": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERREF_PHASEROUT_D",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHASER_UP_PHASERREF_BELOW1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_AUXOUTPUT0->CMT_TOP_LOGIC_OUTS_L_B3_9": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B3_9",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_AUXOUTPUT0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_AUXOUTPUT1->CMT_TOP_LOGIC_OUTS_L_B21_9": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B21_9",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_AUXOUTPUT1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_AUXOUTPUT2->CMT_TOP_LOGIC_OUTS_L_B17_10": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B17_10",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_AUXOUTPUT2"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_AUXOUTPUT3->CMT_TOP_LOGIC_OUTS_L_B17_11": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B17_11",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_AUXOUTPUT3"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_ECALIB0->CMT_PHASER_IN_CA_ENCALIBPHY0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_ENCALIBPHY0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_ECALIB0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_ECALIB0->CMT_PHASER_IN_DB_ENCALIBPHY0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_ENCALIBPHY0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_ECALIB0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_ECALIB0->CMT_PHASER_OUT_CA_ENCALIBPHY0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_ENCALIBPHY0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_ECALIB0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_ECALIB0->CMT_PHASER_OUT_DB_ENCALIBPHY0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_ENCALIBPHY0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_ECALIB0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_ECALIB1->CMT_PHASER_IN_CA_ENCALIBPHY1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_ENCALIBPHY1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_ECALIB1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_ECALIB1->CMT_PHASER_IN_DB_ENCALIBPHY1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_ENCALIBPHY1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_ECALIB1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_ECALIB1->CMT_PHASER_OUT_CA_ENCALIBPHY1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_ENCALIBPHY1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_ECALIB1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_ECALIB1->CMT_PHASER_OUT_DB_ENCALIBPHY1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_ENCALIBPHY1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_ECALIB1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_IBURSTPENDING2->CMT_PHASER_IN_CA_BURSTPENDINGPHY": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_BURSTPENDINGPHY",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_IBURSTPENDING2"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_IBURSTPENDING3->CMT_PHASER_IN_DB_BURSTPENDINGPHY": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_BURSTPENDINGPHY",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_IBURSTPENDING3"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_INBURSTPENDING0->CMT_PHY_CONTROL_IBURSTPENDING0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_IBURSTPENDING0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_INBURSTPENDING0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_INBURSTPENDING1->CMT_PHY_CONTROL_IBURSTPENDING1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_IBURSTPENDING1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_INBURSTPENDING1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_INBURSTPENDING2->CMT_PHY_CONTROL_IBURSTPENDING2": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_IBURSTPENDING2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_INBURSTPENDING2"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_INBURSTPENDING3->CMT_PHY_CONTROL_IBURSTPENDING3": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_IBURSTPENDING3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_INBURSTPENDING3"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_INRANKA0->CMT_PHY_CONTROL_IRANKA0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_IRANKA0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_INRANKA0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_INRANKA1->CMT_PHY_CONTROL_IRANKA1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_IRANKA1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_INRANKA1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_INRANKB0->CMT_PHY_CONTROL_IRANKB0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_IRANKB0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_INRANKB0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_INRANKB1->CMT_PHY_CONTROL_IRANKB1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_IRANKB1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_INRANKB1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_INRANKC0->CMT_PHY_CONTROL_IRANKC0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_IRANKC0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_INRANKC0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_INRANKC1->CMT_PHY_CONTROL_IRANKC1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_IRANKC1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_INRANKC1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_INRANKD0->CMT_PHY_CONTROL_IRANKD0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_IRANKD0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_INRANKD0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_INRANKD1->CMT_PHY_CONTROL_IRANKD1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_IRANKD1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_INRANKD1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_IRANKC0->CMT_PHASER_IN_CA_RANKSELPHY0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_RANKSELPHY0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_IRANKC0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_IRANKC1->CMT_PHASER_IN_CA_RANKSELPHY1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_RANKSELPHY1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_IRANKC1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_IRANKD0->CMT_PHASER_IN_DB_RANKSELPHY0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_RANKSELPHY0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_IRANKD0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_IRANKD1->CMT_PHASER_IN_DB_RANKSELPHY1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_RANKSELPHY1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_IRANKD1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_OBURSTPENDING2->CMT_PHASER_OUT_CA_BURSTPENDINGPHY": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_BURSTPENDINGPHY",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_OBURSTPENDING2"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_OBURSTPENDING3->CMT_PHASER_OUT_DB_BURSTPENDINGPHY": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_BURSTPENDINGPHY",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_OBURSTPENDING3"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_OUTBURSTPENDING0->CMT_PHY_CONTROL_OBURSTPENDING0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_OBURSTPENDING0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_OUTBURSTPENDING0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_OUTBURSTPENDING1->CMT_PHY_CONTROL_OBURSTPENDING1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_OBURSTPENDING1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_OUTBURSTPENDING1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_OUTBURSTPENDING2->CMT_PHY_CONTROL_OBURSTPENDING2": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_OBURSTPENDING2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_OUTBURSTPENDING2"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_OUTBURSTPENDING3->CMT_PHY_CONTROL_OBURSTPENDING3": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_OBURSTPENDING3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_OUTBURSTPENDING3"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_PCENABLECALIB0->CMT_PHY_CONTROL_ECALIB0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_ECALIB0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_PCENABLECALIB0"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_PCENABLECALIB1->CMT_PHY_CONTROL_ECALIB1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_ECALIB1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_PCENABLECALIB1"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_PHYCTLALMOSTFULL->CMT_TOP_LOGIC_OUTS_L_B7_9": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B7_9",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_PHYCTLALMOSTFULL"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_PHYCTLEMPTY->CMT_PHASERTOP_PHYCTLEMPTY": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASERTOP_PHYCTLEMPTY",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_PHYCTLEMPTY"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_PHYCTLFULL->CMT_TOP_LOGIC_OUTS_L_B17_9": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B17_9",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_PHYCTLFULL"
        },
        "CMT_TOP_R_UPPER_B.CMT_PHY_CONTROL_PHYCTLREADY->CMT_TOP_LOGIC_OUTS_L_B17_8": {
            "can_invert": "0",
            "dst_wire": "CMT_TOP_LOGIC_OUTS_L_B17_8",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_PHY_CONTROL_PHYCTLREADY"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_CLK0_0->>CMT_R_TOP_UPPER_B_CLKINT_2": {
            "can_invert": "0",
            "dst_wire": "CMT_R_TOP_UPPER_B_CLKINT_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_CLK0_0"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_CLK0_10->CMT_PHY_CONTROL_PHYCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_CLK0_10"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_CLK0_2->CMT_PHASER_OUT_CA_SYSCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_SYSCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_CLK0_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_CLK0_4->CMT_PHASER_IN_CA_SYSCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_SYSCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_CLK0_4"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_CLK0_5->CMT_PHASER_OUT_DB_SYSCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_SYSCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_CLK0_5"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_CLK0_8->CMT_PHASER_IN_DB_SYSCLK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_SYSCLK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_CLK0_8"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_CLK1_0->>CMT_R_TOP_UPPER_B_CLKINT_3": {
            "can_invert": "0",
            "dst_wire": "CMT_R_TOP_UPPER_B_CLKINT_3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_CLK1_0"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX0_0->CMT_PHASER_UP_BUFMRCE_CE0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_UP_BUFMRCE_CE0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX0_0"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX0_1->CMT_PHASER_OUT_CA_SELFINEOCLKDELAY": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_SELFINEOCLKDELAY",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX0_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX0_2->CMT_PHASER_OUT_CA_DIVIDERST": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_DIVIDERST",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX0_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX0_3->CMT_PHASER_IN_CA_RSTDQSFIND": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_RSTDQSFIND",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX0_3"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX0_5->CMT_PHASER_OUT_DB_SELFINEOCLKDELAY": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_SELFINEOCLKDELAY",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX0_5"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX11_11->CMT_PHY_CONTROL_RESET": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_RESET",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX11_11"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX11_4->CMT_PHASER_IN_CA_RST": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_RST",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX11_4"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX11_5->CMT_PHASER_OUT_DB_COUNTERREADEN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_COUNTERREADEN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX11_5"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX12_7->CMT_PHASER_IN_DB_COUNTERLOADVAL3": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_COUNTERLOADVAL3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX12_7"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX13_1->CMT_PHASER_OUT_CA_COUNTERLOADVAL2": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_COUNTERLOADVAL2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX13_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX13_10->CMT_PHY_CONTROL_PHYCTLWD13": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD13",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX13_10"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX13_11->CMT_PHY_CONTROL_PHYCTLWD25": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD25",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX13_11"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX13_3->CMT_PHASER_IN_CA_COUNTERLOADVAL1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_COUNTERLOADVAL1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX13_3"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX13_9->CMT_PHY_CONTROL_PHYCTLWD3": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX13_9"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX14_1->CMT_PHASER_OUT_CA_COUNTERLOADVAL5": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_COUNTERLOADVAL5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX14_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX14_10->CMT_PHY_CONTROL_PHYCTLWD15": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD15",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX14_10"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX14_11->CMT_PHY_CONTROL_PHYCTLWD27": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD27",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX14_11"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX14_3->CMT_PHASER_IN_CA_COUNTERLOADVAL4": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_COUNTERLOADVAL4",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX14_3"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX14_6->CMT_PHASER_IN_DB_COUNTERLOADEN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_COUNTERLOADEN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX14_6"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX14_7->CMT_PHASER_IN_DB_EDGEADV": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_EDGEADV",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX14_7"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX14_9->CMT_PHY_CONTROL_PHYCTLWD5": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX14_9"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX15_0->CMT_PHASER_REF_RST": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_REF_RST",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX15_0"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX15_1->CMT_PHASER_OUT_CA_COUNTERREADEN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_COUNTERREADEN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX15_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX15_10->CMT_PHY_CONTROL_PHYCTLWD18": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD18",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX15_10"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX15_11->CMT_PHY_CONTROL_PHYCTLWD30": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD30",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX15_11"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX15_7->CMT_PHASER_IN_DB_RANKSEL0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_RANKSEL0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX15_7"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX15_9->CMT_PHY_CONTROL_PHYCTLWD8": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD8",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX15_9"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX16_0->CMT_PHASER_UP_BUFMRCE_CE1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_UP_BUFMRCE_CE1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX16_0"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX16_6->CMT_PHASER_OUT_DB_COARSEINC": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_COARSEINC",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX16_6"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX17_2->CMT_PHASER_OUT_CA_COUNTERLOADVAL8": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_COUNTERLOADVAL8",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX17_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX17_5->CMT_PHASER_OUT_DB_COUNTERLOADVAL2": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_COUNTERLOADVAL2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX17_5"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX17_6->CMT_PHASER_OUT_DB_ENCALIB0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_ENCALIB0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX17_6"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX18_2->CMT_PHASER_OUT_CA_ENCALIB0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_ENCALIB0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX18_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX18_5->CMT_PHASER_OUT_DB_COUNTERLOADVAL5": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_COUNTERLOADVAL5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX18_5"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX19_2->CMT_PHASER_IN_CA_DIVIDERST": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_DIVIDERST",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX19_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX19_4->CMT_PHASER_OUT_DB_DIVIDERST": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_DIVIDERST",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX19_4"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX19_6->CMT_PHASER_IN_DB_DIVIDERST": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_DIVIDERST",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX19_6"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX19_7->CMT_PHASER_IN_DB_COUNTERLOADVAL0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_COUNTERLOADVAL0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX19_7"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX1_2->CMT_PHASER_OUT_CA_FINEENABLE": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_FINEENABLE",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX1_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX1_5->CMT_PHASER_OUT_DB_COUNTERLOADVAL0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_COUNTERLOADVAL0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX1_5"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX20_1->CMT_PHASER_OUT_CA_COUNTERLOADVAL0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_COUNTERLOADVAL0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX20_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX20_10->CMT_PHY_CONTROL_PHYCTLWD11": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD11",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX20_10"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX20_11->CMT_PHY_CONTROL_PHYCTLWD23": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD23",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX20_11"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX20_9->CMT_PHY_CONTROL_PHYCTLWD1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX20_9"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX22_10->CMT_PHY_CONTROL_WRITECALIBENABLE": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_WRITECALIBENABLE",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX22_10"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX23_3->CMT_PHASER_IN_CA_COUNTERREADEN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_COUNTERREADEN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX23_3"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX23_7->CMT_PHASER_IN_DB_RANKSEL1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_RANKSEL1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX23_7"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX27_2->CMT_PHASER_OUT_CA_RST": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_RST",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX27_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX27_5->CMT_PHASER_OUT_DB_COUNTERLOADEN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_COUNTERLOADEN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX27_5"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX27_7->CMT_PHASER_IN_DB_COUNTERLOADVAL1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_COUNTERLOADVAL1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX27_7"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX28_7->CMT_PHASER_IN_DB_COUNTERLOADVAL4": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_COUNTERLOADVAL4",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX28_7"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX29_1->CMT_PHASER_OUT_CA_COUNTERLOADVAL3": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_COUNTERLOADVAL3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX29_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX29_10->CMT_PHY_CONTROL_READCALIBENABLE": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_READCALIBENABLE",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX29_10"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX29_3->CMT_PHASER_IN_CA_COUNTERLOADVAL2": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_COUNTERLOADVAL2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX29_3"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX2_2->CMT_PHASER_OUT_CA_EDGEADV": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_EDGEADV",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX2_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX2_5->CMT_PHASER_OUT_DB_COUNTERLOADVAL4": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_COUNTERLOADVAL4",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX2_5"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX30_1->CMT_PHASER_OUT_CA_COUNTERLOADVAL6": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_COUNTERLOADVAL6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX30_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX30_10->CMT_PHY_CONTROL_PHYCTLWD16": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD16",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX30_10"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX30_11->CMT_PHY_CONTROL_PHYCTLWD28": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD28",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX30_11"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX30_3->CMT_PHASER_IN_CA_COUNTERLOADVAL5": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_COUNTERLOADVAL5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX30_3"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX30_6->CMT_PHASER_IN_DB_FINEINC": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_FINEINC",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX30_6"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX30_9->CMT_PHY_CONTROL_PHYCTLWD6": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX30_9"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX31_1->CMT_PHASER_OUT_CA_COUNTERLOADEN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_COUNTERLOADEN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX31_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX31_10->CMT_PHY_CONTROL_PHYCTLWD19": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD19",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX31_10"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX31_11->CMT_PHY_CONTROL_PHYCTLWD31": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD31",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX31_11"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX31_3->CMT_PHASER_IN_CA_COUNTERLOADEN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_COUNTERLOADEN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX31_3"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX31_9->CMT_PHY_CONTROL_PHYCTLWD9": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD9",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX31_9"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX32_4->CMT_PHASER_IN_CA_FINEENABLE": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_FINEENABLE",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX32_4"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX32_6->CMT_PHASER_OUT_DB_COARSEENABLE": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_COARSEENABLE",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX32_6"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX34_4->CMT_PHASER_IN_CA_RANKSEL0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_RANKSEL0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX34_4"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX34_5->CMT_PHASER_OUT_DB_COUNTERLOADVAL6": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_COUNTERLOADVAL6",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX34_5"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX34_6->CMT_PHASER_OUT_DB_RST": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_RST",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX34_6"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX37_4->CMT_PHASER_OUT_DB_COUNTERLOADVAL8": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_COUNTERLOADVAL8",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX37_4"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX39_7->CMT_PHASER_IN_DB_RST": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_RST",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX39_7"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX3_4->CMT_PHASER_IN_CA_RANKSEL1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_RANKSEL1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX3_4"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX3_5->CMT_PHASER_OUT_DB_COUNTERLOADVAL7": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_COUNTERLOADVAL7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX3_5"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX41_2->CMT_PHASER_OUT_CA_COARSEENABLE": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_COARSEENABLE",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX41_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX41_4->CMT_PHASER_IN_CA_EDGEADV": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_EDGEADV",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX41_4"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX41_5->CMT_PHASER_OUT_DB_COUNTERLOADVAL3": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_COUNTERLOADVAL3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX41_5"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX43_11->CMT_PHY_CONTROL_PHYCTLWD21": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD21",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX43_11"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX43_5->CMT_PHASER_OUT_DB_FINEINC": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_FINEINC",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX43_5"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX43_7->CMT_PHASER_IN_DB_COUNTERLOADVAL2": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_COUNTERLOADVAL2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX43_7"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX43_9->CMT_PHY_CONTROL_PLLLOCK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PLLLOCK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX43_9"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX44_1->CMT_PHASER_OUT_CA_COUNTERLOADVAL1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_COUNTERLOADVAL1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX44_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX44_10->CMT_PHY_CONTROL_PHYCTLWD12": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD12",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX44_10"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX44_11->CMT_PHY_CONTROL_PHYCTLWD24": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD24",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX44_11"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX44_3->CMT_PHASER_IN_CA_COUNTERLOADVAL0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_COUNTERLOADVAL0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX44_3"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX44_7->CMT_PHASER_IN_DB_COUNTERLOADVAL5": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_COUNTERLOADVAL5",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX44_7"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX44_9->CMT_PHY_CONTROL_PHYCTLWD2": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX44_9"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX45_0->CMT_PHASER_REF_PWRDWN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_REF_PWRDWN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX45_0"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX45_1->CMT_PHASER_OUT_CA_COUNTERLOADVAL4": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_COUNTERLOADVAL4",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX45_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX45_10->CMT_PHY_CONTROL_PHYCTLWD14": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD14",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX45_10"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX45_11->CMT_PHY_CONTROL_PHYCTLWD26": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD26",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX45_11"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX45_3->CMT_PHASER_IN_CA_COUNTERLOADVAL3": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_COUNTERLOADVAL3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX45_3"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX45_6->CMT_PHASER_IN_DB_COUNTERREADEN": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_COUNTERREADEN",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX45_6"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX45_9->CMT_PHY_CONTROL_PHYCTLWD4": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD4",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX45_9"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX46_1->CMT_PHASER_OUT_CA_COUNTERLOADVAL7": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_COUNTERLOADVAL7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX46_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX46_10->CMT_PHY_CONTROL_PHYCTLWD17": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD17",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX46_10"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX46_11->CMT_PHY_CONTROL_PHYCTLWD29": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD29",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX46_11"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX46_6->CMT_PHASER_IN_DB_FINEENABLE": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_FINEENABLE",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX46_6"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX46_9->CMT_PHY_CONTROL_PHYCTLWD7": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD7",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX46_9"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX47_1->CMT_PHASER_OUT_CA_FINEINC": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_FINEINC",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX47_1"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX47_10->CMT_PHY_CONTROL_PHYCTLWD20": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD20",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX47_10"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX47_11->CMT_PHY_CONTROL_PHYCTLWRENABLE": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWRENABLE",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX47_11"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX47_3->CMT_PHASER_IN_CA_FINEINC": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_CA_FINEINC",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX47_3"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX47_9->CMT_PHY_CONTROL_PHYCTLWD10": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD10",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX47_9"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX4_10->CMT_PHY_CONTROL_REFDLLLOCK": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_REFDLLLOCK",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX4_10"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX4_11->CMT_PHY_CONTROL_PHYCTLWD22": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD22",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX4_11"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX4_9->CMT_PHY_CONTROL_PHYCTLWD0": {
            "can_invert": "0",
            "dst_wire": "CMT_PHY_CONTROL_PHYCTLWD0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX4_9"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX8_6->CMT_PHASER_OUT_DB_FINEENABLE": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_FINEENABLE",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX8_6"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX8_7->CMT_PHASER_IN_DB_RSTDQSFIND": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_IN_DB_RSTDQSFIND",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX8_7"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX9_2->CMT_PHASER_OUT_CA_COARSEINC": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_CA_COARSEINC",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX9_2"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX9_5->CMT_PHASER_OUT_DB_COUNTERLOADVAL1": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_COUNTERLOADVAL1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX9_5"
        },
        "CMT_TOP_R_UPPER_B.CMT_TOP_IMUX9_6->CMT_PHASER_OUT_DB_EDGEADV": {
            "can_invert": "0",
            "dst_wire": "CMT_PHASER_OUT_DB_EDGEADV",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "CMT_TOP_IMUX9_6"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN0->>CMT_FREQ_PHASER_REFMUX_0": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN0"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN0->>PLLOUT_CLK_FREQ_BB_REBUFOUT0": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN0"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN0->>PLLOUT_CLK_FREQ_BB_REBUFOUT1": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN0"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN0->>PLLOUT_CLK_FREQ_BB_REBUFOUT2": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN0"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN0->>PLLOUT_CLK_FREQ_BB_REBUFOUT3": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN0"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN1->>CMT_FREQ_PHASER_REFMUX_1": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN1"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN1->>PLLOUT_CLK_FREQ_BB_REBUFOUT0": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN1"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN1->>PLLOUT_CLK_FREQ_BB_REBUFOUT1": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN1"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN1->>PLLOUT_CLK_FREQ_BB_REBUFOUT2": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN1"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN1->>PLLOUT_CLK_FREQ_BB_REBUFOUT3": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN1"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN2->>CMT_FREQ_PHASER_REFMUX_2": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_PHASER_REFMUX_2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN2"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN2->>PLLOUT_CLK_FREQ_BB_REBUFOUT0": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN2"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN2->>PLLOUT_CLK_FREQ_BB_REBUFOUT1": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN2"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN2->>PLLOUT_CLK_FREQ_BB_REBUFOUT2": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN2"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN2->>PLLOUT_CLK_FREQ_BB_REBUFOUT3": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN2"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN3->>PLLOUT_CLK_FREQ_BB_REBUFOUT0": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN3"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN3->>PLLOUT_CLK_FREQ_BB_REBUFOUT1": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN3"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN3->>PLLOUT_CLK_FREQ_BB_REBUFOUT2": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN3"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFIN3->>PLLOUT_CLK_FREQ_BB_REBUFOUT3": {
            "can_invert": "0",
            "dst_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFIN3"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFOUT0->>PLL_CLK_FREQBB_REBUFOUT0": {
            "can_invert": "0",
            "dst_wire": "PLL_CLK_FREQBB_REBUFOUT0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT0"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFOUT1->>PLL_CLK_FREQBB_REBUFOUT1": {
            "can_invert": "0",
            "dst_wire": "PLL_CLK_FREQBB_REBUFOUT1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT1"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFOUT2->>PLL_CLK_FREQBB_REBUFOUT2": {
            "can_invert": "0",
            "dst_wire": "PLL_CLK_FREQBB_REBUFOUT2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT2"
        },
        "CMT_TOP_R_UPPER_B.PLLOUT_CLK_FREQ_BB_REBUFOUT3->>PLL_CLK_FREQBB_REBUFOUT3": {
            "can_invert": "0",
            "dst_wire": "PLL_CLK_FREQBB_REBUFOUT3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLLOUT_CLK_FREQ_BB_REBUFOUT3"
        },
        "CMT_TOP_R_UPPER_B.PLL_CLK_FREQBB_REBUFOUT0->>CMT_FREQ_BB_PREF_IN0": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_BB_PREF_IN0",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLL_CLK_FREQBB_REBUFOUT0"
        },
        "CMT_TOP_R_UPPER_B.PLL_CLK_FREQBB_REBUFOUT1->>CMT_FREQ_BB_PREF_IN1": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_BB_PREF_IN1",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLL_CLK_FREQBB_REBUFOUT1"
        },
        "CMT_TOP_R_UPPER_B.PLL_CLK_FREQBB_REBUFOUT2->>CMT_FREQ_BB_PREF_IN2": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_BB_PREF_IN2",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLL_CLK_FREQBB_REBUFOUT2"
        },
        "CMT_TOP_R_UPPER_B.PLL_CLK_FREQBB_REBUFOUT3->>CMT_FREQ_BB_PREF_IN3": {
            "can_invert": "0",
            "dst_wire": "CMT_FREQ_BB_PREF_IN3",
            "is_directional": "1",
            "is_pseudo": "0",
            "src_wire": "PLL_CLK_FREQBB_REBUFOUT3"
        }
    },
    "sites": [
        {
            "name": "X0Y0",
            "prefix": "PHASER_REF",
            "site_pins": {
                "CLKIN": "CMT_PHASER_REF_CLKIN",
                "CLKOUT": "CMT_PHASER_REF_CLKOUT",
                "LOCKED": "CMT_PHASER_REF_LOCKED",
                "PWRDWN": "CMT_PHASER_REF_PWRDWN",
                "RST": "CMT_PHASER_REF_RST",
                "TESTIN0": "CMT_PHASER_REF_TESTIN0",
                "TESTIN1": "CMT_PHASER_REF_TESTIN1",
                "TESTIN2": "CMT_PHASER_REF_TESTIN2",
                "TESTIN3": "CMT_PHASER_REF_TESTIN3",
                "TESTIN4": "CMT_PHASER_REF_TESTIN4",
                "TESTIN5": "CMT_PHASER_REF_TESTIN5",
                "TESTIN6": "CMT_PHASER_REF_TESTIN6",
                "TESTIN7": "CMT_PHASER_REF_TESTIN7",
                "TESTOUT0": "CMT_PHASER_REF_TESTOUT0",
                "TESTOUT1": "CMT_PHASER_REF_TESTOUT1",
                "TESTOUT2": "CMT_PHASER_REF_TESTOUT2",
                "TESTOUT3": "CMT_PHASER_REF_TESTOUT3",
                "TESTOUT4": "CMT_PHASER_REF_TESTOUT4",
                "TESTOUT5": "CMT_PHASER_REF_TESTOUT5",
                "TESTOUT6": "CMT_PHASER_REF_TESTOUT6",
                "TESTOUT7": "CMT_PHASER_REF_TESTOUT7",
                "TMUXOUT": "CMT_PHASER_REF_TMUXOUT"
            },
            "type": "PHASER_REF",
            "x_coord": 0,
            "y_coord": 0
        },
        {
            "name": "X0Y0",
            "prefix": "PHY_CONTROL",
            "site_pins": {
                "AUXOUTPUT0": "CMT_PHY_CONTROL_AUXOUTPUT0",
                "AUXOUTPUT1": "CMT_PHY_CONTROL_AUXOUTPUT1",
                "AUXOUTPUT2": "CMT_PHY_CONTROL_AUXOUTPUT2",
                "AUXOUTPUT3": "CMT_PHY_CONTROL_AUXOUTPUT3",
                "INBURSTPENDING0": "CMT_PHY_CONTROL_INBURSTPENDING0",
                "INBURSTPENDING1": "CMT_PHY_CONTROL_INBURSTPENDING1",
                "INBURSTPENDING2": "CMT_PHY_CONTROL_INBURSTPENDING2",
                "INBURSTPENDING3": "CMT_PHY_CONTROL_INBURSTPENDING3",
                "INRANKA0": "CMT_PHY_CONTROL_INRANKA0",
                "INRANKA1": "CMT_PHY_CONTROL_INRANKA1",
                "INRANKB0": "CMT_PHY_CONTROL_INRANKB0",
                "INRANKB1": "CMT_PHY_CONTROL_INRANKB1",
                "INRANKC0": "CMT_PHY_CONTROL_INRANKC0",
                "INRANKC1": "CMT_PHY_CONTROL_INRANKC1",
                "INRANKD0": "CMT_PHY_CONTROL_INRANKD0",
                "INRANKD1": "CMT_PHY_CONTROL_INRANKD1",
                "MEMREFCLK": "CMT_PHY_CONTROL_MEMREFCLK",
                "OUTBURSTPENDING0": "CMT_PHY_CONTROL_OUTBURSTPENDING0",
                "OUTBURSTPENDING1": "CMT_PHY_CONTROL_OUTBURSTPENDING1",
                "OUTBURSTPENDING2": "CMT_PHY_CONTROL_OUTBURSTPENDING2",
                "OUTBURSTPENDING3": "CMT_PHY_CONTROL_OUTBURSTPENDING3",
                "PCENABLECALIB0": "CMT_PHY_CONTROL_PCENABLECALIB0",
                "PCENABLECALIB1": "CMT_PHY_CONTROL_PCENABLECALIB1",
                "PHYCLK": "CMT_PHY_CONTROL_PHYCLK",
                "PHYCTLALMOSTFULL": "CMT_PHY_CONTROL_PHYCTLALMOSTFULL",
                "PHYCTLEMPTY": "CMT_PHY_CONTROL_PHYCTLEMPTY",
                "PHYCTLFULL": "CMT_PHY_CONTROL_PHYCTLFULL",
                "PHYCTLMSTREMPTY": "CMT_PHY_CONTROL_PHYCTLMSTREMPTY",
                "PHYCTLREADY": "CMT_PHY_CONTROL_PHYCTLREADY",
                "PHYCTLWD0": "CMT_PHY_CONTROL_PHYCTLWD0",
                "PHYCTLWD1": "CMT_PHY_CONTROL_PHYCTLWD1",
                "PHYCTLWD10": "CMT_PHY_CONTROL_PHYCTLWD10",
                "PHYCTLWD11": "CMT_PHY_CONTROL_PHYCTLWD11",
                "PHYCTLWD12": "CMT_PHY_CONTROL_PHYCTLWD12",
                "PHYCTLWD13": "CMT_PHY_CONTROL_PHYCTLWD13",
                "PHYCTLWD14": "CMT_PHY_CONTROL_PHYCTLWD14",
                "PHYCTLWD15": "CMT_PHY_CONTROL_PHYCTLWD15",
                "PHYCTLWD16": "CMT_PHY_CONTROL_PHYCTLWD16",
                "PHYCTLWD17": "CMT_PHY_CONTROL_PHYCTLWD17",
                "PHYCTLWD18": "CMT_PHY_CONTROL_PHYCTLWD18",
                "PHYCTLWD19": "CMT_PHY_CONTROL_PHYCTLWD19",
                "PHYCTLWD2": "CMT_PHY_CONTROL_PHYCTLWD2",
                "PHYCTLWD20": "CMT_PHY_CONTROL_PHYCTLWD20",
                "PHYCTLWD21": "CMT_PHY_CONTROL_PHYCTLWD21",
                "PHYCTLWD22": "CMT_PHY_CONTROL_PHYCTLWD22",
                "PHYCTLWD23": "CMT_PHY_CONTROL_PHYCTLWD23",
                "PHYCTLWD24": "CMT_PHY_CONTROL_PHYCTLWD24",
                "PHYCTLWD25": "CMT_PHY_CONTROL_PHYCTLWD25",
                "PHYCTLWD26": "CMT_PHY_CONTROL_PHYCTLWD26",
                "PHYCTLWD27": "CMT_PHY_CONTROL_PHYCTLWD27",
                "PHYCTLWD28": "CMT_PHY_CONTROL_PHYCTLWD28",
                "PHYCTLWD29": "CMT_PHY_CONTROL_PHYCTLWD29",
                "PHYCTLWD3": "CMT_PHY_CONTROL_PHYCTLWD3",
                "PHYCTLWD30": "CMT_PHY_CONTROL_PHYCTLWD30",
                "PHYCTLWD31": "CMT_PHY_CONTROL_PHYCTLWD31",
                "PHYCTLWD4": "CMT_PHY_CONTROL_PHYCTLWD4",
                "PHYCTLWD5": "CMT_PHY_CONTROL_PHYCTLWD5",
                "PHYCTLWD6": "CMT_PHY_CONTROL_PHYCTLWD6",
                "PHYCTLWD7": "CMT_PHY_CONTROL_PHYCTLWD7",
                "PHYCTLWD8": "CMT_PHY_CONTROL_PHYCTLWD8",
                "PHYCTLWD9": "CMT_PHY_CONTROL_PHYCTLWD9",
                "PHYCTLWRENABLE": "CMT_PHY_CONTROL_PHYCTLWRENABLE",
                "PLLLOCK": "CMT_PHY_CONTROL_PLLLOCK",
                "READCALIBENABLE": "CMT_PHY_CONTROL_READCALIBENABLE",
                "REFDLLLOCK": "CMT_PHY_CONTROL_REFDLLLOCK",
                "RESET": "CMT_PHY_CONTROL_RESET",
                "SCANENABLEN": "CMT_PHY_CONTROL_SCANENABLEN",
                "SYNCIN": "CMT_PHY_CONTROL_SYNCIN",
                "TESTINPUT0": "CMT_PHY_CONTROL_TESTINPUT0",
                "TESTINPUT1": "CMT_PHY_CONTROL_TESTINPUT1",
                "TESTINPUT10": "CMT_PHY_CONTROL_TESTINPUT10",
                "TESTINPUT11": "CMT_PHY_CONTROL_TESTINPUT11",
                "TESTINPUT12": "CMT_PHY_CONTROL_TESTINPUT12",
                "TESTINPUT13": "CMT_PHY_CONTROL_TESTINPUT13",
                "TESTINPUT14": "CMT_PHY_CONTROL_TESTINPUT14",
                "TESTINPUT15": "CMT_PHY_CONTROL_TESTINPUT15",
                "TESTINPUT2": "CMT_PHY_CONTROL_TESTINPUT2",
                "TESTINPUT3": "CMT_PHY_CONTROL_TESTINPUT3",
                "TESTINPUT4": "CMT_PHY_CONTROL_TESTINPUT4",
                "TESTINPUT5": "CMT_PHY_CONTROL_TESTINPUT5",
                "TESTINPUT6": "CMT_PHY_CONTROL_TESTINPUT6",
                "TESTINPUT7": "CMT_PHY_CONTROL_TESTINPUT7",
                "TESTINPUT8": "CMT_PHY_CONTROL_TESTINPUT8",
                "TESTINPUT9": "CMT_PHY_CONTROL_TESTINPUT9",
                "TESTOUTPUT0": "CMT_PHY_CONTROL_TESTOUTPUT0",
                "TESTOUTPUT1": "CMT_PHY_CONTROL_TESTOUTPUT1",
                "TESTOUTPUT10": "CMT_PHY_CONTROL_TESTOUTPUT10",
                "TESTOUTPUT11": "CMT_PHY_CONTROL_TESTOUTPUT11",
                "TESTOUTPUT12": "CMT_PHY_CONTROL_TESTOUTPUT12",
                "TESTOUTPUT13": "CMT_PHY_CONTROL_TESTOUTPUT13",
                "TESTOUTPUT14": "CMT_PHY_CONTROL_TESTOUTPUT14",
                "TESTOUTPUT15": "CMT_PHY_CONTROL_TESTOUTPUT15",
                "TESTOUTPUT2": "CMT_PHY_CONTROL_TESTOUTPUT2",
                "TESTOUTPUT3": "CMT_PHY_CONTROL_TESTOUTPUT3",
                "TESTOUTPUT4": "CMT_PHY_CONTROL_TESTOUTPUT4",
                "TESTOUTPUT5": "CMT_PHY_CONTROL_TESTOUTPUT5",
                "TESTOUTPUT6": "CMT_PHY_CONTROL_TESTOUTPUT6",
                "TESTOUTPUT7": "CMT_PHY_CONTROL_TESTOUTPUT7",
                "TESTOUTPUT8": "CMT_PHY_CONTROL_TESTOUTPUT8",
                "TESTOUTPUT9": "CMT_PHY_CONTROL_TESTOUTPUT9",
                "TESTSELECT0": "CMT_PHY_CONTROL_TESTSELECT0",
                "TESTSELECT1": "CMT_PHY_CONTROL_TESTSELECT1",
                "TESTSELECT2": "CMT_PHY_CONTROL_TESTSELECT2",
                "WRITECALIBENABLE": "CMT_PHY_CONTROL_WRITECALIBENABLE"
            },
            "type": "PHY_CONTROL",
            "x_coord": 0,
            "y_coord": 0
        },
        {
            "name": "X0Y11",
            "prefix": "PHASER_OUT_PHY",
            "site_pins": {
                "BURSTPENDING": "CMT_PHASER_OUT_CA_BURSTPENDING",
                "BURSTPENDINGPHY": "CMT_PHASER_OUT_CA_BURSTPENDINGPHY",
                "COARSEENABLE": "CMT_PHASER_OUT_CA_COARSEENABLE",
                "COARSEINC": "CMT_PHASER_OUT_CA_COARSEINC",
                "COARSEOVERFLOW": "CMT_PHASER_OUT_CA_COARSEOVERFLOW",
                "COUNTERLOADEN": "CMT_PHASER_OUT_CA_COUNTERLOADEN",
                "COUNTERLOADVAL0": "CMT_PHASER_OUT_CA_COUNTERLOADVAL0",
                "COUNTERLOADVAL1": "CMT_PHASER_OUT_CA_COUNTERLOADVAL1",
                "COUNTERLOADVAL2": "CMT_PHASER_OUT_CA_COUNTERLOADVAL2",
                "COUNTERLOADVAL3": "CMT_PHASER_OUT_CA_COUNTERLOADVAL3",
                "COUNTERLOADVAL4": "CMT_PHASER_OUT_CA_COUNTERLOADVAL4",
                "COUNTERLOADVAL5": "CMT_PHASER_OUT_CA_COUNTERLOADVAL5",
                "COUNTERLOADVAL6": "CMT_PHASER_OUT_CA_COUNTERLOADVAL6",
                "COUNTERLOADVAL7": "CMT_PHASER_OUT_CA_COUNTERLOADVAL7",
                "COUNTERLOADVAL8": "CMT_PHASER_OUT_CA_COUNTERLOADVAL8",
                "COUNTERREADEN": "CMT_PHASER_OUT_CA_COUNTERREADEN",
                "COUNTERREADVAL0": "CMT_PHASER_OUT_CA_COUNTERREADVAL0",
                "COUNTERREADVAL1": "CMT_PHASER_OUT_CA_COUNTERREADVAL1",
                "COUNTERREADVAL2": "CMT_PHASER_OUT_CA_COUNTERREADVAL2",
                "COUNTERREADVAL3": "CMT_PHASER_OUT_CA_COUNTERREADVAL3",
                "COUNTERREADVAL4": "CMT_PHASER_OUT_CA_COUNTERREADVAL4",
                "COUNTERREADVAL5": "CMT_PHASER_OUT_CA_COUNTERREADVAL5",
                "COUNTERREADVAL6": "CMT_PHASER_OUT_CA_COUNTERREADVAL6",
                "COUNTERREADVAL7": "CMT_PHASER_OUT_CA_COUNTERREADVAL7",
                "COUNTERREADVAL8": "CMT_PHASER_OUT_CA_COUNTERREADVAL8",
                "CTSBUS0": "CMT_PHASER_OUT_CA_CTSBUS0",
                "CTSBUS1": "CMT_PHASER_OUT_CA_CTSBUS1",
                "DIVIDERST": "CMT_PHASER_OUT_CA_DIVIDERST",
                "DQSBUS0": "CMT_PHASER_OUT_CA_DQSBUS0",
                "DQSBUS1": "CMT_PHASER_OUT_CA_DQSBUS1",
                "DTSBUS0": "CMT_PHASER_OUT_CA_DTSBUS0",
                "DTSBUS1": "CMT_PHASER_OUT_CA_DTSBUS1",
                "EDGEADV": "CMT_PHASER_OUT_CA_EDGEADV",
                "ENCALIB0": "CMT_PHASER_OUT_CA_ENCALIB0",
                "ENCALIB1": "CMT_PHASER_OUT_CA_ENCALIB1",
                "ENCALIBPHY0": "CMT_PHASER_OUT_CA_ENCALIBPHY0",
                "ENCALIBPHY1": "CMT_PHASER_OUT_CA_ENCALIBPHY1",
                "FINEENABLE": "CMT_PHASER_OUT_CA_FINEENABLE",
                "FINEINC": "CMT_PHASER_OUT_CA_FINEINC",
                "FINEOVERFLOW": "CMT_PHASER_OUT_CA_FINEOVERFLOW",
                "FREQREFCLK": "CMT_PHASER_OUT_CA_FREQREFCLK",
                "MEMREFCLK": "CMT_PHASER_OUT_CA_MEMREFCLK",
                "OCLK": "CMT_PHASER_OUT_CA_OCLK",
                "OCLKDELAYED": "CMT_PHASER_OUT_CA_OCLKDELAYED",
                "OCLKDIV": "CMT_PHASER_OUT_CA_OCLKDIV",
                "OSERDESRST": "CMT_PHASER_OUT_CA_OSERDESRST",
                "PHASEREFCLK": "CMT_PHASER_OUT_CA_PHASEREFCLK",
                "RDENABLE": "CMT_PHASER_OUT_CA_RDENABLE",
                "RST": "CMT_PHASER_OUT_CA_RST",
                "SCANCLK": "CMT_PHASER_OUT_CA_SCANCLK",
                "SCANENB": "CMT_PHASER_OUT_CA_SCANENB",
                "SCANIN": "CMT_PHASER_OUT_CA_SCANIN",
                "SCANMODEB": "CMT_PHASER_OUT_CA_SCANMODEB",
                "SCANOUT": "CMT_PHASER_OUT_CA_SCANOUT",
                "SELFINEOCLKDELAY": "CMT_PHASER_OUT_CA_SELFINEOCLKDELAY",
                "SYNCIN": "CMT_PHASER_OUT_CA_SYNCIN",
                "SYSCLK": "CMT_PHASER_OUT_CA_SYSCLK",
                "TESTIN0": "CMT_PHASER_OUT_CA_TESTIN0",
                "TESTIN1": "CMT_PHASER_OUT_CA_TESTIN1",
                "TESTIN10": "CMT_PHASER_OUT_CA_TESTIN10",
                "TESTIN11": "CMT_PHASER_OUT_CA_TESTIN11",
                "TESTIN12": "CMT_PHASER_OUT_CA_TESTIN12",
                "TESTIN13": "CMT_PHASER_OUT_CA_TESTIN13",
                "TESTIN14": "CMT_PHASER_OUT_CA_TESTIN14",
                "TESTIN15": "CMT_PHASER_OUT_CA_TESTIN15",
                "TESTIN2": "CMT_PHASER_OUT_CA_TESTIN2",
                "TESTIN3": "CMT_PHASER_OUT_CA_TESTIN3",
                "TESTIN4": "CMT_PHASER_OUT_CA_TESTIN4",
                "TESTIN5": "CMT_PHASER_OUT_CA_TESTIN5",
                "TESTIN6": "CMT_PHASER_OUT_CA_TESTIN6",
                "TESTIN7": "CMT_PHASER_OUT_CA_TESTIN7",
                "TESTIN8": "CMT_PHASER_OUT_CA_TESTIN8",
                "TESTIN9": "CMT_PHASER_OUT_CA_TESTIN9",
                "TESTOUT0": "CMT_PHASER_OUT_CA_TESTOUT0",
                "TESTOUT1": "CMT_PHASER_OUT_CA_TESTOUT1",
                "TESTOUT2": "CMT_PHASER_OUT_CA_TESTOUT2",
                "TESTOUT3": "CMT_PHASER_OUT_CA_TESTOUT3"
            },
            "type": "PHASER_OUT_PHY",
            "x_coord": 0,
            "y_coord": 11
        },
        {
            "name": "X0Y11",
            "prefix": "PHASER_IN_PHY",
            "site_pins": {
                "BURSTPENDING": "CMT_PHASER_IN_CA_BURSTPENDING",
                "BURSTPENDINGPHY": "CMT_PHASER_IN_CA_BURSTPENDINGPHY",
                "COUNTERLOADEN": "CMT_PHASER_IN_CA_COUNTERLOADEN",
                "COUNTERLOADVAL0": "CMT_PHASER_IN_CA_COUNTERLOADVAL0",
                "COUNTERLOADVAL1": "CMT_PHASER_IN_CA_COUNTERLOADVAL1",
                "COUNTERLOADVAL2": "CMT_PHASER_IN_CA_COUNTERLOADVAL2",
                "COUNTERLOADVAL3": "CMT_PHASER_IN_CA_COUNTERLOADVAL3",
                "COUNTERLOADVAL4": "CMT_PHASER_IN_CA_COUNTERLOADVAL4",
                "COUNTERLOADVAL5": "CMT_PHASER_IN_CA_COUNTERLOADVAL5",
                "COUNTERREADEN": "CMT_PHASER_IN_CA_COUNTERREADEN",
                "COUNTERREADVAL0": "CMT_PHASER_IN_CA_COUNTERREADVAL0",
                "COUNTERREADVAL1": "CMT_PHASER_IN_CA_COUNTERREADVAL1",
                "COUNTERREADVAL2": "CMT_PHASER_IN_CA_COUNTERREADVAL2",
                "COUNTERREADVAL3": "CMT_PHASER_IN_CA_COUNTERREADVAL3",
                "COUNTERREADVAL4": "CMT_PHASER_IN_CA_COUNTERREADVAL4",
                "COUNTERREADVAL5": "CMT_PHASER_IN_CA_COUNTERREADVAL5",
                "DIVIDERST": "CMT_PHASER_IN_CA_DIVIDERST",
                "DQSFOUND": "CMT_PHASER_IN_CA_DQSFOUND",
                "DQSOUTOFRANGE": "CMT_PHASER_IN_CA_DQSOUTOFRANGE",
                "EDGEADV": "CMT_PHASER_IN_CA_EDGEADV",
                "ENCALIB0": "CMT_PHASER_IN_CA_ENCALIB0",
                "ENCALIB1": "CMT_PHASER_IN_CA_ENCALIB1",
                "ENCALIBPHY0": "CMT_PHASER_IN_CA_ENCALIBPHY0",
                "ENCALIBPHY1": "CMT_PHASER_IN_CA_ENCALIBPHY1",
                "ENSTG1": "CMT_PHASER_IN_CA_ENSTG1",
                "ENSTG1ADJUSTB": "CMT_PHASER_IN_CA_ENSTG1ADJUSTB",
                "FINEENABLE": "CMT_PHASER_IN_CA_FINEENABLE",
                "FINEINC": "CMT_PHASER_IN_CA_FINEINC",
                "FINEOVERFLOW": "CMT_PHASER_IN_CA_FINEOVERFLOW",
                "FREQREFCLK": "CMT_PHASER_IN_CA_FREQREFCLK",
                "ICLK": "CMT_PHASER_IN_CA_ICLK",
                "ICLKDIV": "CMT_PHASER_IN_CA_ICLKDIV",
                "ISERDESRST": "CMT_PHASER_IN_CA_ISERDESRST",
                "MEMREFCLK": "CMT_PHASER_IN_CA_MEMREFCLK",
                "PHASELOCKED": "CMT_PHASER_IN_CA_PHASELOCKED",
                "PHASEREFCLK": "CMT_PHASER_IN_CA_PHASEREFCLK",
                "RANKSEL0": "CMT_PHASER_IN_CA_RANKSEL0",
                "RANKSEL1": "CMT_PHASER_IN_CA_RANKSEL1",
                "RANKSELPHY0": "CMT_PHASER_IN_CA_RANKSELPHY0",
                "RANKSELPHY1": "CMT_PHASER_IN_CA_RANKSELPHY1",
                "RCLK": "CMT_PHASER_IN_CA_RCLK",
                "RST": "CMT_PHASER_IN_CA_RST",
                "RSTDQSFIND": "CMT_PHASER_IN_CA_RSTDQSFIND",
                "SCANCLK": "CMT_PHASER_IN_CA_SCANCLK",
                "SCANENB": "CMT_PHASER_IN_CA_SCANENB",
                "SCANIN": "CMT_PHASER_IN_CA_SCANIN",
                "SCANMODEB": "CMT_PHASER_IN_CA_SCANMODEB",
                "SCANOUT": "CMT_PHASER_IN_CA_SCANOUT",
                "SELCALORSTG1": "CMT_PHASER_IN_CA_SELCALORSTG1",
                "STG1INCDEC": "CMT_PHASER_IN_CA_STG1INCDEC",
                "STG1LOAD": "CMT_PHASER_IN_CA_STG1LOAD",
                "STG1OVERFLOW": "CMT_PHASER_IN_CA_STG1OVERFLOW",
                "STG1READ": "CMT_PHASER_IN_CA_STG1READ",
                "STG1REGL0": "CMT_PHASER_IN_CA_STG1REGL0",
                "STG1REGL1": "CMT_PHASER_IN_CA_STG1REGL1",
                "STG1REGL2": "CMT_PHASER_IN_CA_STG1REGL2",
                "STG1REGL3": "CMT_PHASER_IN_CA_STG1REGL3",
                "STG1REGL4": "CMT_PHASER_IN_CA_STG1REGL4",
                "STG1REGL5": "CMT_PHASER_IN_CA_STG1REGL5",
                "STG1REGL6": "CMT_PHASER_IN_CA_STG1REGL6",
                "STG1REGL7": "CMT_PHASER_IN_CA_STG1REGL7",
                "STG1REGL8": "CMT_PHASER_IN_CA_STG1REGL8",
                "STG1REGR0": "CMT_PHASER_IN_CA_STG1REGR0",
                "STG1REGR1": "CMT_PHASER_IN_CA_STG1REGR1",
                "STG1REGR2": "CMT_PHASER_IN_CA_STG1REGR2",
                "STG1REGR3": "CMT_PHASER_IN_CA_STG1REGR3",
                "STG1REGR4": "CMT_PHASER_IN_CA_STG1REGR4",
                "STG1REGR5": "CMT_PHASER_IN_CA_STG1REGR5",
                "STG1REGR6": "CMT_PHASER_IN_CA_STG1REGR6",
                "STG1REGR7": "CMT_PHASER_IN_CA_STG1REGR7",
                "STG1REGR8": "CMT_PHASER_IN_CA_STG1REGR8",
                "SYNCIN": "CMT_PHASER_IN_CA_SYNCIN",
                "SYSCLK": "CMT_PHASER_IN_CA_SYSCLK",
                "TESTIN0": "CMT_PHASER_IN_CA_TESTIN0",
                "TESTIN1": "CMT_PHASER_IN_CA_TESTIN1",
                "TESTIN10": "CMT_PHASER_IN_CA_TESTIN10",
                "TESTIN11": "CMT_PHASER_IN_CA_TESTIN11",
                "TESTIN12": "CMT_PHASER_IN_CA_TESTIN12",
                "TESTIN13": "CMT_PHASER_IN_CA_TESTIN13",
                "TESTIN2": "CMT_PHASER_IN_CA_TESTIN2",
                "TESTIN3": "CMT_PHASER_IN_CA_TESTIN3",
                "TESTIN4": "CMT_PHASER_IN_CA_TESTIN4",
                "TESTIN5": "CMT_PHASER_IN_CA_TESTIN5",
                "TESTIN6": "CMT_PHASER_IN_CA_TESTIN6",
                "TESTIN7": "CMT_PHASER_IN_CA_TESTIN7",
                "TESTIN8": "CMT_PHASER_IN_CA_TESTIN8",
                "TESTIN9": "CMT_PHASER_IN_CA_TESTIN9",
                "TESTOUT0": "CMT_PHASER_IN_CA_TESTOUT0",
                "TESTOUT1": "CMT_PHASER_IN_CA_TESTOUT1",
                "TESTOUT2": "CMT_PHASER_IN_CA_TESTOUT2",
                "TESTOUT3": "CMT_PHASER_IN_CA_TESTOUT3",
                "WRENABLE": "CMT_PHASER_IN_CA_WRENABLE"
            },
            "type": "PHASER_IN_PHY",
            "x_coord": 0,
            "y_coord": 11
        },
        {
            "name": "X0Y12",
            "prefix": "PHASER_OUT_PHY",
            "site_pins": {
                "BURSTPENDING": "CMT_PHASER_OUT_DB_BURSTPENDING",
                "BURSTPENDINGPHY": "CMT_PHASER_OUT_DB_BURSTPENDINGPHY",
                "COARSEENABLE": "CMT_PHASER_OUT_DB_COARSEENABLE",
                "COARSEINC": "CMT_PHASER_OUT_DB_COARSEINC",
                "COARSEOVERFLOW": "CMT_PHASER_OUT_DB_COARSEOVERFLOW",
                "COUNTERLOADEN": "CMT_PHASER_OUT_DB_COUNTERLOADEN",
                "COUNTERLOADVAL0": "CMT_PHASER_OUT_DB_COUNTERLOADVAL0",
                "COUNTERLOADVAL1": "CMT_PHASER_OUT_DB_COUNTERLOADVAL1",
                "COUNTERLOADVAL2": "CMT_PHASER_OUT_DB_COUNTERLOADVAL2",
                "COUNTERLOADVAL3": "CMT_PHASER_OUT_DB_COUNTERLOADVAL3",
                "COUNTERLOADVAL4": "CMT_PHASER_OUT_DB_COUNTERLOADVAL4",
                "COUNTERLOADVAL5": "CMT_PHASER_OUT_DB_COUNTERLOADVAL5",
                "COUNTERLOADVAL6": "CMT_PHASER_OUT_DB_COUNTERLOADVAL6",
                "COUNTERLOADVAL7": "CMT_PHASER_OUT_DB_COUNTERLOADVAL7",
                "COUNTERLOADVAL8": "CMT_PHASER_OUT_DB_COUNTERLOADVAL8",
                "COUNTERREADEN": "CMT_PHASER_OUT_DB_COUNTERREADEN",
                "COUNTERREADVAL0": "CMT_PHASER_OUT_DB_COUNTERREADVAL0",
                "COUNTERREADVAL1": "CMT_PHASER_OUT_DB_COUNTERREADVAL1",
                "COUNTERREADVAL2": "CMT_PHASER_OUT_DB_COUNTERREADVAL2",
                "COUNTERREADVAL3": "CMT_PHASER_OUT_DB_COUNTERREADVAL3",
                "COUNTERREADVAL4": "CMT_PHASER_OUT_DB_COUNTERREADVAL4",
                "COUNTERREADVAL5": "CMT_PHASER_OUT_DB_COUNTERREADVAL5",
                "COUNTERREADVAL6": "CMT_PHASER_OUT_DB_COUNTERREADVAL6",
                "COUNTERREADVAL7": "CMT_PHASER_OUT_DB_COUNTERREADVAL7",
                "COUNTERREADVAL8": "CMT_PHASER_OUT_DB_COUNTERREADVAL8",
                "CTSBUS0": "CMT_PHASER_OUT_DB_CTSBUS0",
                "CTSBUS1": "CMT_PHASER_OUT_DB_CTSBUS1",
                "DIVIDERST": "CMT_PHASER_OUT_DB_DIVIDERST",
                "DQSBUS0": "CMT_PHASER_OUT_DB_DQSBUS0",
                "DQSBUS1": "CMT_PHASER_OUT_DB_DQSBUS1",
                "DTSBUS0": "CMT_PHASER_OUT_DB_DTSBUS0",
                "DTSBUS1": "CMT_PHASER_OUT_DB_DTSBUS1",
                "EDGEADV": "CMT_PHASER_OUT_DB_EDGEADV",
                "ENCALIB0": "CMT_PHASER_OUT_DB_ENCALIB0",
                "ENCALIB1": "CMT_PHASER_OUT_DB_ENCALIB1",
                "ENCALIBPHY0": "CMT_PHASER_OUT_DB_ENCALIBPHY0",
                "ENCALIBPHY1": "CMT_PHASER_OUT_DB_ENCALIBPHY1",
                "FINEENABLE": "CMT_PHASER_OUT_DB_FINEENABLE",
                "FINEINC": "CMT_PHASER_OUT_DB_FINEINC",
                "FINEOVERFLOW": "CMT_PHASER_OUT_DB_FINEOVERFLOW",
                "FREQREFCLK": "CMT_PHASER_OUT_DB_FREQREFCLK",
                "MEMREFCLK": "CMT_PHASER_OUT_DB_MEMREFCLK",
                "OCLK": "CMT_PHASER_OUT_DB_OCLK",
                "OCLKDELAYED": "CMT_PHASER_OUT_DB_OCLKDELAYED",
                "OCLKDIV": "CMT_PHASER_OUT_DB_OCLKDIV",
                "OSERDESRST": "CMT_PHASER_OUT_DB_OSERDESRST",
                "PHASEREFCLK": "CMT_PHASER_OUT_DB_PHASEREFCLK",
                "RDENABLE": "CMT_PHASER_OUT_DB_RDENABLE",
                "RST": "CMT_PHASER_OUT_DB_RST",
                "SCANCLK": "CMT_PHASER_OUT_DB_SCANCLK",
                "SCANENB": "CMT_PHASER_OUT_DB_SCANENB",
                "SCANIN": "CMT_PHASER_OUT_DB_SCANIN",
                "SCANMODEB": "CMT_PHASER_OUT_DB_SCANMODEB",
                "SCANOUT": "CMT_PHASER_OUT_DB_SCANOUT",
                "SELFINEOCLKDELAY": "CMT_PHASER_OUT_DB_SELFINEOCLKDELAY",
                "SYNCIN": "CMT_PHASER_OUT_DB_SYNCIN",
                "SYSCLK": "CMT_PHASER_OUT_DB_SYSCLK",
                "TESTIN0": "CMT_PHASER_OUT_DB_TESTIN0",
                "TESTIN1": "CMT_PHASER_OUT_DB_TESTIN1",
                "TESTIN10": "CMT_PHASER_OUT_DB_TESTIN10",
                "TESTIN11": "CMT_PHASER_OUT_DB_TESTIN11",
                "TESTIN12": "CMT_PHASER_OUT_DB_TESTIN12",
                "TESTIN13": "CMT_PHASER_OUT_DB_TESTIN13",
                "TESTIN14": "CMT_PHASER_OUT_DB_TESTIN14",
                "TESTIN15": "CMT_PHASER_OUT_DB_TESTIN15",
                "TESTIN2": "CMT_PHASER_OUT_DB_TESTIN2",
                "TESTIN3": "CMT_PHASER_OUT_DB_TESTIN3",
                "TESTIN4": "CMT_PHASER_OUT_DB_TESTIN4",
                "TESTIN5": "CMT_PHASER_OUT_DB_TESTIN5",
                "TESTIN6": "CMT_PHASER_OUT_DB_TESTIN6",
                "TESTIN7": "CMT_PHASER_OUT_DB_TESTIN7",
                "TESTIN8": "CMT_PHASER_OUT_DB_TESTIN8",
                "TESTIN9": "CMT_PHASER_OUT_DB_TESTIN9",
                "TESTOUT0": "CMT_PHASER_OUT_DB_TESTOUT0",
                "TESTOUT1": "CMT_PHASER_OUT_DB_TESTOUT1",
                "TESTOUT2": "CMT_PHASER_OUT_DB_TESTOUT2",
                "TESTOUT3": "CMT_PHASER_OUT_DB_TESTOUT3"
            },
            "type": "PHASER_OUT_PHY",
            "x_coord": 0,
            "y_coord": 12
        },
        {
            "name": "X0Y12",
            "prefix": "PHASER_IN_PHY",
            "site_pins": {
                "BURSTPENDING": "CMT_PHASER_IN_DB_BURSTPENDING",
                "BURSTPENDINGPHY": "CMT_PHASER_IN_DB_BURSTPENDINGPHY",
                "COUNTERLOADEN": "CMT_PHASER_IN_DB_COUNTERLOADEN",
                "COUNTERLOADVAL0": "CMT_PHASER_IN_DB_COUNTERLOADVAL0",
                "COUNTERLOADVAL1": "CMT_PHASER_IN_DB_COUNTERLOADVAL1",
                "COUNTERLOADVAL2": "CMT_PHASER_IN_DB_COUNTERLOADVAL2",
                "COUNTERLOADVAL3": "CMT_PHASER_IN_DB_COUNTERLOADVAL3",
                "COUNTERLOADVAL4": "CMT_PHASER_IN_DB_COUNTERLOADVAL4",
                "COUNTERLOADVAL5": "CMT_PHASER_IN_DB_COUNTERLOADVAL5",
                "COUNTERREADEN": "CMT_PHASER_IN_DB_COUNTERREADEN",
                "COUNTERREADVAL0": "CMT_PHASER_IN_DB_COUNTERREADVAL0",
                "COUNTERREADVAL1": "CMT_PHASER_IN_DB_COUNTERREADVAL1",
                "COUNTERREADVAL2": "CMT_PHASER_IN_DB_COUNTERREADVAL2",
                "COUNTERREADVAL3": "CMT_PHASER_IN_DB_COUNTERREADVAL3",
                "COUNTERREADVAL4": "CMT_PHASER_IN_DB_COUNTERREADVAL4",
                "COUNTERREADVAL5": "CMT_PHASER_IN_DB_COUNTERREADVAL5",
                "DIVIDERST": "CMT_PHASER_IN_DB_DIVIDERST",
                "DQSFOUND": "CMT_PHASER_IN_DB_DQSFOUND",
                "DQSOUTOFRANGE": "CMT_PHASER_IN_DB_DQSOUTOFRANGE",
                "EDGEADV": "CMT_PHASER_IN_DB_EDGEADV",
                "ENCALIB0": "CMT_PHASER_IN_DB_ENCALIB0",
                "ENCALIB1": "CMT_PHASER_IN_DB_ENCALIB1",
                "ENCALIBPHY0": "CMT_PHASER_IN_DB_ENCALIBPHY0",
                "ENCALIBPHY1": "CMT_PHASER_IN_DB_ENCALIBPHY1",
                "ENSTG1": "CMT_PHASER_IN_DB_ENSTG1",
                "ENSTG1ADJUSTB": "CMT_PHASER_IN_DB_ENSTG1ADJUSTB",
                "FINEENABLE": "CMT_PHASER_IN_DB_FINEENABLE",
                "FINEINC": "CMT_PHASER_IN_DB_FINEINC",
                "FINEOVERFLOW": "CMT_PHASER_IN_DB_FINEOVERFLOW",
                "FREQREFCLK": "CMT_PHASER_IN_DB_FREQREFCLK",
                "ICLK": "CMT_PHASER_IN_DB_ICLK",
                "ICLKDIV": "CMT_PHASER_IN_DB_ICLKDIV",
                "ISERDESRST": "CMT_PHASER_IN_DB_ISERDESRST",
                "MEMREFCLK": "CMT_PHASER_IN_DB_MEMREFCLK",
                "PHASELOCKED": "CMT_PHASER_IN_DB_PHASELOCKED",
                "PHASEREFCLK": "CMT_PHASER_IN_DB_PHASEREFCLK",
                "RANKSEL0": "CMT_PHASER_IN_DB_RANKSEL0",
                "RANKSEL1": "CMT_PHASER_IN_DB_RANKSEL1",
                "RANKSELPHY0": "CMT_PHASER_IN_DB_RANKSELPHY0",
                "RANKSELPHY1": "CMT_PHASER_IN_DB_RANKSELPHY1",
                "RCLK": "CMT_PHASER_IN_DB_RCLK",
                "RST": "CMT_PHASER_IN_DB_RST",
                "RSTDQSFIND": "CMT_PHASER_IN_DB_RSTDQSFIND",
                "SCANCLK": "CMT_PHASER_IN_DB_SCANCLK",
                "SCANENB": "CMT_PHASER_IN_DB_SCANENB",
                "SCANIN": "CMT_PHASER_IN_DB_SCANIN",
                "SCANMODEB": "CMT_PHASER_IN_DB_SCANMODEB",
                "SCANOUT": "CMT_PHASER_IN_DB_SCANOUT",
                "SELCALORSTG1": "CMT_PHASER_IN_DB_SELCALORSTG1",
                "STG1INCDEC": "CMT_PHASER_IN_DB_STG1INCDEC",
                "STG1LOAD": "CMT_PHASER_IN_DB_STG1LOAD",
                "STG1OVERFLOW": "CMT_PHASER_IN_DB_STG1OVERFLOW",
                "STG1READ": "CMT_PHASER_IN_DB_STG1READ",
                "STG1REGL0": "CMT_PHASER_IN_DB_STG1REGL0",
                "STG1REGL1": "CMT_PHASER_IN_DB_STG1REGL1",
                "STG1REGL2": "CMT_PHASER_IN_DB_STG1REGL2",
                "STG1REGL3": "CMT_PHASER_IN_DB_STG1REGL3",
                "STG1REGL4": "CMT_PHASER_IN_DB_STG1REGL4",
                "STG1REGL5": "CMT_PHASER_IN_DB_STG1REGL5",
                "STG1REGL6": "CMT_PHASER_IN_DB_STG1REGL6",
                "STG1REGL7": "CMT_PHASER_IN_DB_STG1REGL7",
                "STG1REGL8": "CMT_PHASER_IN_DB_STG1REGL8",
                "STG1REGR0": "CMT_PHASER_IN_DB_STG1REGR0",
                "STG1REGR1": "CMT_PHASER_IN_DB_STG1REGR1",
                "STG1REGR2": "CMT_PHASER_IN_DB_STG1REGR2",
                "STG1REGR3": "CMT_PHASER_IN_DB_STG1REGR3",
                "STG1REGR4": "CMT_PHASER_IN_DB_STG1REGR4",
                "STG1REGR5": "CMT_PHASER_IN_DB_STG1REGR5",
                "STG1REGR6": "CMT_PHASER_IN_DB_STG1REGR6",
                "STG1REGR7": "CMT_PHASER_IN_DB_STG1REGR7",
                "STG1REGR8": "CMT_PHASER_IN_DB_STG1REGR8",
                "SYNCIN": "CMT_PHASER_IN_DB_SYNCIN",
                "SYSCLK": "CMT_PHASER_IN_DB_SYSCLK",
                "TESTIN0": "CMT_PHASER_IN_DB_TESTIN0",
                "TESTIN1": "CMT_PHASER_IN_DB_TESTIN1",
                "TESTIN10": "CMT_PHASER_IN_DB_TESTIN10",
                "TESTIN11": "CMT_PHASER_IN_DB_TESTIN11",
                "TESTIN12": "CMT_PHASER_IN_DB_TESTIN12",
                "TESTIN13": "CMT_PHASER_IN_DB_TESTIN13",
                "TESTIN2": "CMT_PHASER_IN_DB_TESTIN2",
                "TESTIN3": "CMT_PHASER_IN_DB_TESTIN3",
                "TESTIN4": "CMT_PHASER_IN_DB_TESTIN4",
                "TESTIN5": "CMT_PHASER_IN_DB_TESTIN5",
                "TESTIN6": "CMT_PHASER_IN_DB_TESTIN6",
                "TESTIN7": "CMT_PHASER_IN_DB_TESTIN7",
                "TESTIN8": "CMT_PHASER_IN_DB_TESTIN8",
                "TESTIN9": "CMT_PHASER_IN_DB_TESTIN9",
                "TESTOUT0": "CMT_PHASER_IN_DB_TESTOUT0",
                "TESTOUT1": "CMT_PHASER_IN_DB_TESTOUT1",
                "TESTOUT2": "CMT_PHASER_IN_DB_TESTOUT2",
                "TESTOUT3": "CMT_PHASER_IN_DB_TESTOUT3",
                "WRENABLE": "CMT_PHASER_IN_DB_WRENABLE"
            },
            "type": "PHASER_IN_PHY",
            "x_coord": 0,
            "y_coord": 12
        }
    ],
    "tile_type": "CMT_TOP_R_UPPER_B",
    "wires": [
        "CMT_FREQ_BB_PREF_IN0",
        "CMT_FREQ_BB_PREF_IN1",
        "CMT_FREQ_BB_PREF_IN2",
        "CMT_FREQ_BB_PREF_IN3",
        "CMT_FREQ_PHASER_REFMUX_0",
        "CMT_FREQ_PHASER_REFMUX_1",
        "CMT_FREQ_PHASER_REFMUX_2",
        "CMT_PHASERD_CTSBUS0",
        "CMT_PHASERD_CTSBUS1",
        "CMT_PHASERD_DQSBUS0",
        "CMT_PHASERD_DQSBUS1",
        "CMT_PHASERD_DTSBUS0",
        "CMT_PHASERD_DTSBUS1",
        "CMT_PHASERREF_PHASERIN_C",
        "CMT_PHASERREF_PHASERIN_D",
        "CMT_PHASERREF_PHASEROUT_C",
        "CMT_PHASERREF_PHASEROUT_D",
        "CMT_PHASERTOP_PHYCTLEMPTY",
        "CMT_PHASERTOP_PHYCTLMSTREMPTY",
        "CMT_PHASER_C_ICLKDIV_TOIOI",
        "CMT_PHASER_C_ICLK_TOIOI",
        "CMT_PHASER_C_OCLK90_TOIOI",
        "CMT_PHASER_C_OCLKDIV_TOIOI",
        "CMT_PHASER_C_OCLK_TOIOI",
        "CMT_PHASER_IN_CA_BURSTPENDING",
        "CMT_PHASER_IN_CA_BURSTPENDINGPHY",
        "CMT_PHASER_IN_CA_COUNTERLOADEN",
        "CMT_PHASER_IN_CA_COUNTERLOADVAL0",
        "CMT_PHASER_IN_CA_COUNTERLOADVAL1",
        "CMT_PHASER_IN_CA_COUNTERLOADVAL2",
        "CMT_PHASER_IN_CA_COUNTERLOADVAL3",
        "CMT_PHASER_IN_CA_COUNTERLOADVAL4",
        "CMT_PHASER_IN_CA_COUNTERLOADVAL5",
        "CMT_PHASER_IN_CA_COUNTERREADEN",
        "CMT_PHASER_IN_CA_COUNTERREADVAL0",
        "CMT_PHASER_IN_CA_COUNTERREADVAL1",
        "CMT_PHASER_IN_CA_COUNTERREADVAL2",
        "CMT_PHASER_IN_CA_COUNTERREADVAL3",
        "CMT_PHASER_IN_CA_COUNTERREADVAL4",
        "CMT_PHASER_IN_CA_COUNTERREADVAL5",
        "CMT_PHASER_IN_CA_DIVIDERST",
        "CMT_PHASER_IN_CA_DQSFOUND",
        "CMT_PHASER_IN_CA_DQSOUTOFRANGE",
        "CMT_PHASER_IN_CA_EDGEADV",
        "CMT_PHASER_IN_CA_ENCALIB0",
        "CMT_PHASER_IN_CA_ENCALIB1",
        "CMT_PHASER_IN_CA_ENCALIBPHY0",
        "CMT_PHASER_IN_CA_ENCALIBPHY1",
        "CMT_PHASER_IN_CA_ENSTG1",
        "CMT_PHASER_IN_CA_ENSTG1ADJUSTB",
        "CMT_PHASER_IN_CA_FINEENABLE",
        "CMT_PHASER_IN_CA_FINEINC",
        "CMT_PHASER_IN_CA_FINEOVERFLOW",
        "CMT_PHASER_IN_CA_FREQREFCLK",
        "CMT_PHASER_IN_CA_ICLK",
        "CMT_PHASER_IN_CA_ICLKDIV",
        "CMT_PHASER_IN_CA_ISERDESRST",
        "CMT_PHASER_IN_CA_MEMREFCLK",
        "CMT_PHASER_IN_CA_PHASELOCKED",
        "CMT_PHASER_IN_CA_PHASEREFCLK",
        "CMT_PHASER_IN_CA_RANKSEL0",
        "CMT_PHASER_IN_CA_RANKSEL1",
        "CMT_PHASER_IN_CA_RANKSELPHY0",
        "CMT_PHASER_IN_CA_RANKSELPHY1",
        "CMT_PHASER_IN_CA_RCLK",
        "CMT_PHASER_IN_CA_RST",
        "CMT_PHASER_IN_CA_RSTDQSFIND",
        "CMT_PHASER_IN_CA_SCANCLK",
        "CMT_PHASER_IN_CA_SCANENB",
        "CMT_PHASER_IN_CA_SCANIN",
        "CMT_PHASER_IN_CA_SCANMODEB",
        "CMT_PHASER_IN_CA_SCANOUT",
        "CMT_PHASER_IN_CA_SELCALORSTG1",
        "CMT_PHASER_IN_CA_STG1INCDEC",
        "CMT_PHASER_IN_CA_STG1LOAD",
        "CMT_PHASER_IN_CA_STG1OVERFLOW",
        "CMT_PHASER_IN_CA_STG1READ",
        "CMT_PHASER_IN_CA_STG1REGL0",
        "CMT_PHASER_IN_CA_STG1REGL1",
        "CMT_PHASER_IN_CA_STG1REGL2",
        "CMT_PHASER_IN_CA_STG1REGL3",
        "CMT_PHASER_IN_CA_STG1REGL4",
        "CMT_PHASER_IN_CA_STG1REGL5",
        "CMT_PHASER_IN_CA_STG1REGL6",
        "CMT_PHASER_IN_CA_STG1REGL7",
        "CMT_PHASER_IN_CA_STG1REGL8",
        "CMT_PHASER_IN_CA_STG1REGR0",
        "CMT_PHASER_IN_CA_STG1REGR1",
        "CMT_PHASER_IN_CA_STG1REGR2",
        "CMT_PHASER_IN_CA_STG1REGR3",
        "CMT_PHASER_IN_CA_STG1REGR4",
        "CMT_PHASER_IN_CA_STG1REGR5",
        "CMT_PHASER_IN_CA_STG1REGR6",
        "CMT_PHASER_IN_CA_STG1REGR7",
        "CMT_PHASER_IN_CA_STG1REGR8",
        "CMT_PHASER_IN_CA_SYNCIN",
        "CMT_PHASER_IN_CA_SYSCLK",
        "CMT_PHASER_IN_CA_TESTIN0",
        "CMT_PHASER_IN_CA_TESTIN1",
        "CMT_PHASER_IN_CA_TESTIN10",
        "CMT_PHASER_IN_CA_TESTIN11",
        "CMT_PHASER_IN_CA_TESTIN12",
        "CMT_PHASER_IN_CA_TESTIN13",
        "CMT_PHASER_IN_CA_TESTIN2",
        "CMT_PHASER_IN_CA_TESTIN3",
        "CMT_PHASER_IN_CA_TESTIN4",
        "CMT_PHASER_IN_CA_TESTIN5",
        "CMT_PHASER_IN_CA_TESTIN6",
        "CMT_PHASER_IN_CA_TESTIN7",
        "CMT_PHASER_IN_CA_TESTIN8",
        "CMT_PHASER_IN_CA_TESTIN9",
        "CMT_PHASER_IN_CA_TESTOUT0",
        "CMT_PHASER_IN_CA_TESTOUT1",
        "CMT_PHASER_IN_CA_TESTOUT2",
        "CMT_PHASER_IN_CA_TESTOUT3",
        "CMT_PHASER_IN_CA_WRENABLE",
        "CMT_PHASER_IN_C_ICLK",
        "CMT_PHASER_IN_C_ICLKDIV",
        "CMT_PHASER_IN_C_RCLK2",
        "CMT_PHASER_IN_C_WRCLK_TOFIFO",
        "CMT_PHASER_IN_C_WRENABLE_FIFO",
        "CMT_PHASER_IN_DB_BURSTPENDING",
        "CMT_PHASER_IN_DB_BURSTPENDINGPHY",
        "CMT_PHASER_IN_DB_COUNTERLOADEN",
        "CMT_PHASER_IN_DB_COUNTERLOADVAL0",
        "CMT_PHASER_IN_DB_COUNTERLOADVAL1",
        "CMT_PHASER_IN_DB_COUNTERLOADVAL2",
        "CMT_PHASER_IN_DB_COUNTERLOADVAL3",
        "CMT_PHASER_IN_DB_COUNTERLOADVAL4",
        "CMT_PHASER_IN_DB_COUNTERLOADVAL5",
        "CMT_PHASER_IN_DB_COUNTERREADEN",
        "CMT_PHASER_IN_DB_COUNTERREADVAL0",
        "CMT_PHASER_IN_DB_COUNTERREADVAL1",
        "CMT_PHASER_IN_DB_COUNTERREADVAL2",
        "CMT_PHASER_IN_DB_COUNTERREADVAL3",
        "CMT_PHASER_IN_DB_COUNTERREADVAL4",
        "CMT_PHASER_IN_DB_COUNTERREADVAL5",
        "CMT_PHASER_IN_DB_DIVIDERST",
        "CMT_PHASER_IN_DB_DQSFOUND",
        "CMT_PHASER_IN_DB_DQSOUTOFRANGE",
        "CMT_PHASER_IN_DB_EDGEADV",
        "CMT_PHASER_IN_DB_ENCALIB0",
        "CMT_PHASER_IN_DB_ENCALIB1",
        "CMT_PHASER_IN_DB_ENCALIBPHY0",
        "CMT_PHASER_IN_DB_ENCALIBPHY1",
        "CMT_PHASER_IN_DB_ENSTG1",
        "CMT_PHASER_IN_DB_ENSTG1ADJUSTB",
        "CMT_PHASER_IN_DB_FINEENABLE",
        "CMT_PHASER_IN_DB_FINEINC",
        "CMT_PHASER_IN_DB_FINEOVERFLOW",
        "CMT_PHASER_IN_DB_FREQREFCLK",
        "CMT_PHASER_IN_DB_ICLK",
        "CMT_PHASER_IN_DB_ICLKDIV",
        "CMT_PHASER_IN_DB_ISERDESRST",
        "CMT_PHASER_IN_DB_MEMREFCLK",
        "CMT_PHASER_IN_DB_PHASELOCKED",
        "CMT_PHASER_IN_DB_PHASEREFCLK",
        "CMT_PHASER_IN_DB_RANKSEL0",
        "CMT_PHASER_IN_DB_RANKSEL1",
        "CMT_PHASER_IN_DB_RANKSELPHY0",
        "CMT_PHASER_IN_DB_RANKSELPHY1",
        "CMT_PHASER_IN_DB_RCLK",
        "CMT_PHASER_IN_DB_RST",
        "CMT_PHASER_IN_DB_RSTDQSFIND",
        "CMT_PHASER_IN_DB_SCANCLK",
        "CMT_PHASER_IN_DB_SCANENB",
        "CMT_PHASER_IN_DB_SCANIN",
        "CMT_PHASER_IN_DB_SCANMODEB",
        "CMT_PHASER_IN_DB_SCANOUT",
        "CMT_PHASER_IN_DB_SELCALORSTG1",
        "CMT_PHASER_IN_DB_STG1INCDEC",
        "CMT_PHASER_IN_DB_STG1LOAD",
        "CMT_PHASER_IN_DB_STG1OVERFLOW",
        "CMT_PHASER_IN_DB_STG1READ",
        "CMT_PHASER_IN_DB_STG1REGL0",
        "CMT_PHASER_IN_DB_STG1REGL1",
        "CMT_PHASER_IN_DB_STG1REGL2",
        "CMT_PHASER_IN_DB_STG1REGL3",
        "CMT_PHASER_IN_DB_STG1REGL4",
        "CMT_PHASER_IN_DB_STG1REGL5",
        "CMT_PHASER_IN_DB_STG1REGL6",
        "CMT_PHASER_IN_DB_STG1REGL7",
        "CMT_PHASER_IN_DB_STG1REGL8",
        "CMT_PHASER_IN_DB_STG1REGR0",
        "CMT_PHASER_IN_DB_STG1REGR1",
        "CMT_PHASER_IN_DB_STG1REGR2",
        "CMT_PHASER_IN_DB_STG1REGR3",
        "CMT_PHASER_IN_DB_STG1REGR4",
        "CMT_PHASER_IN_DB_STG1REGR5",
        "CMT_PHASER_IN_DB_STG1REGR6",
        "CMT_PHASER_IN_DB_STG1REGR7",
        "CMT_PHASER_IN_DB_STG1REGR8",
        "CMT_PHASER_IN_DB_SYNCIN",
        "CMT_PHASER_IN_DB_SYSCLK",
        "CMT_PHASER_IN_DB_TESTIN0",
        "CMT_PHASER_IN_DB_TESTIN1",
        "CMT_PHASER_IN_DB_TESTIN10",
        "CMT_PHASER_IN_DB_TESTIN11",
        "CMT_PHASER_IN_DB_TESTIN12",
        "CMT_PHASER_IN_DB_TESTIN13",
        "CMT_PHASER_IN_DB_TESTIN2",
        "CMT_PHASER_IN_DB_TESTIN3",
        "CMT_PHASER_IN_DB_TESTIN4",
        "CMT_PHASER_IN_DB_TESTIN5",
        "CMT_PHASER_IN_DB_TESTIN6",
        "CMT_PHASER_IN_DB_TESTIN7",
        "CMT_PHASER_IN_DB_TESTIN8",
        "CMT_PHASER_IN_DB_TESTIN9",
        "CMT_PHASER_IN_DB_TESTOUT0",
        "CMT_PHASER_IN_DB_TESTOUT1",
        "CMT_PHASER_IN_DB_TESTOUT2",
        "CMT_PHASER_IN_DB_TESTOUT3",
        "CMT_PHASER_IN_DB_WRENABLE",
        "CMT_PHASER_IN_D_ICLK",
        "CMT_PHASER_IN_D_ICLKDIV",
        "CMT_PHASER_IN_D_RCLK3",
        "CMT_PHASER_IN_D_WRCLK_TOFIFO",
        "CMT_PHASER_IN_D_WRENABLE_FIFO",
        "CMT_PHASER_OUT_CA_BURSTPENDING",
        "CMT_PHASER_OUT_CA_BURSTPENDINGPHY",
        "CMT_PHASER_OUT_CA_COARSEENABLE",
        "CMT_PHASER_OUT_CA_COARSEINC",
        "CMT_PHASER_OUT_CA_COARSEOVERFLOW",
        "CMT_PHASER_OUT_CA_COUNTERLOADEN",
        "CMT_PHASER_OUT_CA_COUNTERLOADVAL0",
        "CMT_PHASER_OUT_CA_COUNTERLOADVAL1",
        "CMT_PHASER_OUT_CA_COUNTERLOADVAL2",
        "CMT_PHASER_OUT_CA_COUNTERLOADVAL3",
        "CMT_PHASER_OUT_CA_COUNTERLOADVAL4",
        "CMT_PHASER_OUT_CA_COUNTERLOADVAL5",
        "CMT_PHASER_OUT_CA_COUNTERLOADVAL6",
        "CMT_PHASER_OUT_CA_COUNTERLOADVAL7",
        "CMT_PHASER_OUT_CA_COUNTERLOADVAL8",
        "CMT_PHASER_OUT_CA_COUNTERREADEN",
        "CMT_PHASER_OUT_CA_COUNTERREADVAL0",
        "CMT_PHASER_OUT_CA_COUNTERREADVAL1",
        "CMT_PHASER_OUT_CA_COUNTERREADVAL2",
        "CMT_PHASER_OUT_CA_COUNTERREADVAL3",
        "CMT_PHASER_OUT_CA_COUNTERREADVAL4",
        "CMT_PHASER_OUT_CA_COUNTERREADVAL5",
        "CMT_PHASER_OUT_CA_COUNTERREADVAL6",
        "CMT_PHASER_OUT_CA_COUNTERREADVAL7",
        "CMT_PHASER_OUT_CA_COUNTERREADVAL8",
        "CMT_PHASER_OUT_CA_CTSBUS0",
        "CMT_PHASER_OUT_CA_CTSBUS1",
        "CMT_PHASER_OUT_CA_DIVIDERST",
        "CMT_PHASER_OUT_CA_DQSBUS0",
        "CMT_PHASER_OUT_CA_DQSBUS1",
        "CMT_PHASER_OUT_CA_DTSBUS0",
        "CMT_PHASER_OUT_CA_DTSBUS1",
        "CMT_PHASER_OUT_CA_EDGEADV",
        "CMT_PHASER_OUT_CA_ENCALIB0",
        "CMT_PHASER_OUT_CA_ENCALIB1",
        "CMT_PHASER_OUT_CA_ENCALIBPHY0",
        "CMT_PHASER_OUT_CA_ENCALIBPHY1",
        "CMT_PHASER_OUT_CA_FINEENABLE",
        "CMT_PHASER_OUT_CA_FINEINC",
        "CMT_PHASER_OUT_CA_FINEOVERFLOW",
        "CMT_PHASER_OUT_CA_FREQREFCLK",
        "CMT_PHASER_OUT_CA_MEMREFCLK",
        "CMT_PHASER_OUT_CA_OCLK",
        "CMT_PHASER_OUT_CA_OCLKDELAYED",
        "CMT_PHASER_OUT_CA_OCLKDIV",
        "CMT_PHASER_OUT_CA_OSERDESRST",
        "CMT_PHASER_OUT_CA_PHASEREFCLK",
        "CMT_PHASER_OUT_CA_RDENABLE",
        "CMT_PHASER_OUT_CA_RST",
        "CMT_PHASER_OUT_CA_SCANCLK",
        "CMT_PHASER_OUT_CA_SCANENB",
        "CMT_PHASER_OUT_CA_SCANIN",
        "CMT_PHASER_OUT_CA_SCANMODEB",
        "CMT_PHASER_OUT_CA_SCANOUT",
        "CMT_PHASER_OUT_CA_SELFINEOCLKDELAY",
        "CMT_PHASER_OUT_CA_SYNCIN",
        "CMT_PHASER_OUT_CA_SYSCLK",
        "CMT_PHASER_OUT_CA_TESTIN0",
        "CMT_PHASER_OUT_CA_TESTIN1",
        "CMT_PHASER_OUT_CA_TESTIN10",
        "CMT_PHASER_OUT_CA_TESTIN11",
        "CMT_PHASER_OUT_CA_TESTIN12",
        "CMT_PHASER_OUT_CA_TESTIN13",
        "CMT_PHASER_OUT_CA_TESTIN14",
        "CMT_PHASER_OUT_CA_TESTIN15",
        "CMT_PHASER_OUT_CA_TESTIN2",
        "CMT_PHASER_OUT_CA_TESTIN3",
        "CMT_PHASER_OUT_CA_TESTIN4",
        "CMT_PHASER_OUT_CA_TESTIN5",
        "CMT_PHASER_OUT_CA_TESTIN6",
        "CMT_PHASER_OUT_CA_TESTIN7",
        "CMT_PHASER_OUT_CA_TESTIN8",
        "CMT_PHASER_OUT_CA_TESTIN9",
        "CMT_PHASER_OUT_CA_TESTOUT0",
        "CMT_PHASER_OUT_CA_TESTOUT1",
        "CMT_PHASER_OUT_CA_TESTOUT2",
        "CMT_PHASER_OUT_CA_TESTOUT3",
        "CMT_PHASER_OUT_C_OCLK",
        "CMT_PHASER_OUT_C_OCLK1X_90",
        "CMT_PHASER_OUT_C_OCLKDIV",
        "CMT_PHASER_OUT_C_RDCLK_TOFIFO",
        "CMT_PHASER_OUT_C_RDENABLE_TOFIFO",
        "CMT_PHASER_OUT_DB_BURSTPENDING",
        "CMT_PHASER_OUT_DB_BURSTPENDINGPHY",
        "CMT_PHASER_OUT_DB_COARSEENABLE",
        "CMT_PHASER_OUT_DB_COARSEINC",
        "CMT_PHASER_OUT_DB_COARSEOVERFLOW",
        "CMT_PHASER_OUT_DB_COUNTERLOADEN",
        "CMT_PHASER_OUT_DB_COUNTERLOADVAL0",
        "CMT_PHASER_OUT_DB_COUNTERLOADVAL1",
        "CMT_PHASER_OUT_DB_COUNTERLOADVAL2",
        "CMT_PHASER_OUT_DB_COUNTERLOADVAL3",
        "CMT_PHASER_OUT_DB_COUNTERLOADVAL4",
        "CMT_PHASER_OUT_DB_COUNTERLOADVAL5",
        "CMT_PHASER_OUT_DB_COUNTERLOADVAL6",
        "CMT_PHASER_OUT_DB_COUNTERLOADVAL7",
        "CMT_PHASER_OUT_DB_COUNTERLOADVAL8",
        "CMT_PHASER_OUT_DB_COUNTERREADEN",
        "CMT_PHASER_OUT_DB_COUNTERREADVAL0",
        "CMT_PHASER_OUT_DB_COUNTERREADVAL1",
        "CMT_PHASER_OUT_DB_COUNTERREADVAL2",
        "CMT_PHASER_OUT_DB_COUNTERREADVAL3",
        "CMT_PHASER_OUT_DB_COUNTERREADVAL4",
        "CMT_PHASER_OUT_DB_COUNTERREADVAL5",
        "CMT_PHASER_OUT_DB_COUNTERREADVAL6",
        "CMT_PHASER_OUT_DB_COUNTERREADVAL7",
        "CMT_PHASER_OUT_DB_COUNTERREADVAL8",
        "CMT_PHASER_OUT_DB_CTSBUS0",
        "CMT_PHASER_OUT_DB_CTSBUS1",
        "CMT_PHASER_OUT_DB_DIVIDERST",
        "CMT_PHASER_OUT_DB_DQSBUS0",
        "CMT_PHASER_OUT_DB_DQSBUS1",
        "CMT_PHASER_OUT_DB_DTSBUS0",
        "CMT_PHASER_OUT_DB_DTSBUS1",
        "CMT_PHASER_OUT_DB_EDGEADV",
        "CMT_PHASER_OUT_DB_ENCALIB0",
        "CMT_PHASER_OUT_DB_ENCALIB1",
        "CMT_PHASER_OUT_DB_ENCALIBPHY0",
        "CMT_PHASER_OUT_DB_ENCALIBPHY1",
        "CMT_PHASER_OUT_DB_FINEENABLE",
        "CMT_PHASER_OUT_DB_FINEINC",
        "CMT_PHASER_OUT_DB_FINEOVERFLOW",
        "CMT_PHASER_OUT_DB_FREQREFCLK",
        "CMT_PHASER_OUT_DB_MEMREFCLK",
        "CMT_PHASER_OUT_DB_OCLK",
        "CMT_PHASER_OUT_DB_OCLKDELAYED",
        "CMT_PHASER_OUT_DB_OCLKDIV",
        "CMT_PHASER_OUT_DB_OSERDESRST",
        "CMT_PHASER_OUT_DB_PHASEREFCLK",
        "CMT_PHASER_OUT_DB_RDENABLE",
        "CMT_PHASER_OUT_DB_RST",
        "CMT_PHASER_OUT_DB_SCANCLK",
        "CMT_PHASER_OUT_DB_SCANENB",
        "CMT_PHASER_OUT_DB_SCANIN",
        "CMT_PHASER_OUT_DB_SCANMODEB",
        "CMT_PHASER_OUT_DB_SCANOUT",
        "CMT_PHASER_OUT_DB_SELFINEOCLKDELAY",
        "CMT_PHASER_OUT_DB_SYNCIN",
        "CMT_PHASER_OUT_DB_SYSCLK",
        "CMT_PHASER_OUT_DB_TESTIN0",
        "CMT_PHASER_OUT_DB_TESTIN1",
        "CMT_PHASER_OUT_DB_TESTIN10",
        "CMT_PHASER_OUT_DB_TESTIN11",
        "CMT_PHASER_OUT_DB_TESTIN12",
        "CMT_PHASER_OUT_DB_TESTIN13",
        "CMT_PHASER_OUT_DB_TESTIN14",
        "CMT_PHASER_OUT_DB_TESTIN15",
        "CMT_PHASER_OUT_DB_TESTIN2",
        "CMT_PHASER_OUT_DB_TESTIN3",
        "CMT_PHASER_OUT_DB_TESTIN4",
        "CMT_PHASER_OUT_DB_TESTIN5",
        "CMT_PHASER_OUT_DB_TESTIN6",
        "CMT_PHASER_OUT_DB_TESTIN7",
        "CMT_PHASER_OUT_DB_TESTIN8",
        "CMT_PHASER_OUT_DB_TESTIN9",
        "CMT_PHASER_OUT_DB_TESTOUT0",
        "CMT_PHASER_OUT_DB_TESTOUT1",
        "CMT_PHASER_OUT_DB_TESTOUT2",
        "CMT_PHASER_OUT_DB_TESTOUT3",
        "CMT_PHASER_OUT_D_OCLK",
        "CMT_PHASER_OUT_D_OCLK1X_90",
        "CMT_PHASER_OUT_D_OCLKDIV",
        "CMT_PHASER_OUT_D_RDCLK_TOFIFO",
        "CMT_PHASER_OUT_D_RDENABLE_TOFIFO",
        "CMT_PHASER_REF_CLKIN",
        "CMT_PHASER_REF_CLKOUT",
        "CMT_PHASER_REF_CLKOUT_TOHCLK",
        "CMT_PHASER_REF_LOCKED",
        "CMT_PHASER_REF_PWRDWN",
        "CMT_PHASER_REF_RST",
        "CMT_PHASER_REF_TESTIN0",
        "CMT_PHASER_REF_TESTIN1",
        "CMT_PHASER_REF_TESTIN2",
        "CMT_PHASER_REF_TESTIN3",
        "CMT_PHASER_REF_TESTIN4",
        "CMT_PHASER_REF_TESTIN5",
        "CMT_PHASER_REF_TESTIN6",
        "CMT_PHASER_REF_TESTIN7",
        "CMT_PHASER_REF_TESTOUT0",
        "CMT_PHASER_REF_TESTOUT1",
        "CMT_PHASER_REF_TESTOUT2",
        "CMT_PHASER_REF_TESTOUT3",
        "CMT_PHASER_REF_TESTOUT4",
        "CMT_PHASER_REF_TESTOUT5",
        "CMT_PHASER_REF_TESTOUT6",
        "CMT_PHASER_REF_TESTOUT7",
        "CMT_PHASER_REF_TMUXOUT",
        "CMT_PHASER_REF_TMUXOUT_TOHCLK",
        "CMT_PHASER_TOP_SYNC_BB",
        "CMT_PHASER_UP_BUFMRCE_CE0",
        "CMT_PHASER_UP_BUFMRCE_CE1",
        "CMT_PHASER_UP_DQS_TO_PHASER_C",
        "CMT_PHASER_UP_DQS_TO_PHASER_D",
        "CMT_PHASER_UP_PHASERREF0",
        "CMT_PHASER_UP_PHASERREF1",
        "CMT_PHASER_UP_PHASERREF_ABOVE0",
        "CMT_PHASER_UP_PHASERREF_ABOVE1",
        "CMT_PHASER_UP_PHASERREF_BELOW0",
        "CMT_PHASER_UP_PHASERREF_BELOW1",
        "CMT_PHY_CONTROL_AUXOUTPUT0",
        "CMT_PHY_CONTROL_AUXOUTPUT1",
        "CMT_PHY_CONTROL_AUXOUTPUT2",
        "CMT_PHY_CONTROL_AUXOUTPUT3",
        "CMT_PHY_CONTROL_ECALIB0",
        "CMT_PHY_CONTROL_ECALIB1",
        "CMT_PHY_CONTROL_IBURSTPENDING0",
        "CMT_PHY_CONTROL_IBURSTPENDING1",
        "CMT_PHY_CONTROL_IBURSTPENDING2",
        "CMT_PHY_CONTROL_IBURSTPENDING3",
        "CMT_PHY_CONTROL_INBURSTPENDING0",
        "CMT_PHY_CONTROL_INBURSTPENDING1",
        "CMT_PHY_CONTROL_INBURSTPENDING2",
        "CMT_PHY_CONTROL_INBURSTPENDING3",
        "CMT_PHY_CONTROL_INRANKA0",
        "CMT_PHY_CONTROL_INRANKA1",
        "CMT_PHY_CONTROL_INRANKB0",
        "CMT_PHY_CONTROL_INRANKB1",
        "CMT_PHY_CONTROL_INRANKC0",
        "CMT_PHY_CONTROL_INRANKC1",
        "CMT_PHY_CONTROL_INRANKD0",
        "CMT_PHY_CONTROL_INRANKD1",
        "CMT_PHY_CONTROL_IRANKA0",
        "CMT_PHY_CONTROL_IRANKA1",
        "CMT_PHY_CONTROL_IRANKB0",
        "CMT_PHY_CONTROL_IRANKB1",
        "CMT_PHY_CONTROL_IRANKC0",
        "CMT_PHY_CONTROL_IRANKC1",
        "CMT_PHY_CONTROL_IRANKD0",
        "CMT_PHY_CONTROL_IRANKD1",
        "CMT_PHY_CONTROL_MEMREFCLK",
        "CMT_PHY_CONTROL_OBURSTPENDING0",
        "CMT_PHY_CONTROL_OBURSTPENDING1",
        "CMT_PHY_CONTROL_OBURSTPENDING2",
        "CMT_PHY_CONTROL_OBURSTPENDING3",
        "CMT_PHY_CONTROL_OUTBURSTPENDING0",
        "CMT_PHY_CONTROL_OUTBURSTPENDING1",
        "CMT_PHY_CONTROL_OUTBURSTPENDING2",
        "CMT_PHY_CONTROL_OUTBURSTPENDING3",
        "CMT_PHY_CONTROL_PCENABLECALIB0",
        "CMT_PHY_CONTROL_PCENABLECALIB1",
        "CMT_PHY_CONTROL_PHYCLK",
        "CMT_PHY_CONTROL_PHYCTLALMOSTFULL",
        "CMT_PHY_CONTROL_PHYCTLEMPTY",
        "CMT_PHY_CONTROL_PHYCTLFULL",
        "CMT_PHY_CONTROL_PHYCTLMSTREMPTY",
        "CMT_PHY_CONTROL_PHYCTLREADY",
        "CMT_PHY_CONTROL_PHYCTLWD0",
        "CMT_PHY_CONTROL_PHYCTLWD1",
        "CMT_PHY_CONTROL_PHYCTLWD10",
        "CMT_PHY_CONTROL_PHYCTLWD11",
        "CMT_PHY_CONTROL_PHYCTLWD12",
        "CMT_PHY_CONTROL_PHYCTLWD13",
        "CMT_PHY_CONTROL_PHYCTLWD14",
        "CMT_PHY_CONTROL_PHYCTLWD15",
        "CMT_PHY_CONTROL_PHYCTLWD16",
        "CMT_PHY_CONTROL_PHYCTLWD17",
        "CMT_PHY_CONTROL_PHYCTLWD18",
        "CMT_PHY_CONTROL_PHYCTLWD19",
        "CMT_PHY_CONTROL_PHYCTLWD2",
        "CMT_PHY_CONTROL_PHYCTLWD20",
        "CMT_PHY_CONTROL_PHYCTLWD21",
        "CMT_PHY_CONTROL_PHYCTLWD22",
        "CMT_PHY_CONTROL_PHYCTLWD23",
        "CMT_PHY_CONTROL_PHYCTLWD24",
        "CMT_PHY_CONTROL_PHYCTLWD25",
        "CMT_PHY_CONTROL_PHYCTLWD26",
        "CMT_PHY_CONTROL_PHYCTLWD27",
        "CMT_PHY_CONTROL_PHYCTLWD28",
        "CMT_PHY_CONTROL_PHYCTLWD29",
        "CMT_PHY_CONTROL_PHYCTLWD3",
        "CMT_PHY_CONTROL_PHYCTLWD30",
        "CMT_PHY_CONTROL_PHYCTLWD31",
        "CMT_PHY_CONTROL_PHYCTLWD4",
        "CMT_PHY_CONTROL_PHYCTLWD5",
        "CMT_PHY_CONTROL_PHYCTLWD6",
        "CMT_PHY_CONTROL_PHYCTLWD7",
        "CMT_PHY_CONTROL_PHYCTLWD8",
        "CMT_PHY_CONTROL_PHYCTLWD9",
        "CMT_PHY_CONTROL_PHYCTLWRENABLE",
        "CMT_PHY_CONTROL_PLLLOCK",
        "CMT_PHY_CONTROL_READCALIBENABLE",
        "CMT_PHY_CONTROL_REFDLLLOCK",
        "CMT_PHY_CONTROL_RESET",
        "CMT_PHY_CONTROL_SCANENABLEN",
        "CMT_PHY_CONTROL_SYNCIN",
        "CMT_PHY_CONTROL_TESTINPUT0",
        "CMT_PHY_CONTROL_TESTINPUT1",
        "CMT_PHY_CONTROL_TESTINPUT10",
        "CMT_PHY_CONTROL_TESTINPUT11",
        "CMT_PHY_CONTROL_TESTINPUT12",
        "CMT_PHY_CONTROL_TESTINPUT13",
        "CMT_PHY_CONTROL_TESTINPUT14",
        "CMT_PHY_CONTROL_TESTINPUT15",
        "CMT_PHY_CONTROL_TESTINPUT2",
        "CMT_PHY_CONTROL_TESTINPUT3",
        "CMT_PHY_CONTROL_TESTINPUT4",
        "CMT_PHY_CONTROL_TESTINPUT5",
        "CMT_PHY_CONTROL_TESTINPUT6",
        "CMT_PHY_CONTROL_TESTINPUT7",
        "CMT_PHY_CONTROL_TESTINPUT8",
        "CMT_PHY_CONTROL_TESTINPUT9",
        "CMT_PHY_CONTROL_TESTOUTPUT0",
        "CMT_PHY_CONTROL_TESTOUTPUT1",
        "CMT_PHY_CONTROL_TESTOUTPUT10",
        "CMT_PHY_CONTROL_TESTOUTPUT11",
        "CMT_PHY_CONTROL_TESTOUTPUT12",
        "CMT_PHY_CONTROL_TESTOUTPUT13",
        "CMT_PHY_CONTROL_TESTOUTPUT14",
        "CMT_PHY_CONTROL_TESTOUTPUT15",
        "CMT_PHY_CONTROL_TESTOUTPUT2",
        "CMT_PHY_CONTROL_TESTOUTPUT3",
        "CMT_PHY_CONTROL_TESTOUTPUT4",
        "CMT_PHY_CONTROL_TESTOUTPUT5",
        "CMT_PHY_CONTROL_TESTOUTPUT6",
        "CMT_PHY_CONTROL_TESTOUTPUT7",
        "CMT_PHY_CONTROL_TESTOUTPUT8",
        "CMT_PHY_CONTROL_TESTOUTPUT9",
        "CMT_PHY_CONTROL_TESTSELECT0",
        "CMT_PHY_CONTROL_TESTSELECT1",
        "CMT_PHY_CONTROL_TESTSELECT2",
        "CMT_PHY_CONTROL_WRITECALIBENABLE",
        "CMT_R_TOP_UPPER_B_CLKFBIN",
        "CMT_R_TOP_UPPER_B_CLKIN1",
        "CMT_R_TOP_UPPER_B_CLKIN2",
        "CMT_R_TOP_UPPER_B_CLKINT_2",
        "CMT_R_TOP_UPPER_B_CLKINT_3",
        "CMT_R_TOP_UPPER_B_CLKPLL0",
        "CMT_R_TOP_UPPER_B_CLKPLL1",
        "CMT_R_TOP_UPPER_B_CLKPLL2",
        "CMT_R_TOP_UPPER_B_CLKPLL3",
        "CMT_R_TOP_UPPER_B_CLKPLL4",
        "CMT_R_TOP_UPPER_B_CLKPLL5",
        "CMT_R_TOP_UPPER_B_CLKPLL6",
        "CMT_R_TOP_UPPER_B_CLKPLL7",
        "CMT_TOP_BLOCK_OUTS_L_B0_0",
        "CMT_TOP_BLOCK_OUTS_L_B0_1",
        "CMT_TOP_BLOCK_OUTS_L_B0_10",
        "CMT_TOP_BLOCK_OUTS_L_B0_11",
        "CMT_TOP_BLOCK_OUTS_L_B0_2",
        "CMT_TOP_BLOCK_OUTS_L_B0_3",
        "CMT_TOP_BLOCK_OUTS_L_B0_4",
        "CMT_TOP_BLOCK_OUTS_L_B0_5",
        "CMT_TOP_BLOCK_OUTS_L_B0_6",
        "CMT_TOP_BLOCK_OUTS_L_B0_7",
        "CMT_TOP_BLOCK_OUTS_L_B0_8",
        "CMT_TOP_BLOCK_OUTS_L_B0_9",
        "CMT_TOP_BLOCK_OUTS_L_B1_0",
        "CMT_TOP_BLOCK_OUTS_L_B1_1",
        "CMT_TOP_BLOCK_OUTS_L_B1_10",
        "CMT_TOP_BLOCK_OUTS_L_B1_11",
        "CMT_TOP_BLOCK_OUTS_L_B1_2",
        "CMT_TOP_BLOCK_OUTS_L_B1_3",
        "CMT_TOP_BLOCK_OUTS_L_B1_4",
        "CMT_TOP_BLOCK_OUTS_L_B1_5",
        "CMT_TOP_BLOCK_OUTS_L_B1_6",
        "CMT_TOP_BLOCK_OUTS_L_B1_7",
        "CMT_TOP_BLOCK_OUTS_L_B1_8",
        "CMT_TOP_BLOCK_OUTS_L_B1_9",
        "CMT_TOP_BLOCK_OUTS_L_B2_0",
        "CMT_TOP_BLOCK_OUTS_L_B2_1",
        "CMT_TOP_BLOCK_OUTS_L_B2_10",
        "CMT_TOP_BLOCK_OUTS_L_B2_11",
        "CMT_TOP_BLOCK_OUTS_L_B2_2",
        "CMT_TOP_BLOCK_OUTS_L_B2_3",
        "CMT_TOP_BLOCK_OUTS_L_B2_4",
        "CMT_TOP_BLOCK_OUTS_L_B2_5",
        "CMT_TOP_BLOCK_OUTS_L_B2_6",
        "CMT_TOP_BLOCK_OUTS_L_B2_7",
        "CMT_TOP_BLOCK_OUTS_L_B2_8",
        "CMT_TOP_BLOCK_OUTS_L_B2_9",
        "CMT_TOP_BLOCK_OUTS_L_B3_0",
        "CMT_TOP_BLOCK_OUTS_L_B3_1",
        "CMT_TOP_BLOCK_OUTS_L_B3_10",
        "CMT_TOP_BLOCK_OUTS_L_B3_11",
        "CMT_TOP_BLOCK_OUTS_L_B3_2",
        "CMT_TOP_BLOCK_OUTS_L_B3_3",
        "CMT_TOP_BLOCK_OUTS_L_B3_4",
        "CMT_TOP_BLOCK_OUTS_L_B3_5",
        "CMT_TOP_BLOCK_OUTS_L_B3_6",
        "CMT_TOP_BLOCK_OUTS_L_B3_7",
        "CMT_TOP_BLOCK_OUTS_L_B3_8",
        "CMT_TOP_BLOCK_OUTS_L_B3_9",
        "CMT_TOP_BYP0_0",
        "CMT_TOP_BYP0_1",
        "CMT_TOP_BYP0_10",
        "CMT_TOP_BYP0_11",
        "CMT_TOP_BYP0_2",
        "CMT_TOP_BYP0_3",
        "CMT_TOP_BYP0_4",
        "CMT_TOP_BYP0_5",
        "CMT_TOP_BYP0_6",
        "CMT_TOP_BYP0_7",
        "CMT_TOP_BYP0_8",
        "CMT_TOP_BYP0_9",
        "CMT_TOP_BYP1_0",
        "CMT_TOP_BYP1_1",
        "CMT_TOP_BYP1_10",
        "CMT_TOP_BYP1_11",
        "CMT_TOP_BYP1_2",
        "CMT_TOP_BYP1_3",
        "CMT_TOP_BYP1_4",
        "CMT_TOP_BYP1_5",
        "CMT_TOP_BYP1_6",
        "CMT_TOP_BYP1_7",
        "CMT_TOP_BYP1_8",
        "CMT_TOP_BYP1_9",
        "CMT_TOP_BYP2_0",
        "CMT_TOP_BYP2_1",
        "CMT_TOP_BYP2_10",
        "CMT_TOP_BYP2_11",
        "CMT_TOP_BYP2_2",
        "CMT_TOP_BYP2_3",
        "CMT_TOP_BYP2_4",
        "CMT_TOP_BYP2_5",
        "CMT_TOP_BYP2_6",
        "CMT_TOP_BYP2_7",
        "CMT_TOP_BYP2_8",
        "CMT_TOP_BYP2_9",
        "CMT_TOP_BYP3_0",
        "CMT_TOP_BYP3_1",
        "CMT_TOP_BYP3_10",
        "CMT_TOP_BYP3_11",
        "CMT_TOP_BYP3_2",
        "CMT_TOP_BYP3_3",
        "CMT_TOP_BYP3_4",
        "CMT_TOP_BYP3_5",
        "CMT_TOP_BYP3_6",
        "CMT_TOP_BYP3_7",
        "CMT_TOP_BYP3_8",
        "CMT_TOP_BYP3_9",
        "CMT_TOP_BYP4_0",
        "CMT_TOP_BYP4_1",
        "CMT_TOP_BYP4_10",
        "CMT_TOP_BYP4_11",
        "CMT_TOP_BYP4_2",
        "CMT_TOP_BYP4_3",
        "CMT_TOP_BYP4_4",
        "CMT_TOP_BYP4_5",
        "CMT_TOP_BYP4_6",
        "CMT_TOP_BYP4_7",
        "CMT_TOP_BYP4_8",
        "CMT_TOP_BYP4_9",
        "CMT_TOP_BYP5_0",
        "CMT_TOP_BYP5_1",
        "CMT_TOP_BYP5_10",
        "CMT_TOP_BYP5_11",
        "CMT_TOP_BYP5_2",
        "CMT_TOP_BYP5_3",
        "CMT_TOP_BYP5_4",
        "CMT_TOP_BYP5_5",
        "CMT_TOP_BYP5_6",
        "CMT_TOP_BYP5_7",
        "CMT_TOP_BYP5_8",
        "CMT_TOP_BYP5_9",
        "CMT_TOP_BYP6_0",
        "CMT_TOP_BYP6_1",
        "CMT_TOP_BYP6_10",
        "CMT_TOP_BYP6_11",
        "CMT_TOP_BYP6_2",
        "CMT_TOP_BYP6_3",
        "CMT_TOP_BYP6_4",
        "CMT_TOP_BYP6_5",
        "CMT_TOP_BYP6_6",
        "CMT_TOP_BYP6_7",
        "CMT_TOP_BYP6_8",
        "CMT_TOP_BYP6_9",
        "CMT_TOP_BYP7_0",
        "CMT_TOP_BYP7_1",
        "CMT_TOP_BYP7_10",
        "CMT_TOP_BYP7_11",
        "CMT_TOP_BYP7_2",
        "CMT_TOP_BYP7_3",
        "CMT_TOP_BYP7_4",
        "CMT_TOP_BYP7_5",
        "CMT_TOP_BYP7_6",
        "CMT_TOP_BYP7_7",
        "CMT_TOP_BYP7_8",
        "CMT_TOP_BYP7_9",
        "CMT_TOP_CLK0_0",
        "CMT_TOP_CLK0_1",
        "CMT_TOP_CLK0_10",
        "CMT_TOP_CLK0_11",
        "CMT_TOP_CLK0_2",
        "CMT_TOP_CLK0_3",
        "CMT_TOP_CLK0_4",
        "CMT_TOP_CLK0_5",
        "CMT_TOP_CLK0_6",
        "CMT_TOP_CLK0_7",
        "CMT_TOP_CLK0_8",
        "CMT_TOP_CLK0_9",
        "CMT_TOP_CLK1_0",
        "CMT_TOP_CLK1_1",
        "CMT_TOP_CLK1_10",
        "CMT_TOP_CLK1_11",
        "CMT_TOP_CLK1_2",
        "CMT_TOP_CLK1_3",
        "CMT_TOP_CLK1_4",
        "CMT_TOP_CLK1_5",
        "CMT_TOP_CLK1_6",
        "CMT_TOP_CLK1_7",
        "CMT_TOP_CLK1_8",
        "CMT_TOP_CLK1_9",
        "CMT_TOP_CTRL0_0",
        "CMT_TOP_CTRL0_1",
        "CMT_TOP_CTRL0_10",
        "CMT_TOP_CTRL0_11",
        "CMT_TOP_CTRL0_2",
        "CMT_TOP_CTRL0_3",
        "CMT_TOP_CTRL0_4",
        "CMT_TOP_CTRL0_5",
        "CMT_TOP_CTRL0_6",
        "CMT_TOP_CTRL0_7",
        "CMT_TOP_CTRL0_8",
        "CMT_TOP_CTRL0_9",
        "CMT_TOP_CTRL1_0",
        "CMT_TOP_CTRL1_1",
        "CMT_TOP_CTRL1_10",
        "CMT_TOP_CTRL1_11",
        "CMT_TOP_CTRL1_2",
        "CMT_TOP_CTRL1_3",
        "CMT_TOP_CTRL1_4",
        "CMT_TOP_CTRL1_5",
        "CMT_TOP_CTRL1_6",
        "CMT_TOP_CTRL1_7",
        "CMT_TOP_CTRL1_8",
        "CMT_TOP_CTRL1_9",
        "CMT_TOP_EE2A0_0",
        "CMT_TOP_EE2A0_1",
        "CMT_TOP_EE2A0_10",
        "CMT_TOP_EE2A0_11",
        "CMT_TOP_EE2A0_2",
        "CMT_TOP_EE2A0_3",
        "CMT_TOP_EE2A0_4",
        "CMT_TOP_EE2A0_5",
        "CMT_TOP_EE2A0_6",
        "CMT_TOP_EE2A0_7",
        "CMT_TOP_EE2A0_8",
        "CMT_TOP_EE2A0_9",
        "CMT_TOP_EE2A1_0",
        "CMT_TOP_EE2A1_1",
        "CMT_TOP_EE2A1_10",
        "CMT_TOP_EE2A1_11",
        "CMT_TOP_EE2A1_2",
        "CMT_TOP_EE2A1_3",
        "CMT_TOP_EE2A1_4",
        "CMT_TOP_EE2A1_5",
        "CMT_TOP_EE2A1_6",
        "CMT_TOP_EE2A1_7",
        "CMT_TOP_EE2A1_8",
        "CMT_TOP_EE2A1_9",
        "CMT_TOP_EE2A2_0",
        "CMT_TOP_EE2A2_1",
        "CMT_TOP_EE2A2_10",
        "CMT_TOP_EE2A2_11",
        "CMT_TOP_EE2A2_2",
        "CMT_TOP_EE2A2_3",
        "CMT_TOP_EE2A2_4",
        "CMT_TOP_EE2A2_5",
        "CMT_TOP_EE2A2_6",
        "CMT_TOP_EE2A2_7",
        "CMT_TOP_EE2A2_8",
        "CMT_TOP_EE2A2_9",
        "CMT_TOP_EE2A3_0",
        "CMT_TOP_EE2A3_1",
        "CMT_TOP_EE2A3_10",
        "CMT_TOP_EE2A3_11",
        "CMT_TOP_EE2A3_2",
        "CMT_TOP_EE2A3_3",
        "CMT_TOP_EE2A3_4",
        "CMT_TOP_EE2A3_5",
        "CMT_TOP_EE2A3_6",
        "CMT_TOP_EE2A3_7",
        "CMT_TOP_EE2A3_8",
        "CMT_TOP_EE2A3_9",
        "CMT_TOP_EE2BEG0_0",
        "CMT_TOP_EE2BEG0_1",
        "CMT_TOP_EE2BEG0_10",
        "CMT_TOP_EE2BEG0_11",
        "CMT_TOP_EE2BEG0_2",
        "CMT_TOP_EE2BEG0_3",
        "CMT_TOP_EE2BEG0_4",
        "CMT_TOP_EE2BEG0_5",
        "CMT_TOP_EE2BEG0_6",
        "CMT_TOP_EE2BEG0_7",
        "CMT_TOP_EE2BEG0_8",
        "CMT_TOP_EE2BEG0_9",
        "CMT_TOP_EE2BEG1_0",
        "CMT_TOP_EE2BEG1_1",
        "CMT_TOP_EE2BEG1_10",
        "CMT_TOP_EE2BEG1_11",
        "CMT_TOP_EE2BEG1_2",
        "CMT_TOP_EE2BEG1_3",
        "CMT_TOP_EE2BEG1_4",
        "CMT_TOP_EE2BEG1_5",
        "CMT_TOP_EE2BEG1_6",
        "CMT_TOP_EE2BEG1_7",
        "CMT_TOP_EE2BEG1_8",
        "CMT_TOP_EE2BEG1_9",
        "CMT_TOP_EE2BEG2_0",
        "CMT_TOP_EE2BEG2_1",
        "CMT_TOP_EE2BEG2_10",
        "CMT_TOP_EE2BEG2_11",
        "CMT_TOP_EE2BEG2_2",
        "CMT_TOP_EE2BEG2_3",
        "CMT_TOP_EE2BEG2_4",
        "CMT_TOP_EE2BEG2_5",
        "CMT_TOP_EE2BEG2_6",
        "CMT_TOP_EE2BEG2_7",
        "CMT_TOP_EE2BEG2_8",
        "CMT_TOP_EE2BEG2_9",
        "CMT_TOP_EE2BEG3_0",
        "CMT_TOP_EE2BEG3_1",
        "CMT_TOP_EE2BEG3_10",
        "CMT_TOP_EE2BEG3_11",
        "CMT_TOP_EE2BEG3_2",
        "CMT_TOP_EE2BEG3_3",
        "CMT_TOP_EE2BEG3_4",
        "CMT_TOP_EE2BEG3_5",
        "CMT_TOP_EE2BEG3_6",
        "CMT_TOP_EE2BEG3_7",
        "CMT_TOP_EE2BEG3_8",
        "CMT_TOP_EE2BEG3_9",
        "CMT_TOP_EE4A0_0",
        "CMT_TOP_EE4A0_1",
        "CMT_TOP_EE4A0_10",
        "CMT_TOP_EE4A0_11",
        "CMT_TOP_EE4A0_2",
        "CMT_TOP_EE4A0_3",
        "CMT_TOP_EE4A0_4",
        "CMT_TOP_EE4A0_5",
        "CMT_TOP_EE4A0_6",
        "CMT_TOP_EE4A0_7",
        "CMT_TOP_EE4A0_8",
        "CMT_TOP_EE4A0_9",
        "CMT_TOP_EE4A1_0",
        "CMT_TOP_EE4A1_1",
        "CMT_TOP_EE4A1_10",
        "CMT_TOP_EE4A1_11",
        "CMT_TOP_EE4A1_2",
        "CMT_TOP_EE4A1_3",
        "CMT_TOP_EE4A1_4",
        "CMT_TOP_EE4A1_5",
        "CMT_TOP_EE4A1_6",
        "CMT_TOP_EE4A1_7",
        "CMT_TOP_EE4A1_8",
        "CMT_TOP_EE4A1_9",
        "CMT_TOP_EE4A2_0",
        "CMT_TOP_EE4A2_1",
        "CMT_TOP_EE4A2_10",
        "CMT_TOP_EE4A2_11",
        "CMT_TOP_EE4A2_2",
        "CMT_TOP_EE4A2_3",
        "CMT_TOP_EE4A2_4",
        "CMT_TOP_EE4A2_5",
        "CMT_TOP_EE4A2_6",
        "CMT_TOP_EE4A2_7",
        "CMT_TOP_EE4A2_8",
        "CMT_TOP_EE4A2_9",
        "CMT_TOP_EE4A3_0",
        "CMT_TOP_EE4A3_1",
        "CMT_TOP_EE4A3_10",
        "CMT_TOP_EE4A3_11",
        "CMT_TOP_EE4A3_2",
        "CMT_TOP_EE4A3_3",
        "CMT_TOP_EE4A3_4",
        "CMT_TOP_EE4A3_5",
        "CMT_TOP_EE4A3_6",
        "CMT_TOP_EE4A3_7",
        "CMT_TOP_EE4A3_8",
        "CMT_TOP_EE4A3_9",
        "CMT_TOP_EE4B0_0",
        "CMT_TOP_EE4B0_1",
        "CMT_TOP_EE4B0_10",
        "CMT_TOP_EE4B0_11",
        "CMT_TOP_EE4B0_2",
        "CMT_TOP_EE4B0_3",
        "CMT_TOP_EE4B0_4",
        "CMT_TOP_EE4B0_5",
        "CMT_TOP_EE4B0_6",
        "CMT_TOP_EE4B0_7",
        "CMT_TOP_EE4B0_8",
        "CMT_TOP_EE4B0_9",
        "CMT_TOP_EE4B1_0",
        "CMT_TOP_EE4B1_1",
        "CMT_TOP_EE4B1_10",
        "CMT_TOP_EE4B1_11",
        "CMT_TOP_EE4B1_2",
        "CMT_TOP_EE4B1_3",
        "CMT_TOP_EE4B1_4",
        "CMT_TOP_EE4B1_5",
        "CMT_TOP_EE4B1_6",
        "CMT_TOP_EE4B1_7",
        "CMT_TOP_EE4B1_8",
        "CMT_TOP_EE4B1_9",
        "CMT_TOP_EE4B2_0",
        "CMT_TOP_EE4B2_1",
        "CMT_TOP_EE4B2_10",
        "CMT_TOP_EE4B2_11",
        "CMT_TOP_EE4B2_2",
        "CMT_TOP_EE4B2_3",
        "CMT_TOP_EE4B2_4",
        "CMT_TOP_EE4B2_5",
        "CMT_TOP_EE4B2_6",
        "CMT_TOP_EE4B2_7",
        "CMT_TOP_EE4B2_8",
        "CMT_TOP_EE4B2_9",
        "CMT_TOP_EE4B3_0",
        "CMT_TOP_EE4B3_1",
        "CMT_TOP_EE4B3_10",
        "CMT_TOP_EE4B3_11",
        "CMT_TOP_EE4B3_2",
        "CMT_TOP_EE4B3_3",
        "CMT_TOP_EE4B3_4",
        "CMT_TOP_EE4B3_5",
        "CMT_TOP_EE4B3_6",
        "CMT_TOP_EE4B3_7",
        "CMT_TOP_EE4B3_8",
        "CMT_TOP_EE4B3_9",
        "CMT_TOP_EE4BEG0_0",
        "CMT_TOP_EE4BEG0_1",
        "CMT_TOP_EE4BEG0_10",
        "CMT_TOP_EE4BEG0_11",
        "CMT_TOP_EE4BEG0_2",
        "CMT_TOP_EE4BEG0_3",
        "CMT_TOP_EE4BEG0_4",
        "CMT_TOP_EE4BEG0_5",
        "CMT_TOP_EE4BEG0_6",
        "CMT_TOP_EE4BEG0_7",
        "CMT_TOP_EE4BEG0_8",
        "CMT_TOP_EE4BEG0_9",
        "CMT_TOP_EE4BEG1_0",
        "CMT_TOP_EE4BEG1_1",
        "CMT_TOP_EE4BEG1_10",
        "CMT_TOP_EE4BEG1_11",
        "CMT_TOP_EE4BEG1_2",
        "CMT_TOP_EE4BEG1_3",
        "CMT_TOP_EE4BEG1_4",
        "CMT_TOP_EE4BEG1_5",
        "CMT_TOP_EE4BEG1_6",
        "CMT_TOP_EE4BEG1_7",
        "CMT_TOP_EE4BEG1_8",
        "CMT_TOP_EE4BEG1_9",
        "CMT_TOP_EE4BEG2_0",
        "CMT_TOP_EE4BEG2_1",
        "CMT_TOP_EE4BEG2_10",
        "CMT_TOP_EE4BEG2_11",
        "CMT_TOP_EE4BEG2_2",
        "CMT_TOP_EE4BEG2_3",
        "CMT_TOP_EE4BEG2_4",
        "CMT_TOP_EE4BEG2_5",
        "CMT_TOP_EE4BEG2_6",
        "CMT_TOP_EE4BEG2_7",
        "CMT_TOP_EE4BEG2_8",
        "CMT_TOP_EE4BEG2_9",
        "CMT_TOP_EE4BEG3_0",
        "CMT_TOP_EE4BEG3_1",
        "CMT_TOP_EE4BEG3_10",
        "CMT_TOP_EE4BEG3_11",
        "CMT_TOP_EE4BEG3_2",
        "CMT_TOP_EE4BEG3_3",
        "CMT_TOP_EE4BEG3_4",
        "CMT_TOP_EE4BEG3_5",
        "CMT_TOP_EE4BEG3_6",
        "CMT_TOP_EE4BEG3_7",
        "CMT_TOP_EE4BEG3_8",
        "CMT_TOP_EE4BEG3_9",
        "CMT_TOP_EE4C0_0",
        "CMT_TOP_EE4C0_1",
        "CMT_TOP_EE4C0_10",
        "CMT_TOP_EE4C0_11",
        "CMT_TOP_EE4C0_2",
        "CMT_TOP_EE4C0_3",
        "CMT_TOP_EE4C0_4",
        "CMT_TOP_EE4C0_5",
        "CMT_TOP_EE4C0_6",
        "CMT_TOP_EE4C0_7",
        "CMT_TOP_EE4C0_8",
        "CMT_TOP_EE4C0_9",
        "CMT_TOP_EE4C1_0",
        "CMT_TOP_EE4C1_1",
        "CMT_TOP_EE4C1_10",
        "CMT_TOP_EE4C1_11",
        "CMT_TOP_EE4C1_2",
        "CMT_TOP_EE4C1_3",
        "CMT_TOP_EE4C1_4",
        "CMT_TOP_EE4C1_5",
        "CMT_TOP_EE4C1_6",
        "CMT_TOP_EE4C1_7",
        "CMT_TOP_EE4C1_8",
        "CMT_TOP_EE4C1_9",
        "CMT_TOP_EE4C2_0",
        "CMT_TOP_EE4C2_1",
        "CMT_TOP_EE4C2_10",
        "CMT_TOP_EE4C2_11",
        "CMT_TOP_EE4C2_2",
        "CMT_TOP_EE4C2_3",
        "CMT_TOP_EE4C2_4",
        "CMT_TOP_EE4C2_5",
        "CMT_TOP_EE4C2_6",
        "CMT_TOP_EE4C2_7",
        "CMT_TOP_EE4C2_8",
        "CMT_TOP_EE4C2_9",
        "CMT_TOP_EE4C3_0",
        "CMT_TOP_EE4C3_1",
        "CMT_TOP_EE4C3_10",
        "CMT_TOP_EE4C3_11",
        "CMT_TOP_EE4C3_2",
        "CMT_TOP_EE4C3_3",
        "CMT_TOP_EE4C3_4",
        "CMT_TOP_EE4C3_5",
        "CMT_TOP_EE4C3_6",
        "CMT_TOP_EE4C3_7",
        "CMT_TOP_EE4C3_8",
        "CMT_TOP_EE4C3_9",
        "CMT_TOP_EL1BEG0_0",
        "CMT_TOP_EL1BEG0_1",
        "CMT_TOP_EL1BEG0_10",
        "CMT_TOP_EL1BEG0_11",
        "CMT_TOP_EL1BEG0_2",
        "CMT_TOP_EL1BEG0_3",
        "CMT_TOP_EL1BEG0_4",
        "CMT_TOP_EL1BEG0_5",
        "CMT_TOP_EL1BEG0_6",
        "CMT_TOP_EL1BEG0_7",
        "CMT_TOP_EL1BEG0_8",
        "CMT_TOP_EL1BEG0_9",
        "CMT_TOP_EL1BEG1_0",
        "CMT_TOP_EL1BEG1_1",
        "CMT_TOP_EL1BEG1_10",
        "CMT_TOP_EL1BEG1_11",
        "CMT_TOP_EL1BEG1_2",
        "CMT_TOP_EL1BEG1_3",
        "CMT_TOP_EL1BEG1_4",
        "CMT_TOP_EL1BEG1_5",
        "CMT_TOP_EL1BEG1_6",
        "CMT_TOP_EL1BEG1_7",
        "CMT_TOP_EL1BEG1_8",
        "CMT_TOP_EL1BEG1_9",
        "CMT_TOP_EL1BEG2_0",
        "CMT_TOP_EL1BEG2_1",
        "CMT_TOP_EL1BEG2_10",
        "CMT_TOP_EL1BEG2_11",
        "CMT_TOP_EL1BEG2_2",
        "CMT_TOP_EL1BEG2_3",
        "CMT_TOP_EL1BEG2_4",
        "CMT_TOP_EL1BEG2_5",
        "CMT_TOP_EL1BEG2_6",
        "CMT_TOP_EL1BEG2_7",
        "CMT_TOP_EL1BEG2_8",
        "CMT_TOP_EL1BEG2_9",
        "CMT_TOP_EL1BEG3_0",
        "CMT_TOP_EL1BEG3_1",
        "CMT_TOP_EL1BEG3_10",
        "CMT_TOP_EL1BEG3_11",
        "CMT_TOP_EL1BEG3_2",
        "CMT_TOP_EL1BEG3_3",
        "CMT_TOP_EL1BEG3_4",
        "CMT_TOP_EL1BEG3_5",
        "CMT_TOP_EL1BEG3_6",
        "CMT_TOP_EL1BEG3_7",
        "CMT_TOP_EL1BEG3_8",
        "CMT_TOP_EL1BEG3_9",
        "CMT_TOP_ER1BEG0_0",
        "CMT_TOP_ER1BEG0_1",
        "CMT_TOP_ER1BEG0_10",
        "CMT_TOP_ER1BEG0_11",
        "CMT_TOP_ER1BEG0_2",
        "CMT_TOP_ER1BEG0_3",
        "CMT_TOP_ER1BEG0_4",
        "CMT_TOP_ER1BEG0_5",
        "CMT_TOP_ER1BEG0_6",
        "CMT_TOP_ER1BEG0_7",
        "CMT_TOP_ER1BEG0_8",
        "CMT_TOP_ER1BEG0_9",
        "CMT_TOP_ER1BEG1_0",
        "CMT_TOP_ER1BEG1_1",
        "CMT_TOP_ER1BEG1_10",
        "CMT_TOP_ER1BEG1_11",
        "CMT_TOP_ER1BEG1_2",
        "CMT_TOP_ER1BEG1_3",
        "CMT_TOP_ER1BEG1_4",
        "CMT_TOP_ER1BEG1_5",
        "CMT_TOP_ER1BEG1_6",
        "CMT_TOP_ER1BEG1_7",
        "CMT_TOP_ER1BEG1_8",
        "CMT_TOP_ER1BEG1_9",
        "CMT_TOP_ER1BEG2_0",
        "CMT_TOP_ER1BEG2_1",
        "CMT_TOP_ER1BEG2_10",
        "CMT_TOP_ER1BEG2_11",
        "CMT_TOP_ER1BEG2_2",
        "CMT_TOP_ER1BEG2_3",
        "CMT_TOP_ER1BEG2_4",
        "CMT_TOP_ER1BEG2_5",
        "CMT_TOP_ER1BEG2_6",
        "CMT_TOP_ER1BEG2_7",
        "CMT_TOP_ER1BEG2_8",
        "CMT_TOP_ER1BEG2_9",
        "CMT_TOP_ER1BEG3_0",
        "CMT_TOP_ER1BEG3_1",
        "CMT_TOP_ER1BEG3_10",
        "CMT_TOP_ER1BEG3_11",
        "CMT_TOP_ER1BEG3_2",
        "CMT_TOP_ER1BEG3_3",
        "CMT_TOP_ER1BEG3_4",
        "CMT_TOP_ER1BEG3_5",
        "CMT_TOP_ER1BEG3_6",
        "CMT_TOP_ER1BEG3_7",
        "CMT_TOP_ER1BEG3_8",
        "CMT_TOP_ER1BEG3_9",
        "CMT_TOP_FAN0_0",
        "CMT_TOP_FAN0_1",
        "CMT_TOP_FAN0_10",
        "CMT_TOP_FAN0_11",
        "CMT_TOP_FAN0_2",
        "CMT_TOP_FAN0_3",
        "CMT_TOP_FAN0_4",
        "CMT_TOP_FAN0_5",
        "CMT_TOP_FAN0_6",
        "CMT_TOP_FAN0_7",
        "CMT_TOP_FAN0_8",
        "CMT_TOP_FAN0_9",
        "CMT_TOP_FAN1_0",
        "CMT_TOP_FAN1_1",
        "CMT_TOP_FAN1_10",
        "CMT_TOP_FAN1_11",
        "CMT_TOP_FAN1_2",
        "CMT_TOP_FAN1_3",
        "CMT_TOP_FAN1_4",
        "CMT_TOP_FAN1_5",
        "CMT_TOP_FAN1_6",
        "CMT_TOP_FAN1_7",
        "CMT_TOP_FAN1_8",
        "CMT_TOP_FAN1_9",
        "CMT_TOP_FAN2_0",
        "CMT_TOP_FAN2_1",
        "CMT_TOP_FAN2_10",
        "CMT_TOP_FAN2_11",
        "CMT_TOP_FAN2_2",
        "CMT_TOP_FAN2_3",
        "CMT_TOP_FAN2_4",
        "CMT_TOP_FAN2_5",
        "CMT_TOP_FAN2_6",
        "CMT_TOP_FAN2_7",
        "CMT_TOP_FAN2_8",
        "CMT_TOP_FAN2_9",
        "CMT_TOP_FAN3_0",
        "CMT_TOP_FAN3_1",
        "CMT_TOP_FAN3_10",
        "CMT_TOP_FAN3_11",
        "CMT_TOP_FAN3_2",
        "CMT_TOP_FAN3_3",
        "CMT_TOP_FAN3_4",
        "CMT_TOP_FAN3_5",
        "CMT_TOP_FAN3_6",
        "CMT_TOP_FAN3_7",
        "CMT_TOP_FAN3_8",
        "CMT_TOP_FAN3_9",
        "CMT_TOP_FAN4_0",
        "CMT_TOP_FAN4_1",
        "CMT_TOP_FAN4_10",
        "CMT_TOP_FAN4_11",
        "CMT_TOP_FAN4_2",
        "CMT_TOP_FAN4_3",
        "CMT_TOP_FAN4_4",
        "CMT_TOP_FAN4_5",
        "CMT_TOP_FAN4_6",
        "CMT_TOP_FAN4_7",
        "CMT_TOP_FAN4_8",
        "CMT_TOP_FAN4_9",
        "CMT_TOP_FAN5_0",
        "CMT_TOP_FAN5_1",
        "CMT_TOP_FAN5_10",
        "CMT_TOP_FAN5_11",
        "CMT_TOP_FAN5_2",
        "CMT_TOP_FAN5_3",
        "CMT_TOP_FAN5_4",
        "CMT_TOP_FAN5_5",
        "CMT_TOP_FAN5_6",
        "CMT_TOP_FAN5_7",
        "CMT_TOP_FAN5_8",
        "CMT_TOP_FAN5_9",
        "CMT_TOP_FAN6_0",
        "CMT_TOP_FAN6_1",
        "CMT_TOP_FAN6_10",
        "CMT_TOP_FAN6_11",
        "CMT_TOP_FAN6_2",
        "CMT_TOP_FAN6_3",
        "CMT_TOP_FAN6_4",
        "CMT_TOP_FAN6_5",
        "CMT_TOP_FAN6_6",
        "CMT_TOP_FAN6_7",
        "CMT_TOP_FAN6_8",
        "CMT_TOP_FAN6_9",
        "CMT_TOP_FAN7_0",
        "CMT_TOP_FAN7_1",
        "CMT_TOP_FAN7_10",
        "CMT_TOP_FAN7_11",
        "CMT_TOP_FAN7_2",
        "CMT_TOP_FAN7_3",
        "CMT_TOP_FAN7_4",
        "CMT_TOP_FAN7_5",
        "CMT_TOP_FAN7_6",
        "CMT_TOP_FAN7_7",
        "CMT_TOP_FAN7_8",
        "CMT_TOP_FAN7_9",
        "CMT_TOP_ICLKDIV_0",
        "CMT_TOP_ICLKDIV_1",
        "CMT_TOP_ICLKDIV_10",
        "CMT_TOP_ICLKDIV_11",
        "CMT_TOP_ICLKDIV_2",
        "CMT_TOP_ICLKDIV_3",
        "CMT_TOP_ICLKDIV_4",
        "CMT_TOP_ICLKDIV_5",
        "CMT_TOP_ICLKDIV_6",
        "CMT_TOP_ICLKDIV_7",
        "CMT_TOP_ICLKDIV_8",
        "CMT_TOP_ICLKDIV_9",
        "CMT_TOP_ICLK_0",
        "CMT_TOP_ICLK_1",
        "CMT_TOP_ICLK_10",
        "CMT_TOP_ICLK_11",
        "CMT_TOP_ICLK_2",
        "CMT_TOP_ICLK_3",
        "CMT_TOP_ICLK_4",
        "CMT_TOP_ICLK_5",
        "CMT_TOP_ICLK_6",
        "CMT_TOP_ICLK_7",
        "CMT_TOP_ICLK_8",
        "CMT_TOP_ICLK_9",
        "CMT_TOP_IMUX0_0",
        "CMT_TOP_IMUX0_1",
        "CMT_TOP_IMUX0_10",
        "CMT_TOP_IMUX0_11",
        "CMT_TOP_IMUX0_2",
        "CMT_TOP_IMUX0_3",
        "CMT_TOP_IMUX0_4",
        "CMT_TOP_IMUX0_5",
        "CMT_TOP_IMUX0_6",
        "CMT_TOP_IMUX0_7",
        "CMT_TOP_IMUX0_8",
        "CMT_TOP_IMUX0_9",
        "CMT_TOP_IMUX10_0",
        "CMT_TOP_IMUX10_1",
        "CMT_TOP_IMUX10_10",
        "CMT_TOP_IMUX10_11",
        "CMT_TOP_IMUX10_2",
        "CMT_TOP_IMUX10_3",
        "CMT_TOP_IMUX10_4",
        "CMT_TOP_IMUX10_5",
        "CMT_TOP_IMUX10_6",
        "CMT_TOP_IMUX10_7",
        "CMT_TOP_IMUX10_8",
        "CMT_TOP_IMUX10_9",
        "CMT_TOP_IMUX11_0",
        "CMT_TOP_IMUX11_1",
        "CMT_TOP_IMUX11_10",
        "CMT_TOP_IMUX11_11",
        "CMT_TOP_IMUX11_2",
        "CMT_TOP_IMUX11_3",
        "CMT_TOP_IMUX11_4",
        "CMT_TOP_IMUX11_5",
        "CMT_TOP_IMUX11_6",
        "CMT_TOP_IMUX11_7",
        "CMT_TOP_IMUX11_8",
        "CMT_TOP_IMUX11_9",
        "CMT_TOP_IMUX12_0",
        "CMT_TOP_IMUX12_1",
        "CMT_TOP_IMUX12_10",
        "CMT_TOP_IMUX12_11",
        "CMT_TOP_IMUX12_2",
        "CMT_TOP_IMUX12_3",
        "CMT_TOP_IMUX12_4",
        "CMT_TOP_IMUX12_5",
        "CMT_TOP_IMUX12_6",
        "CMT_TOP_IMUX12_7",
        "CMT_TOP_IMUX12_8",
        "CMT_TOP_IMUX12_9",
        "CMT_TOP_IMUX13_0",
        "CMT_TOP_IMUX13_1",
        "CMT_TOP_IMUX13_10",
        "CMT_TOP_IMUX13_11",
        "CMT_TOP_IMUX13_2",
        "CMT_TOP_IMUX13_3",
        "CMT_TOP_IMUX13_4",
        "CMT_TOP_IMUX13_5",
        "CMT_TOP_IMUX13_6",
        "CMT_TOP_IMUX13_7",
        "CMT_TOP_IMUX13_8",
        "CMT_TOP_IMUX13_9",
        "CMT_TOP_IMUX14_0",
        "CMT_TOP_IMUX14_1",
        "CMT_TOP_IMUX14_10",
        "CMT_TOP_IMUX14_11",
        "CMT_TOP_IMUX14_2",
        "CMT_TOP_IMUX14_3",
        "CMT_TOP_IMUX14_4",
        "CMT_TOP_IMUX14_5",
        "CMT_TOP_IMUX14_6",
        "CMT_TOP_IMUX14_7",
        "CMT_TOP_IMUX14_8",
        "CMT_TOP_IMUX14_9",
        "CMT_TOP_IMUX15_0",
        "CMT_TOP_IMUX15_1",
        "CMT_TOP_IMUX15_10",
        "CMT_TOP_IMUX15_11",
        "CMT_TOP_IMUX15_2",
        "CMT_TOP_IMUX15_3",
        "CMT_TOP_IMUX15_4",
        "CMT_TOP_IMUX15_5",
        "CMT_TOP_IMUX15_6",
        "CMT_TOP_IMUX15_7",
        "CMT_TOP_IMUX15_8",
        "CMT_TOP_IMUX15_9",
        "CMT_TOP_IMUX16_0",
        "CMT_TOP_IMUX16_1",
        "CMT_TOP_IMUX16_10",
        "CMT_TOP_IMUX16_11",
        "CMT_TOP_IMUX16_2",
        "CMT_TOP_IMUX16_3",
        "CMT_TOP_IMUX16_4",
        "CMT_TOP_IMUX16_5",
        "CMT_TOP_IMUX16_6",
        "CMT_TOP_IMUX16_7",
        "CMT_TOP_IMUX16_8",
        "CMT_TOP_IMUX16_9",
        "CMT_TOP_IMUX17_0",
        "CMT_TOP_IMUX17_1",
        "CMT_TOP_IMUX17_10",
        "CMT_TOP_IMUX17_11",
        "CMT_TOP_IMUX17_2",
        "CMT_TOP_IMUX17_3",
        "CMT_TOP_IMUX17_4",
        "CMT_TOP_IMUX17_5",
        "CMT_TOP_IMUX17_6",
        "CMT_TOP_IMUX17_7",
        "CMT_TOP_IMUX17_8",
        "CMT_TOP_IMUX17_9",
        "CMT_TOP_IMUX18_0",
        "CMT_TOP_IMUX18_1",
        "CMT_TOP_IMUX18_10",
        "CMT_TOP_IMUX18_11",
        "CMT_TOP_IMUX18_2",
        "CMT_TOP_IMUX18_3",
        "CMT_TOP_IMUX18_4",
        "CMT_TOP_IMUX18_5",
        "CMT_TOP_IMUX18_6",
        "CMT_TOP_IMUX18_7",
        "CMT_TOP_IMUX18_8",
        "CMT_TOP_IMUX18_9",
        "CMT_TOP_IMUX19_0",
        "CMT_TOP_IMUX19_1",
        "CMT_TOP_IMUX19_10",
        "CMT_TOP_IMUX19_11",
        "CMT_TOP_IMUX19_2",
        "CMT_TOP_IMUX19_3",
        "CMT_TOP_IMUX19_4",
        "CMT_TOP_IMUX19_5",
        "CMT_TOP_IMUX19_6",
        "CMT_TOP_IMUX19_7",
        "CMT_TOP_IMUX19_8",
        "CMT_TOP_IMUX19_9",
        "CMT_TOP_IMUX1_0",
        "CMT_TOP_IMUX1_1",
        "CMT_TOP_IMUX1_10",
        "CMT_TOP_IMUX1_11",
        "CMT_TOP_IMUX1_2",
        "CMT_TOP_IMUX1_3",
        "CMT_TOP_IMUX1_4",
        "CMT_TOP_IMUX1_5",
        "CMT_TOP_IMUX1_6",
        "CMT_TOP_IMUX1_7",
        "CMT_TOP_IMUX1_8",
        "CMT_TOP_IMUX1_9",
        "CMT_TOP_IMUX20_0",
        "CMT_TOP_IMUX20_1",
        "CMT_TOP_IMUX20_10",
        "CMT_TOP_IMUX20_11",
        "CMT_TOP_IMUX20_2",
        "CMT_TOP_IMUX20_3",
        "CMT_TOP_IMUX20_4",
        "CMT_TOP_IMUX20_5",
        "CMT_TOP_IMUX20_6",
        "CMT_TOP_IMUX20_7",
        "CMT_TOP_IMUX20_8",
        "CMT_TOP_IMUX20_9",
        "CMT_TOP_IMUX21_0",
        "CMT_TOP_IMUX21_1",
        "CMT_TOP_IMUX21_10",
        "CMT_TOP_IMUX21_11",
        "CMT_TOP_IMUX21_2",
        "CMT_TOP_IMUX21_3",
        "CMT_TOP_IMUX21_4",
        "CMT_TOP_IMUX21_5",
        "CMT_TOP_IMUX21_6",
        "CMT_TOP_IMUX21_7",
        "CMT_TOP_IMUX21_8",
        "CMT_TOP_IMUX21_9",
        "CMT_TOP_IMUX22_0",
        "CMT_TOP_IMUX22_1",
        "CMT_TOP_IMUX22_10",
        "CMT_TOP_IMUX22_11",
        "CMT_TOP_IMUX22_2",
        "CMT_TOP_IMUX22_3",
        "CMT_TOP_IMUX22_4",
        "CMT_TOP_IMUX22_5",
        "CMT_TOP_IMUX22_6",
        "CMT_TOP_IMUX22_7",
        "CMT_TOP_IMUX22_8",
        "CMT_TOP_IMUX22_9",
        "CMT_TOP_IMUX23_0",
        "CMT_TOP_IMUX23_1",
        "CMT_TOP_IMUX23_10",
        "CMT_TOP_IMUX23_11",
        "CMT_TOP_IMUX23_2",
        "CMT_TOP_IMUX23_3",
        "CMT_TOP_IMUX23_4",
        "CMT_TOP_IMUX23_5",
        "CMT_TOP_IMUX23_6",
        "CMT_TOP_IMUX23_7",
        "CMT_TOP_IMUX23_8",
        "CMT_TOP_IMUX23_9",
        "CMT_TOP_IMUX24_0",
        "CMT_TOP_IMUX24_1",
        "CMT_TOP_IMUX24_10",
        "CMT_TOP_IMUX24_11",
        "CMT_TOP_IMUX24_2",
        "CMT_TOP_IMUX24_3",
        "CMT_TOP_IMUX24_4",
        "CMT_TOP_IMUX24_5",
        "CMT_TOP_IMUX24_6",
        "CMT_TOP_IMUX24_7",
        "CMT_TOP_IMUX24_8",
        "CMT_TOP_IMUX24_9",
        "CMT_TOP_IMUX25_0",
        "CMT_TOP_IMUX25_1",
        "CMT_TOP_IMUX25_10",
        "CMT_TOP_IMUX25_11",
        "CMT_TOP_IMUX25_2",
        "CMT_TOP_IMUX25_3",
        "CMT_TOP_IMUX25_4",
        "CMT_TOP_IMUX25_5",
        "CMT_TOP_IMUX25_6",
        "CMT_TOP_IMUX25_7",
        "CMT_TOP_IMUX25_8",
        "CMT_TOP_IMUX25_9",
        "CMT_TOP_IMUX26_0",
        "CMT_TOP_IMUX26_1",
        "CMT_TOP_IMUX26_10",
        "CMT_TOP_IMUX26_11",
        "CMT_TOP_IMUX26_2",
        "CMT_TOP_IMUX26_3",
        "CMT_TOP_IMUX26_4",
        "CMT_TOP_IMUX26_5",
        "CMT_TOP_IMUX26_6",
        "CMT_TOP_IMUX26_7",
        "CMT_TOP_IMUX26_8",
        "CMT_TOP_IMUX26_9",
        "CMT_TOP_IMUX27_0",
        "CMT_TOP_IMUX27_1",
        "CMT_TOP_IMUX27_10",
        "CMT_TOP_IMUX27_11",
        "CMT_TOP_IMUX27_2",
        "CMT_TOP_IMUX27_3",
        "CMT_TOP_IMUX27_4",
        "CMT_TOP_IMUX27_5",
        "CMT_TOP_IMUX27_6",
        "CMT_TOP_IMUX27_7",
        "CMT_TOP_IMUX27_8",
        "CMT_TOP_IMUX27_9",
        "CMT_TOP_IMUX28_0",
        "CMT_TOP_IMUX28_1",
        "CMT_TOP_IMUX28_10",
        "CMT_TOP_IMUX28_11",
        "CMT_TOP_IMUX28_2",
        "CMT_TOP_IMUX28_3",
        "CMT_TOP_IMUX28_4",
        "CMT_TOP_IMUX28_5",
        "CMT_TOP_IMUX28_6",
        "CMT_TOP_IMUX28_7",
        "CMT_TOP_IMUX28_8",
        "CMT_TOP_IMUX28_9",
        "CMT_TOP_IMUX29_0",
        "CMT_TOP_IMUX29_1",
        "CMT_TOP_IMUX29_10",
        "CMT_TOP_IMUX29_11",
        "CMT_TOP_IMUX29_2",
        "CMT_TOP_IMUX29_3",
        "CMT_TOP_IMUX29_4",
        "CMT_TOP_IMUX29_5",
        "CMT_TOP_IMUX29_6",
        "CMT_TOP_IMUX29_7",
        "CMT_TOP_IMUX29_8",
        "CMT_TOP_IMUX29_9",
        "CMT_TOP_IMUX2_0",
        "CMT_TOP_IMUX2_1",
        "CMT_TOP_IMUX2_10",
        "CMT_TOP_IMUX2_11",
        "CMT_TOP_IMUX2_2",
        "CMT_TOP_IMUX2_3",
        "CMT_TOP_IMUX2_4",
        "CMT_TOP_IMUX2_5",
        "CMT_TOP_IMUX2_6",
        "CMT_TOP_IMUX2_7",
        "CMT_TOP_IMUX2_8",
        "CMT_TOP_IMUX2_9",
        "CMT_TOP_IMUX30_0",
        "CMT_TOP_IMUX30_1",
        "CMT_TOP_IMUX30_10",
        "CMT_TOP_IMUX30_11",
        "CMT_TOP_IMUX30_2",
        "CMT_TOP_IMUX30_3",
        "CMT_TOP_IMUX30_4",
        "CMT_TOP_IMUX30_5",
        "CMT_TOP_IMUX30_6",
        "CMT_TOP_IMUX30_7",
        "CMT_TOP_IMUX30_8",
        "CMT_TOP_IMUX30_9",
        "CMT_TOP_IMUX31_0",
        "CMT_TOP_IMUX31_1",
        "CMT_TOP_IMUX31_10",
        "CMT_TOP_IMUX31_11",
        "CMT_TOP_IMUX31_2",
        "CMT_TOP_IMUX31_3",
        "CMT_TOP_IMUX31_4",
        "CMT_TOP_IMUX31_5",
        "CMT_TOP_IMUX31_6",
        "CMT_TOP_IMUX31_7",
        "CMT_TOP_IMUX31_8",
        "CMT_TOP_IMUX31_9",
        "CMT_TOP_IMUX32_0",
        "CMT_TOP_IMUX32_1",
        "CMT_TOP_IMUX32_10",
        "CMT_TOP_IMUX32_11",
        "CMT_TOP_IMUX32_2",
        "CMT_TOP_IMUX32_3",
        "CMT_TOP_IMUX32_4",
        "CMT_TOP_IMUX32_5",
        "CMT_TOP_IMUX32_6",
        "CMT_TOP_IMUX32_7",
        "CMT_TOP_IMUX32_8",
        "CMT_TOP_IMUX32_9",
        "CMT_TOP_IMUX33_0",
        "CMT_TOP_IMUX33_1",
        "CMT_TOP_IMUX33_10",
        "CMT_TOP_IMUX33_11",
        "CMT_TOP_IMUX33_2",
        "CMT_TOP_IMUX33_3",
        "CMT_TOP_IMUX33_4",
        "CMT_TOP_IMUX33_5",
        "CMT_TOP_IMUX33_6",
        "CMT_TOP_IMUX33_7",
        "CMT_TOP_IMUX33_8",
        "CMT_TOP_IMUX33_9",
        "CMT_TOP_IMUX34_0",
        "CMT_TOP_IMUX34_1",
        "CMT_TOP_IMUX34_10",
        "CMT_TOP_IMUX34_11",
        "CMT_TOP_IMUX34_2",
        "CMT_TOP_IMUX34_3",
        "CMT_TOP_IMUX34_4",
        "CMT_TOP_IMUX34_5",
        "CMT_TOP_IMUX34_6",
        "CMT_TOP_IMUX34_7",
        "CMT_TOP_IMUX34_8",
        "CMT_TOP_IMUX34_9",
        "CMT_TOP_IMUX35_0",
        "CMT_TOP_IMUX35_1",
        "CMT_TOP_IMUX35_10",
        "CMT_TOP_IMUX35_11",
        "CMT_TOP_IMUX35_2",
        "CMT_TOP_IMUX35_3",
        "CMT_TOP_IMUX35_4",
        "CMT_TOP_IMUX35_5",
        "CMT_TOP_IMUX35_6",
        "CMT_TOP_IMUX35_7",
        "CMT_TOP_IMUX35_8",
        "CMT_TOP_IMUX35_9",
        "CMT_TOP_IMUX36_0",
        "CMT_TOP_IMUX36_1",
        "CMT_TOP_IMUX36_10",
        "CMT_TOP_IMUX36_11",
        "CMT_TOP_IMUX36_2",
        "CMT_TOP_IMUX36_3",
        "CMT_TOP_IMUX36_4",
        "CMT_TOP_IMUX36_5",
        "CMT_TOP_IMUX36_6",
        "CMT_TOP_IMUX36_7",
        "CMT_TOP_IMUX36_8",
        "CMT_TOP_IMUX36_9",
        "CMT_TOP_IMUX37_0",
        "CMT_TOP_IMUX37_1",
        "CMT_TOP_IMUX37_10",
        "CMT_TOP_IMUX37_11",
        "CMT_TOP_IMUX37_2",
        "CMT_TOP_IMUX37_3",
        "CMT_TOP_IMUX37_4",
        "CMT_TOP_IMUX37_5",
        "CMT_TOP_IMUX37_6",
        "CMT_TOP_IMUX37_7",
        "CMT_TOP_IMUX37_8",
        "CMT_TOP_IMUX37_9",
        "CMT_TOP_IMUX38_0",
        "CMT_TOP_IMUX38_1",
        "CMT_TOP_IMUX38_10",
        "CMT_TOP_IMUX38_11",
        "CMT_TOP_IMUX38_2",
        "CMT_TOP_IMUX38_3",
        "CMT_TOP_IMUX38_4",
        "CMT_TOP_IMUX38_5",
        "CMT_TOP_IMUX38_6",
        "CMT_TOP_IMUX38_7",
        "CMT_TOP_IMUX38_8",
        "CMT_TOP_IMUX38_9",
        "CMT_TOP_IMUX39_0",
        "CMT_TOP_IMUX39_1",
        "CMT_TOP_IMUX39_10",
        "CMT_TOP_IMUX39_11",
        "CMT_TOP_IMUX39_2",
        "CMT_TOP_IMUX39_3",
        "CMT_TOP_IMUX39_4",
        "CMT_TOP_IMUX39_5",
        "CMT_TOP_IMUX39_6",
        "CMT_TOP_IMUX39_7",
        "CMT_TOP_IMUX39_8",
        "CMT_TOP_IMUX39_9",
        "CMT_TOP_IMUX3_0",
        "CMT_TOP_IMUX3_1",
        "CMT_TOP_IMUX3_10",
        "CMT_TOP_IMUX3_11",
        "CMT_TOP_IMUX3_2",
        "CMT_TOP_IMUX3_3",
        "CMT_TOP_IMUX3_4",
        "CMT_TOP_IMUX3_5",
        "CMT_TOP_IMUX3_6",
        "CMT_TOP_IMUX3_7",
        "CMT_TOP_IMUX3_8",
        "CMT_TOP_IMUX3_9",
        "CMT_TOP_IMUX40_0",
        "CMT_TOP_IMUX40_1",
        "CMT_TOP_IMUX40_10",
        "CMT_TOP_IMUX40_11",
        "CMT_TOP_IMUX40_2",
        "CMT_TOP_IMUX40_3",
        "CMT_TOP_IMUX40_4",
        "CMT_TOP_IMUX40_5",
        "CMT_TOP_IMUX40_6",
        "CMT_TOP_IMUX40_7",
        "CMT_TOP_IMUX40_8",
        "CMT_TOP_IMUX40_9",
        "CMT_TOP_IMUX41_0",
        "CMT_TOP_IMUX41_1",
        "CMT_TOP_IMUX41_10",
        "CMT_TOP_IMUX41_11",
        "CMT_TOP_IMUX41_2",
        "CMT_TOP_IMUX41_3",
        "CMT_TOP_IMUX41_4",
        "CMT_TOP_IMUX41_5",
        "CMT_TOP_IMUX41_6",
        "CMT_TOP_IMUX41_7",
        "CMT_TOP_IMUX41_8",
        "CMT_TOP_IMUX41_9",
        "CMT_TOP_IMUX42_0",
        "CMT_TOP_IMUX42_1",
        "CMT_TOP_IMUX42_10",
        "CMT_TOP_IMUX42_11",
        "CMT_TOP_IMUX42_2",
        "CMT_TOP_IMUX42_3",
        "CMT_TOP_IMUX42_4",
        "CMT_TOP_IMUX42_5",
        "CMT_TOP_IMUX42_6",
        "CMT_TOP_IMUX42_7",
        "CMT_TOP_IMUX42_8",
        "CMT_TOP_IMUX42_9",
        "CMT_TOP_IMUX43_0",
        "CMT_TOP_IMUX43_1",
        "CMT_TOP_IMUX43_10",
        "CMT_TOP_IMUX43_11",
        "CMT_TOP_IMUX43_2",
        "CMT_TOP_IMUX43_3",
        "CMT_TOP_IMUX43_4",
        "CMT_TOP_IMUX43_5",
        "CMT_TOP_IMUX43_6",
        "CMT_TOP_IMUX43_7",
        "CMT_TOP_IMUX43_8",
        "CMT_TOP_IMUX43_9",
        "CMT_TOP_IMUX44_0",
        "CMT_TOP_IMUX44_1",
        "CMT_TOP_IMUX44_10",
        "CMT_TOP_IMUX44_11",
        "CMT_TOP_IMUX44_2",
        "CMT_TOP_IMUX44_3",
        "CMT_TOP_IMUX44_4",
        "CMT_TOP_IMUX44_5",
        "CMT_TOP_IMUX44_6",
        "CMT_TOP_IMUX44_7",
        "CMT_TOP_IMUX44_8",
        "CMT_TOP_IMUX44_9",
        "CMT_TOP_IMUX45_0",
        "CMT_TOP_IMUX45_1",
        "CMT_TOP_IMUX45_10",
        "CMT_TOP_IMUX45_11",
        "CMT_TOP_IMUX45_2",
        "CMT_TOP_IMUX45_3",
        "CMT_TOP_IMUX45_4",
        "CMT_TOP_IMUX45_5",
        "CMT_TOP_IMUX45_6",
        "CMT_TOP_IMUX45_7",
        "CMT_TOP_IMUX45_8",
        "CMT_TOP_IMUX45_9",
        "CMT_TOP_IMUX46_0",
        "CMT_TOP_IMUX46_1",
        "CMT_TOP_IMUX46_10",
        "CMT_TOP_IMUX46_11",
        "CMT_TOP_IMUX46_2",
        "CMT_TOP_IMUX46_3",
        "CMT_TOP_IMUX46_4",
        "CMT_TOP_IMUX46_5",
        "CMT_TOP_IMUX46_6",
        "CMT_TOP_IMUX46_7",
        "CMT_TOP_IMUX46_8",
        "CMT_TOP_IMUX46_9",
        "CMT_TOP_IMUX47_0",
        "CMT_TOP_IMUX47_1",
        "CMT_TOP_IMUX47_10",
        "CMT_TOP_IMUX47_11",
        "CMT_TOP_IMUX47_2",
        "CMT_TOP_IMUX47_3",
        "CMT_TOP_IMUX47_4",
        "CMT_TOP_IMUX47_5",
        "CMT_TOP_IMUX47_6",
        "CMT_TOP_IMUX47_7",
        "CMT_TOP_IMUX47_8",
        "CMT_TOP_IMUX47_9",
        "CMT_TOP_IMUX4_0",
        "CMT_TOP_IMUX4_1",
        "CMT_TOP_IMUX4_10",
        "CMT_TOP_IMUX4_11",
        "CMT_TOP_IMUX4_2",
        "CMT_TOP_IMUX4_3",
        "CMT_TOP_IMUX4_4",
        "CMT_TOP_IMUX4_5",
        "CMT_TOP_IMUX4_6",
        "CMT_TOP_IMUX4_7",
        "CMT_TOP_IMUX4_8",
        "CMT_TOP_IMUX4_9",
        "CMT_TOP_IMUX5_0",
        "CMT_TOP_IMUX5_1",
        "CMT_TOP_IMUX5_10",
        "CMT_TOP_IMUX5_11",
        "CMT_TOP_IMUX5_2",
        "CMT_TOP_IMUX5_3",
        "CMT_TOP_IMUX5_4",
        "CMT_TOP_IMUX5_5",
        "CMT_TOP_IMUX5_6",
        "CMT_TOP_IMUX5_7",
        "CMT_TOP_IMUX5_8",
        "CMT_TOP_IMUX5_9",
        "CMT_TOP_IMUX6_0",
        "CMT_TOP_IMUX6_1",
        "CMT_TOP_IMUX6_10",
        "CMT_TOP_IMUX6_11",
        "CMT_TOP_IMUX6_2",
        "CMT_TOP_IMUX6_3",
        "CMT_TOP_IMUX6_4",
        "CMT_TOP_IMUX6_5",
        "CMT_TOP_IMUX6_6",
        "CMT_TOP_IMUX6_7",
        "CMT_TOP_IMUX6_8",
        "CMT_TOP_IMUX6_9",
        "CMT_TOP_IMUX7_0",
        "CMT_TOP_IMUX7_1",
        "CMT_TOP_IMUX7_10",
        "CMT_TOP_IMUX7_11",
        "CMT_TOP_IMUX7_2",
        "CMT_TOP_IMUX7_3",
        "CMT_TOP_IMUX7_4",
        "CMT_TOP_IMUX7_5",
        "CMT_TOP_IMUX7_6",
        "CMT_TOP_IMUX7_7",
        "CMT_TOP_IMUX7_8",
        "CMT_TOP_IMUX7_9",
        "CMT_TOP_IMUX8_0",
        "CMT_TOP_IMUX8_1",
        "CMT_TOP_IMUX8_10",
        "CMT_TOP_IMUX8_11",
        "CMT_TOP_IMUX8_2",
        "CMT_TOP_IMUX8_3",
        "CMT_TOP_IMUX8_4",
        "CMT_TOP_IMUX8_5",
        "CMT_TOP_IMUX8_6",
        "CMT_TOP_IMUX8_7",
        "CMT_TOP_IMUX8_8",
        "CMT_TOP_IMUX8_9",
        "CMT_TOP_IMUX9_0",
        "CMT_TOP_IMUX9_1",
        "CMT_TOP_IMUX9_10",
        "CMT_TOP_IMUX9_11",
        "CMT_TOP_IMUX9_2",
        "CMT_TOP_IMUX9_3",
        "CMT_TOP_IMUX9_4",
        "CMT_TOP_IMUX9_5",
        "CMT_TOP_IMUX9_6",
        "CMT_TOP_IMUX9_7",
        "CMT_TOP_IMUX9_8",
        "CMT_TOP_IMUX9_9",
        "CMT_TOP_LH10_0",
        "CMT_TOP_LH10_1",
        "CMT_TOP_LH10_10",
        "CMT_TOP_LH10_11",
        "CMT_TOP_LH10_2",
        "CMT_TOP_LH10_3",
        "CMT_TOP_LH10_4",
        "CMT_TOP_LH10_5",
        "CMT_TOP_LH10_6",
        "CMT_TOP_LH10_7",
        "CMT_TOP_LH10_8",
        "CMT_TOP_LH10_9",
        "CMT_TOP_LH11_0",
        "CMT_TOP_LH11_1",
        "CMT_TOP_LH11_10",
        "CMT_TOP_LH11_11",
        "CMT_TOP_LH11_2",
        "CMT_TOP_LH11_3",
        "CMT_TOP_LH11_4",
        "CMT_TOP_LH11_5",
        "CMT_TOP_LH11_6",
        "CMT_TOP_LH11_7",
        "CMT_TOP_LH11_8",
        "CMT_TOP_LH11_9",
        "CMT_TOP_LH12_0",
        "CMT_TOP_LH12_1",
        "CMT_TOP_LH12_10",
        "CMT_TOP_LH12_11",
        "CMT_TOP_LH12_2",
        "CMT_TOP_LH12_3",
        "CMT_TOP_LH12_4",
        "CMT_TOP_LH12_5",
        "CMT_TOP_LH12_6",
        "CMT_TOP_LH12_7",
        "CMT_TOP_LH12_8",
        "CMT_TOP_LH12_9",
        "CMT_TOP_LH1_0",
        "CMT_TOP_LH1_1",
        "CMT_TOP_LH1_10",
        "CMT_TOP_LH1_11",
        "CMT_TOP_LH1_2",
        "CMT_TOP_LH1_3",
        "CMT_TOP_LH1_4",
        "CMT_TOP_LH1_5",
        "CMT_TOP_LH1_6",
        "CMT_TOP_LH1_7",
        "CMT_TOP_LH1_8",
        "CMT_TOP_LH1_9",
        "CMT_TOP_LH2_0",
        "CMT_TOP_LH2_1",
        "CMT_TOP_LH2_10",
        "CMT_TOP_LH2_11",
        "CMT_TOP_LH2_2",
        "CMT_TOP_LH2_3",
        "CMT_TOP_LH2_4",
        "CMT_TOP_LH2_5",
        "CMT_TOP_LH2_6",
        "CMT_TOP_LH2_7",
        "CMT_TOP_LH2_8",
        "CMT_TOP_LH2_9",
        "CMT_TOP_LH3_0",
        "CMT_TOP_LH3_1",
        "CMT_TOP_LH3_10",
        "CMT_TOP_LH3_11",
        "CMT_TOP_LH3_2",
        "CMT_TOP_LH3_3",
        "CMT_TOP_LH3_4",
        "CMT_TOP_LH3_5",
        "CMT_TOP_LH3_6",
        "CMT_TOP_LH3_7",
        "CMT_TOP_LH3_8",
        "CMT_TOP_LH3_9",
        "CMT_TOP_LH4_0",
        "CMT_TOP_LH4_1",
        "CMT_TOP_LH4_10",
        "CMT_TOP_LH4_11",
        "CMT_TOP_LH4_2",
        "CMT_TOP_LH4_3",
        "CMT_TOP_LH4_4",
        "CMT_TOP_LH4_5",
        "CMT_TOP_LH4_6",
        "CMT_TOP_LH4_7",
        "CMT_TOP_LH4_8",
        "CMT_TOP_LH4_9",
        "CMT_TOP_LH5_0",
        "CMT_TOP_LH5_1",
        "CMT_TOP_LH5_10",
        "CMT_TOP_LH5_11",
        "CMT_TOP_LH5_2",
        "CMT_TOP_LH5_3",
        "CMT_TOP_LH5_4",
        "CMT_TOP_LH5_5",
        "CMT_TOP_LH5_6",
        "CMT_TOP_LH5_7",
        "CMT_TOP_LH5_8",
        "CMT_TOP_LH5_9",
        "CMT_TOP_LH6_0",
        "CMT_TOP_LH6_1",
        "CMT_TOP_LH6_10",
        "CMT_TOP_LH6_11",
        "CMT_TOP_LH6_2",
        "CMT_TOP_LH6_3",
        "CMT_TOP_LH6_4",
        "CMT_TOP_LH6_5",
        "CMT_TOP_LH6_6",
        "CMT_TOP_LH6_7",
        "CMT_TOP_LH6_8",
        "CMT_TOP_LH6_9",
        "CMT_TOP_LH7_0",
        "CMT_TOP_LH7_1",
        "CMT_TOP_LH7_10",
        "CMT_TOP_LH7_11",
        "CMT_TOP_LH7_2",
        "CMT_TOP_LH7_3",
        "CMT_TOP_LH7_4",
        "CMT_TOP_LH7_5",
        "CMT_TOP_LH7_6",
        "CMT_TOP_LH7_7",
        "CMT_TOP_LH7_8",
        "CMT_TOP_LH7_9",
        "CMT_TOP_LH8_0",
        "CMT_TOP_LH8_1",
        "CMT_TOP_LH8_10",
        "CMT_TOP_LH8_11",
        "CMT_TOP_LH8_2",
        "CMT_TOP_LH8_3",
        "CMT_TOP_LH8_4",
        "CMT_TOP_LH8_5",
        "CMT_TOP_LH8_6",
        "CMT_TOP_LH8_7",
        "CMT_TOP_LH8_8",
        "CMT_TOP_LH8_9",
        "CMT_TOP_LH9_0",
        "CMT_TOP_LH9_1",
        "CMT_TOP_LH9_10",
        "CMT_TOP_LH9_11",
        "CMT_TOP_LH9_2",
        "CMT_TOP_LH9_3",
        "CMT_TOP_LH9_4",
        "CMT_TOP_LH9_5",
        "CMT_TOP_LH9_6",
        "CMT_TOP_LH9_7",
        "CMT_TOP_LH9_8",
        "CMT_TOP_LH9_9",
        "CMT_TOP_LOGIC_OUTS_L_B0_0",
        "CMT_TOP_LOGIC_OUTS_L_B0_1",
        "CMT_TOP_LOGIC_OUTS_L_B0_10",
        "CMT_TOP_LOGIC_OUTS_L_B0_11",
        "CMT_TOP_LOGIC_OUTS_L_B0_2",
        "CMT_TOP_LOGIC_OUTS_L_B0_3",
        "CMT_TOP_LOGIC_OUTS_L_B0_4",
        "CMT_TOP_LOGIC_OUTS_L_B0_5",
        "CMT_TOP_LOGIC_OUTS_L_B0_6",
        "CMT_TOP_LOGIC_OUTS_L_B0_7",
        "CMT_TOP_LOGIC_OUTS_L_B0_8",
        "CMT_TOP_LOGIC_OUTS_L_B0_9",
        "CMT_TOP_LOGIC_OUTS_L_B10_0",
        "CMT_TOP_LOGIC_OUTS_L_B10_1",
        "CMT_TOP_LOGIC_OUTS_L_B10_10",
        "CMT_TOP_LOGIC_OUTS_L_B10_11",
        "CMT_TOP_LOGIC_OUTS_L_B10_2",
        "CMT_TOP_LOGIC_OUTS_L_B10_3",
        "CMT_TOP_LOGIC_OUTS_L_B10_4",
        "CMT_TOP_LOGIC_OUTS_L_B10_5",
        "CMT_TOP_LOGIC_OUTS_L_B10_6",
        "CMT_TOP_LOGIC_OUTS_L_B10_7",
        "CMT_TOP_LOGIC_OUTS_L_B10_8",
        "CMT_TOP_LOGIC_OUTS_L_B10_9",
        "CMT_TOP_LOGIC_OUTS_L_B11_0",
        "CMT_TOP_LOGIC_OUTS_L_B11_1",
        "CMT_TOP_LOGIC_OUTS_L_B11_10",
        "CMT_TOP_LOGIC_OUTS_L_B11_11",
        "CMT_TOP_LOGIC_OUTS_L_B11_2",
        "CMT_TOP_LOGIC_OUTS_L_B11_3",
        "CMT_TOP_LOGIC_OUTS_L_B11_4",
        "CMT_TOP_LOGIC_OUTS_L_B11_5",
        "CMT_TOP_LOGIC_OUTS_L_B11_6",
        "CMT_TOP_LOGIC_OUTS_L_B11_7",
        "CMT_TOP_LOGIC_OUTS_L_B11_8",
        "CMT_TOP_LOGIC_OUTS_L_B11_9",
        "CMT_TOP_LOGIC_OUTS_L_B12_0",
        "CMT_TOP_LOGIC_OUTS_L_B12_1",
        "CMT_TOP_LOGIC_OUTS_L_B12_10",
        "CMT_TOP_LOGIC_OUTS_L_B12_11",
        "CMT_TOP_LOGIC_OUTS_L_B12_2",
        "CMT_TOP_LOGIC_OUTS_L_B12_3",
        "CMT_TOP_LOGIC_OUTS_L_B12_4",
        "CMT_TOP_LOGIC_OUTS_L_B12_5",
        "CMT_TOP_LOGIC_OUTS_L_B12_6",
        "CMT_TOP_LOGIC_OUTS_L_B12_7",
        "CMT_TOP_LOGIC_OUTS_L_B12_8",
        "CMT_TOP_LOGIC_OUTS_L_B12_9",
        "CMT_TOP_LOGIC_OUTS_L_B13_0",
        "CMT_TOP_LOGIC_OUTS_L_B13_1",
        "CMT_TOP_LOGIC_OUTS_L_B13_10",
        "CMT_TOP_LOGIC_OUTS_L_B13_11",
        "CMT_TOP_LOGIC_OUTS_L_B13_2",
        "CMT_TOP_LOGIC_OUTS_L_B13_3",
        "CMT_TOP_LOGIC_OUTS_L_B13_4",
        "CMT_TOP_LOGIC_OUTS_L_B13_5",
        "CMT_TOP_LOGIC_OUTS_L_B13_6",
        "CMT_TOP_LOGIC_OUTS_L_B13_7",
        "CMT_TOP_LOGIC_OUTS_L_B13_8",
        "CMT_TOP_LOGIC_OUTS_L_B13_9",
        "CMT_TOP_LOGIC_OUTS_L_B14_0",
        "CMT_TOP_LOGIC_OUTS_L_B14_1",
        "CMT_TOP_LOGIC_OUTS_L_B14_10",
        "CMT_TOP_LOGIC_OUTS_L_B14_11",
        "CMT_TOP_LOGIC_OUTS_L_B14_2",
        "CMT_TOP_LOGIC_OUTS_L_B14_3",
        "CMT_TOP_LOGIC_OUTS_L_B14_4",
        "CMT_TOP_LOGIC_OUTS_L_B14_5",
        "CMT_TOP_LOGIC_OUTS_L_B14_6",
        "CMT_TOP_LOGIC_OUTS_L_B14_7",
        "CMT_TOP_LOGIC_OUTS_L_B14_8",
        "CMT_TOP_LOGIC_OUTS_L_B14_9",
        "CMT_TOP_LOGIC_OUTS_L_B15_0",
        "CMT_TOP_LOGIC_OUTS_L_B15_1",
        "CMT_TOP_LOGIC_OUTS_L_B15_10",
        "CMT_TOP_LOGIC_OUTS_L_B15_11",
        "CMT_TOP_LOGIC_OUTS_L_B15_2",
        "CMT_TOP_LOGIC_OUTS_L_B15_3",
        "CMT_TOP_LOGIC_OUTS_L_B15_4",
        "CMT_TOP_LOGIC_OUTS_L_B15_5",
        "CMT_TOP_LOGIC_OUTS_L_B15_6",
        "CMT_TOP_LOGIC_OUTS_L_B15_7",
        "CMT_TOP_LOGIC_OUTS_L_B15_8",
        "CMT_TOP_LOGIC_OUTS_L_B15_9",
        "CMT_TOP_LOGIC_OUTS_L_B16_0",
        "CMT_TOP_LOGIC_OUTS_L_B16_1",
        "CMT_TOP_LOGIC_OUTS_L_B16_10",
        "CMT_TOP_LOGIC_OUTS_L_B16_11",
        "CMT_TOP_LOGIC_OUTS_L_B16_2",
        "CMT_TOP_LOGIC_OUTS_L_B16_3",
        "CMT_TOP_LOGIC_OUTS_L_B16_4",
        "CMT_TOP_LOGIC_OUTS_L_B16_5",
        "CMT_TOP_LOGIC_OUTS_L_B16_6",
        "CMT_TOP_LOGIC_OUTS_L_B16_7",
        "CMT_TOP_LOGIC_OUTS_L_B16_8",
        "CMT_TOP_LOGIC_OUTS_L_B16_9",
        "CMT_TOP_LOGIC_OUTS_L_B17_0",
        "CMT_TOP_LOGIC_OUTS_L_B17_1",
        "CMT_TOP_LOGIC_OUTS_L_B17_10",
        "CMT_TOP_LOGIC_OUTS_L_B17_11",
        "CMT_TOP_LOGIC_OUTS_L_B17_2",
        "CMT_TOP_LOGIC_OUTS_L_B17_3",
        "CMT_TOP_LOGIC_OUTS_L_B17_4",
        "CMT_TOP_LOGIC_OUTS_L_B17_5",
        "CMT_TOP_LOGIC_OUTS_L_B17_6",
        "CMT_TOP_LOGIC_OUTS_L_B17_7",
        "CMT_TOP_LOGIC_OUTS_L_B17_8",
        "CMT_TOP_LOGIC_OUTS_L_B17_9",
        "CMT_TOP_LOGIC_OUTS_L_B18_0",
        "CMT_TOP_LOGIC_OUTS_L_B18_1",
        "CMT_TOP_LOGIC_OUTS_L_B18_10",
        "CMT_TOP_LOGIC_OUTS_L_B18_11",
        "CMT_TOP_LOGIC_OUTS_L_B18_2",
        "CMT_TOP_LOGIC_OUTS_L_B18_3",
        "CMT_TOP_LOGIC_OUTS_L_B18_4",
        "CMT_TOP_LOGIC_OUTS_L_B18_5",
        "CMT_TOP_LOGIC_OUTS_L_B18_6",
        "CMT_TOP_LOGIC_OUTS_L_B18_7",
        "CMT_TOP_LOGIC_OUTS_L_B18_8",
        "CMT_TOP_LOGIC_OUTS_L_B18_9",
        "CMT_TOP_LOGIC_OUTS_L_B19_0",
        "CMT_TOP_LOGIC_OUTS_L_B19_1",
        "CMT_TOP_LOGIC_OUTS_L_B19_10",
        "CMT_TOP_LOGIC_OUTS_L_B19_11",
        "CMT_TOP_LOGIC_OUTS_L_B19_2",
        "CMT_TOP_LOGIC_OUTS_L_B19_3",
        "CMT_TOP_LOGIC_OUTS_L_B19_4",
        "CMT_TOP_LOGIC_OUTS_L_B19_5",
        "CMT_TOP_LOGIC_OUTS_L_B19_6",
        "CMT_TOP_LOGIC_OUTS_L_B19_7",
        "CMT_TOP_LOGIC_OUTS_L_B19_8",
        "CMT_TOP_LOGIC_OUTS_L_B19_9",
        "CMT_TOP_LOGIC_OUTS_L_B1_0",
        "CMT_TOP_LOGIC_OUTS_L_B1_1",
        "CMT_TOP_LOGIC_OUTS_L_B1_10",
        "CMT_TOP_LOGIC_OUTS_L_B1_11",
        "CMT_TOP_LOGIC_OUTS_L_B1_2",
        "CMT_TOP_LOGIC_OUTS_L_B1_3",
        "CMT_TOP_LOGIC_OUTS_L_B1_4",
        "CMT_TOP_LOGIC_OUTS_L_B1_5",
        "CMT_TOP_LOGIC_OUTS_L_B1_6",
        "CMT_TOP_LOGIC_OUTS_L_B1_7",
        "CMT_TOP_LOGIC_OUTS_L_B1_8",
        "CMT_TOP_LOGIC_OUTS_L_B1_9",
        "CMT_TOP_LOGIC_OUTS_L_B20_0",
        "CMT_TOP_LOGIC_OUTS_L_B20_1",
        "CMT_TOP_LOGIC_OUTS_L_B20_10",
        "CMT_TOP_LOGIC_OUTS_L_B20_11",
        "CMT_TOP_LOGIC_OUTS_L_B20_2",
        "CMT_TOP_LOGIC_OUTS_L_B20_3",
        "CMT_TOP_LOGIC_OUTS_L_B20_4",
        "CMT_TOP_LOGIC_OUTS_L_B20_5",
        "CMT_TOP_LOGIC_OUTS_L_B20_6",
        "CMT_TOP_LOGIC_OUTS_L_B20_7",
        "CMT_TOP_LOGIC_OUTS_L_B20_8",
        "CMT_TOP_LOGIC_OUTS_L_B20_9",
        "CMT_TOP_LOGIC_OUTS_L_B21_0",
        "CMT_TOP_LOGIC_OUTS_L_B21_1",
        "CMT_TOP_LOGIC_OUTS_L_B21_10",
        "CMT_TOP_LOGIC_OUTS_L_B21_11",
        "CMT_TOP_LOGIC_OUTS_L_B21_2",
        "CMT_TOP_LOGIC_OUTS_L_B21_3",
        "CMT_TOP_LOGIC_OUTS_L_B21_4",
        "CMT_TOP_LOGIC_OUTS_L_B21_5",
        "CMT_TOP_LOGIC_OUTS_L_B21_6",
        "CMT_TOP_LOGIC_OUTS_L_B21_7",
        "CMT_TOP_LOGIC_OUTS_L_B21_8",
        "CMT_TOP_LOGIC_OUTS_L_B21_9",
        "CMT_TOP_LOGIC_OUTS_L_B22_0",
        "CMT_TOP_LOGIC_OUTS_L_B22_1",
        "CMT_TOP_LOGIC_OUTS_L_B22_10",
        "CMT_TOP_LOGIC_OUTS_L_B22_11",
        "CMT_TOP_LOGIC_OUTS_L_B22_2",
        "CMT_TOP_LOGIC_OUTS_L_B22_3",
        "CMT_TOP_LOGIC_OUTS_L_B22_4",
        "CMT_TOP_LOGIC_OUTS_L_B22_5",
        "CMT_TOP_LOGIC_OUTS_L_B22_6",
        "CMT_TOP_LOGIC_OUTS_L_B22_7",
        "CMT_TOP_LOGIC_OUTS_L_B22_8",
        "CMT_TOP_LOGIC_OUTS_L_B22_9",
        "CMT_TOP_LOGIC_OUTS_L_B23_0",
        "CMT_TOP_LOGIC_OUTS_L_B23_1",
        "CMT_TOP_LOGIC_OUTS_L_B23_10",
        "CMT_TOP_LOGIC_OUTS_L_B23_11",
        "CMT_TOP_LOGIC_OUTS_L_B23_2",
        "CMT_TOP_LOGIC_OUTS_L_B23_3",
        "CMT_TOP_LOGIC_OUTS_L_B23_4",
        "CMT_TOP_LOGIC_OUTS_L_B23_5",
        "CMT_TOP_LOGIC_OUTS_L_B23_6",
        "CMT_TOP_LOGIC_OUTS_L_B23_7",
        "CMT_TOP_LOGIC_OUTS_L_B23_8",
        "CMT_TOP_LOGIC_OUTS_L_B23_9",
        "CMT_TOP_LOGIC_OUTS_L_B2_0",
        "CMT_TOP_LOGIC_OUTS_L_B2_1",
        "CMT_TOP_LOGIC_OUTS_L_B2_10",
        "CMT_TOP_LOGIC_OUTS_L_B2_11",
        "CMT_TOP_LOGIC_OUTS_L_B2_2",
        "CMT_TOP_LOGIC_OUTS_L_B2_3",
        "CMT_TOP_LOGIC_OUTS_L_B2_4",
        "CMT_TOP_LOGIC_OUTS_L_B2_5",
        "CMT_TOP_LOGIC_OUTS_L_B2_6",
        "CMT_TOP_LOGIC_OUTS_L_B2_7",
        "CMT_TOP_LOGIC_OUTS_L_B2_8",
        "CMT_TOP_LOGIC_OUTS_L_B2_9",
        "CMT_TOP_LOGIC_OUTS_L_B3_0",
        "CMT_TOP_LOGIC_OUTS_L_B3_1",
        "CMT_TOP_LOGIC_OUTS_L_B3_10",
        "CMT_TOP_LOGIC_OUTS_L_B3_11",
        "CMT_TOP_LOGIC_OUTS_L_B3_2",
        "CMT_TOP_LOGIC_OUTS_L_B3_3",
        "CMT_TOP_LOGIC_OUTS_L_B3_4",
        "CMT_TOP_LOGIC_OUTS_L_B3_5",
        "CMT_TOP_LOGIC_OUTS_L_B3_6",
        "CMT_TOP_LOGIC_OUTS_L_B3_7",
        "CMT_TOP_LOGIC_OUTS_L_B3_8",
        "CMT_TOP_LOGIC_OUTS_L_B3_9",
        "CMT_TOP_LOGIC_OUTS_L_B4_0",
        "CMT_TOP_LOGIC_OUTS_L_B4_1",
        "CMT_TOP_LOGIC_OUTS_L_B4_10",
        "CMT_TOP_LOGIC_OUTS_L_B4_11",
        "CMT_TOP_LOGIC_OUTS_L_B4_2",
        "CMT_TOP_LOGIC_OUTS_L_B4_3",
        "CMT_TOP_LOGIC_OUTS_L_B4_4",
        "CMT_TOP_LOGIC_OUTS_L_B4_5",
        "CMT_TOP_LOGIC_OUTS_L_B4_6",
        "CMT_TOP_LOGIC_OUTS_L_B4_7",
        "CMT_TOP_LOGIC_OUTS_L_B4_8",
        "CMT_TOP_LOGIC_OUTS_L_B4_9",
        "CMT_TOP_LOGIC_OUTS_L_B5_0",
        "CMT_TOP_LOGIC_OUTS_L_B5_1",
        "CMT_TOP_LOGIC_OUTS_L_B5_10",
        "CMT_TOP_LOGIC_OUTS_L_B5_11",
        "CMT_TOP_LOGIC_OUTS_L_B5_2",
        "CMT_TOP_LOGIC_OUTS_L_B5_3",
        "CMT_TOP_LOGIC_OUTS_L_B5_4",
        "CMT_TOP_LOGIC_OUTS_L_B5_5",
        "CMT_TOP_LOGIC_OUTS_L_B5_6",
        "CMT_TOP_LOGIC_OUTS_L_B5_7",
        "CMT_TOP_LOGIC_OUTS_L_B5_8",
        "CMT_TOP_LOGIC_OUTS_L_B5_9",
        "CMT_TOP_LOGIC_OUTS_L_B6_0",
        "CMT_TOP_LOGIC_OUTS_L_B6_1",
        "CMT_TOP_LOGIC_OUTS_L_B6_10",
        "CMT_TOP_LOGIC_OUTS_L_B6_11",
        "CMT_TOP_LOGIC_OUTS_L_B6_2",
        "CMT_TOP_LOGIC_OUTS_L_B6_3",
        "CMT_TOP_LOGIC_OUTS_L_B6_4",
        "CMT_TOP_LOGIC_OUTS_L_B6_5",
        "CMT_TOP_LOGIC_OUTS_L_B6_6",
        "CMT_TOP_LOGIC_OUTS_L_B6_7",
        "CMT_TOP_LOGIC_OUTS_L_B6_8",
        "CMT_TOP_LOGIC_OUTS_L_B6_9",
        "CMT_TOP_LOGIC_OUTS_L_B7_0",
        "CMT_TOP_LOGIC_OUTS_L_B7_1",
        "CMT_TOP_LOGIC_OUTS_L_B7_10",
        "CMT_TOP_LOGIC_OUTS_L_B7_11",
        "CMT_TOP_LOGIC_OUTS_L_B7_2",
        "CMT_TOP_LOGIC_OUTS_L_B7_3",
        "CMT_TOP_LOGIC_OUTS_L_B7_4",
        "CMT_TOP_LOGIC_OUTS_L_B7_5",
        "CMT_TOP_LOGIC_OUTS_L_B7_6",
        "CMT_TOP_LOGIC_OUTS_L_B7_7",
        "CMT_TOP_LOGIC_OUTS_L_B7_8",
        "CMT_TOP_LOGIC_OUTS_L_B7_9",
        "CMT_TOP_LOGIC_OUTS_L_B8_0",
        "CMT_TOP_LOGIC_OUTS_L_B8_1",
        "CMT_TOP_LOGIC_OUTS_L_B8_10",
        "CMT_TOP_LOGIC_OUTS_L_B8_11",
        "CMT_TOP_LOGIC_OUTS_L_B8_2",
        "CMT_TOP_LOGIC_OUTS_L_B8_3",
        "CMT_TOP_LOGIC_OUTS_L_B8_4",
        "CMT_TOP_LOGIC_OUTS_L_B8_5",
        "CMT_TOP_LOGIC_OUTS_L_B8_6",
        "CMT_TOP_LOGIC_OUTS_L_B8_7",
        "CMT_TOP_LOGIC_OUTS_L_B8_8",
        "CMT_TOP_LOGIC_OUTS_L_B8_9",
        "CMT_TOP_LOGIC_OUTS_L_B9_0",
        "CMT_TOP_LOGIC_OUTS_L_B9_1",
        "CMT_TOP_LOGIC_OUTS_L_B9_10",
        "CMT_TOP_LOGIC_OUTS_L_B9_11",
        "CMT_TOP_LOGIC_OUTS_L_B9_2",
        "CMT_TOP_LOGIC_OUTS_L_B9_3",
        "CMT_TOP_LOGIC_OUTS_L_B9_4",
        "CMT_TOP_LOGIC_OUTS_L_B9_5",
        "CMT_TOP_LOGIC_OUTS_L_B9_6",
        "CMT_TOP_LOGIC_OUTS_L_B9_7",
        "CMT_TOP_LOGIC_OUTS_L_B9_8",
        "CMT_TOP_LOGIC_OUTS_L_B9_9",
        "CMT_TOP_MONITOR_N_0",
        "CMT_TOP_MONITOR_N_1",
        "CMT_TOP_MONITOR_N_10",
        "CMT_TOP_MONITOR_N_11",
        "CMT_TOP_MONITOR_N_2",
        "CMT_TOP_MONITOR_N_3",
        "CMT_TOP_MONITOR_N_4",
        "CMT_TOP_MONITOR_N_5",
        "CMT_TOP_MONITOR_N_6",
        "CMT_TOP_MONITOR_N_7",
        "CMT_TOP_MONITOR_N_8",
        "CMT_TOP_MONITOR_N_9",
        "CMT_TOP_MONITOR_P_0",
        "CMT_TOP_MONITOR_P_1",
        "CMT_TOP_MONITOR_P_10",
        "CMT_TOP_MONITOR_P_11",
        "CMT_TOP_MONITOR_P_2",
        "CMT_TOP_MONITOR_P_3",
        "CMT_TOP_MONITOR_P_4",
        "CMT_TOP_MONITOR_P_5",
        "CMT_TOP_MONITOR_P_6",
        "CMT_TOP_MONITOR_P_7",
        "CMT_TOP_MONITOR_P_8",
        "CMT_TOP_MONITOR_P_9",
        "CMT_TOP_NE2A0_0",
        "CMT_TOP_NE2A0_1",
        "CMT_TOP_NE2A0_10",
        "CMT_TOP_NE2A0_11",
        "CMT_TOP_NE2A0_2",
        "CMT_TOP_NE2A0_3",
        "CMT_TOP_NE2A0_4",
        "CMT_TOP_NE2A0_5",
        "CMT_TOP_NE2A0_6",
        "CMT_TOP_NE2A0_7",
        "CMT_TOP_NE2A0_8",
        "CMT_TOP_NE2A0_9",
        "CMT_TOP_NE2A1_0",
        "CMT_TOP_NE2A1_1",
        "CMT_TOP_NE2A1_10",
        "CMT_TOP_NE2A1_11",
        "CMT_TOP_NE2A1_2",
        "CMT_TOP_NE2A1_3",
        "CMT_TOP_NE2A1_4",
        "CMT_TOP_NE2A1_5",
        "CMT_TOP_NE2A1_6",
        "CMT_TOP_NE2A1_7",
        "CMT_TOP_NE2A1_8",
        "CMT_TOP_NE2A1_9",
        "CMT_TOP_NE2A2_0",
        "CMT_TOP_NE2A2_1",
        "CMT_TOP_NE2A2_10",
        "CMT_TOP_NE2A2_11",
        "CMT_TOP_NE2A2_2",
        "CMT_TOP_NE2A2_3",
        "CMT_TOP_NE2A2_4",
        "CMT_TOP_NE2A2_5",
        "CMT_TOP_NE2A2_6",
        "CMT_TOP_NE2A2_7",
        "CMT_TOP_NE2A2_8",
        "CMT_TOP_NE2A2_9",
        "CMT_TOP_NE2A3_0",
        "CMT_TOP_NE2A3_1",
        "CMT_TOP_NE2A3_10",
        "CMT_TOP_NE2A3_11",
        "CMT_TOP_NE2A3_2",
        "CMT_TOP_NE2A3_3",
        "CMT_TOP_NE2A3_4",
        "CMT_TOP_NE2A3_5",
        "CMT_TOP_NE2A3_6",
        "CMT_TOP_NE2A3_7",
        "CMT_TOP_NE2A3_8",
        "CMT_TOP_NE2A3_9",
        "CMT_TOP_NE4BEG0_0",
        "CMT_TOP_NE4BEG0_1",
        "CMT_TOP_NE4BEG0_10",
        "CMT_TOP_NE4BEG0_11",
        "CMT_TOP_NE4BEG0_2",
        "CMT_TOP_NE4BEG0_3",
        "CMT_TOP_NE4BEG0_4",
        "CMT_TOP_NE4BEG0_5",
        "CMT_TOP_NE4BEG0_6",
        "CMT_TOP_NE4BEG0_7",
        "CMT_TOP_NE4BEG0_8",
        "CMT_TOP_NE4BEG0_9",
        "CMT_TOP_NE4BEG1_0",
        "CMT_TOP_NE4BEG1_1",
        "CMT_TOP_NE4BEG1_10",
        "CMT_TOP_NE4BEG1_11",
        "CMT_TOP_NE4BEG1_2",
        "CMT_TOP_NE4BEG1_3",
        "CMT_TOP_NE4BEG1_4",
        "CMT_TOP_NE4BEG1_5",
        "CMT_TOP_NE4BEG1_6",
        "CMT_TOP_NE4BEG1_7",
        "CMT_TOP_NE4BEG1_8",
        "CMT_TOP_NE4BEG1_9",
        "CMT_TOP_NE4BEG2_0",
        "CMT_TOP_NE4BEG2_1",
        "CMT_TOP_NE4BEG2_10",
        "CMT_TOP_NE4BEG2_11",
        "CMT_TOP_NE4BEG2_2",
        "CMT_TOP_NE4BEG2_3",
        "CMT_TOP_NE4BEG2_4",
        "CMT_TOP_NE4BEG2_5",
        "CMT_TOP_NE4BEG2_6",
        "CMT_TOP_NE4BEG2_7",
        "CMT_TOP_NE4BEG2_8",
        "CMT_TOP_NE4BEG2_9",
        "CMT_TOP_NE4BEG3_0",
        "CMT_TOP_NE4BEG3_1",
        "CMT_TOP_NE4BEG3_10",
        "CMT_TOP_NE4BEG3_11",
        "CMT_TOP_NE4BEG3_2",
        "CMT_TOP_NE4BEG3_3",
        "CMT_TOP_NE4BEG3_4",
        "CMT_TOP_NE4BEG3_5",
        "CMT_TOP_NE4BEG3_6",
        "CMT_TOP_NE4BEG3_7",
        "CMT_TOP_NE4BEG3_8",
        "CMT_TOP_NE4BEG3_9",
        "CMT_TOP_NE4C0_0",
        "CMT_TOP_NE4C0_1",
        "CMT_TOP_NE4C0_10",
        "CMT_TOP_NE4C0_11",
        "CMT_TOP_NE4C0_2",
        "CMT_TOP_NE4C0_3",
        "CMT_TOP_NE4C0_4",
        "CMT_TOP_NE4C0_5",
        "CMT_TOP_NE4C0_6",
        "CMT_TOP_NE4C0_7",
        "CMT_TOP_NE4C0_8",
        "CMT_TOP_NE4C0_9",
        "CMT_TOP_NE4C1_0",
        "CMT_TOP_NE4C1_1",
        "CMT_TOP_NE4C1_10",
        "CMT_TOP_NE4C1_11",
        "CMT_TOP_NE4C1_2",
        "CMT_TOP_NE4C1_3",
        "CMT_TOP_NE4C1_4",
        "CMT_TOP_NE4C1_5",
        "CMT_TOP_NE4C1_6",
        "CMT_TOP_NE4C1_7",
        "CMT_TOP_NE4C1_8",
        "CMT_TOP_NE4C1_9",
        "CMT_TOP_NE4C2_0",
        "CMT_TOP_NE4C2_1",
        "CMT_TOP_NE4C2_10",
        "CMT_TOP_NE4C2_11",
        "CMT_TOP_NE4C2_2",
        "CMT_TOP_NE4C2_3",
        "CMT_TOP_NE4C2_4",
        "CMT_TOP_NE4C2_5",
        "CMT_TOP_NE4C2_6",
        "CMT_TOP_NE4C2_7",
        "CMT_TOP_NE4C2_8",
        "CMT_TOP_NE4C2_9",
        "CMT_TOP_NE4C3_0",
        "CMT_TOP_NE4C3_1",
        "CMT_TOP_NE4C3_10",
        "CMT_TOP_NE4C3_11",
        "CMT_TOP_NE4C3_2",
        "CMT_TOP_NE4C3_3",
        "CMT_TOP_NE4C3_4",
        "CMT_TOP_NE4C3_5",
        "CMT_TOP_NE4C3_6",
        "CMT_TOP_NE4C3_7",
        "CMT_TOP_NE4C3_8",
        "CMT_TOP_NE4C3_9",
        "CMT_TOP_NW2A0_0",
        "CMT_TOP_NW2A0_1",
        "CMT_TOP_NW2A0_10",
        "CMT_TOP_NW2A0_11",
        "CMT_TOP_NW2A0_2",
        "CMT_TOP_NW2A0_3",
        "CMT_TOP_NW2A0_4",
        "CMT_TOP_NW2A0_5",
        "CMT_TOP_NW2A0_6",
        "CMT_TOP_NW2A0_7",
        "CMT_TOP_NW2A0_8",
        "CMT_TOP_NW2A0_9",
        "CMT_TOP_NW2A1_0",
        "CMT_TOP_NW2A1_1",
        "CMT_TOP_NW2A1_10",
        "CMT_TOP_NW2A1_11",
        "CMT_TOP_NW2A1_2",
        "CMT_TOP_NW2A1_3",
        "CMT_TOP_NW2A1_4",
        "CMT_TOP_NW2A1_5",
        "CMT_TOP_NW2A1_6",
        "CMT_TOP_NW2A1_7",
        "CMT_TOP_NW2A1_8",
        "CMT_TOP_NW2A1_9",
        "CMT_TOP_NW2A2_0",
        "CMT_TOP_NW2A2_1",
        "CMT_TOP_NW2A2_10",
        "CMT_TOP_NW2A2_11",
        "CMT_TOP_NW2A2_2",
        "CMT_TOP_NW2A2_3",
        "CMT_TOP_NW2A2_4",
        "CMT_TOP_NW2A2_5",
        "CMT_TOP_NW2A2_6",
        "CMT_TOP_NW2A2_7",
        "CMT_TOP_NW2A2_8",
        "CMT_TOP_NW2A2_9",
        "CMT_TOP_NW2A3_0",
        "CMT_TOP_NW2A3_1",
        "CMT_TOP_NW2A3_10",
        "CMT_TOP_NW2A3_11",
        "CMT_TOP_NW2A3_2",
        "CMT_TOP_NW2A3_3",
        "CMT_TOP_NW2A3_4",
        "CMT_TOP_NW2A3_5",
        "CMT_TOP_NW2A3_6",
        "CMT_TOP_NW2A3_7",
        "CMT_TOP_NW2A3_8",
        "CMT_TOP_NW2A3_9",
        "CMT_TOP_NW4A0_0",
        "CMT_TOP_NW4A0_1",
        "CMT_TOP_NW4A0_10",
        "CMT_TOP_NW4A0_11",
        "CMT_TOP_NW4A0_2",
        "CMT_TOP_NW4A0_3",
        "CMT_TOP_NW4A0_4",
        "CMT_TOP_NW4A0_5",
        "CMT_TOP_NW4A0_6",
        "CMT_TOP_NW4A0_7",
        "CMT_TOP_NW4A0_8",
        "CMT_TOP_NW4A0_9",
        "CMT_TOP_NW4A1_0",
        "CMT_TOP_NW4A1_1",
        "CMT_TOP_NW4A1_10",
        "CMT_TOP_NW4A1_11",
        "CMT_TOP_NW4A1_2",
        "CMT_TOP_NW4A1_3",
        "CMT_TOP_NW4A1_4",
        "CMT_TOP_NW4A1_5",
        "CMT_TOP_NW4A1_6",
        "CMT_TOP_NW4A1_7",
        "CMT_TOP_NW4A1_8",
        "CMT_TOP_NW4A1_9",
        "CMT_TOP_NW4A2_0",
        "CMT_TOP_NW4A2_1",
        "CMT_TOP_NW4A2_10",
        "CMT_TOP_NW4A2_11",
        "CMT_TOP_NW4A2_2",
        "CMT_TOP_NW4A2_3",
        "CMT_TOP_NW4A2_4",
        "CMT_TOP_NW4A2_5",
        "CMT_TOP_NW4A2_6",
        "CMT_TOP_NW4A2_7",
        "CMT_TOP_NW4A2_8",
        "CMT_TOP_NW4A2_9",
        "CMT_TOP_NW4A3_0",
        "CMT_TOP_NW4A3_1",
        "CMT_TOP_NW4A3_10",
        "CMT_TOP_NW4A3_11",
        "CMT_TOP_NW4A3_2",
        "CMT_TOP_NW4A3_3",
        "CMT_TOP_NW4A3_4",
        "CMT_TOP_NW4A3_5",
        "CMT_TOP_NW4A3_6",
        "CMT_TOP_NW4A3_7",
        "CMT_TOP_NW4A3_8",
        "CMT_TOP_NW4A3_9",
        "CMT_TOP_NW4END0_0",
        "CMT_TOP_NW4END0_1",
        "CMT_TOP_NW4END0_10",
        "CMT_TOP_NW4END0_11",
        "CMT_TOP_NW4END0_2",
        "CMT_TOP_NW4END0_3",
        "CMT_TOP_NW4END0_4",
        "CMT_TOP_NW4END0_5",
        "CMT_TOP_NW4END0_6",
        "CMT_TOP_NW4END0_7",
        "CMT_TOP_NW4END0_8",
        "CMT_TOP_NW4END0_9",
        "CMT_TOP_NW4END1_0",
        "CMT_TOP_NW4END1_1",
        "CMT_TOP_NW4END1_10",
        "CMT_TOP_NW4END1_11",
        "CMT_TOP_NW4END1_2",
        "CMT_TOP_NW4END1_3",
        "CMT_TOP_NW4END1_4",
        "CMT_TOP_NW4END1_5",
        "CMT_TOP_NW4END1_6",
        "CMT_TOP_NW4END1_7",
        "CMT_TOP_NW4END1_8",
        "CMT_TOP_NW4END1_9",
        "CMT_TOP_NW4END2_0",
        "CMT_TOP_NW4END2_1",
        "CMT_TOP_NW4END2_10",
        "CMT_TOP_NW4END2_11",
        "CMT_TOP_NW4END2_2",
        "CMT_TOP_NW4END2_3",
        "CMT_TOP_NW4END2_4",
        "CMT_TOP_NW4END2_5",
        "CMT_TOP_NW4END2_6",
        "CMT_TOP_NW4END2_7",
        "CMT_TOP_NW4END2_8",
        "CMT_TOP_NW4END2_9",
        "CMT_TOP_NW4END3_0",
        "CMT_TOP_NW4END3_1",
        "CMT_TOP_NW4END3_10",
        "CMT_TOP_NW4END3_11",
        "CMT_TOP_NW4END3_2",
        "CMT_TOP_NW4END3_3",
        "CMT_TOP_NW4END3_4",
        "CMT_TOP_NW4END3_5",
        "CMT_TOP_NW4END3_6",
        "CMT_TOP_NW4END3_7",
        "CMT_TOP_NW4END3_8",
        "CMT_TOP_NW4END3_9",
        "CMT_TOP_OCLK1X_90_0",
        "CMT_TOP_OCLK1X_90_1",
        "CMT_TOP_OCLK1X_90_10",
        "CMT_TOP_OCLK1X_90_11",
        "CMT_TOP_OCLK1X_90_2",
        "CMT_TOP_OCLK1X_90_3",
        "CMT_TOP_OCLK1X_90_4",
        "CMT_TOP_OCLK1X_90_5",
        "CMT_TOP_OCLK1X_90_6",
        "CMT_TOP_OCLK1X_90_7",
        "CMT_TOP_OCLK1X_90_8",
        "CMT_TOP_OCLK1X_90_9",
        "CMT_TOP_OCLKDIV_0",
        "CMT_TOP_OCLKDIV_1",
        "CMT_TOP_OCLKDIV_10",
        "CMT_TOP_OCLKDIV_11",
        "CMT_TOP_OCLKDIV_2",
        "CMT_TOP_OCLKDIV_3",
        "CMT_TOP_OCLKDIV_4",
        "CMT_TOP_OCLKDIV_5",
        "CMT_TOP_OCLKDIV_6",
        "CMT_TOP_OCLKDIV_7",
        "CMT_TOP_OCLKDIV_8",
        "CMT_TOP_OCLKDIV_9",
        "CMT_TOP_OCLK_0",
        "CMT_TOP_OCLK_1",
        "CMT_TOP_OCLK_10",
        "CMT_TOP_OCLK_11",
        "CMT_TOP_OCLK_2",
        "CMT_TOP_OCLK_3",
        "CMT_TOP_OCLK_4",
        "CMT_TOP_OCLK_5",
        "CMT_TOP_OCLK_6",
        "CMT_TOP_OCLK_7",
        "CMT_TOP_OCLK_8",
        "CMT_TOP_OCLK_9",
        "CMT_TOP_SE2A0_0",
        "CMT_TOP_SE2A0_1",
        "CMT_TOP_SE2A0_10",
        "CMT_TOP_SE2A0_11",
        "CMT_TOP_SE2A0_2",
        "CMT_TOP_SE2A0_3",
        "CMT_TOP_SE2A0_4",
        "CMT_TOP_SE2A0_5",
        "CMT_TOP_SE2A0_6",
        "CMT_TOP_SE2A0_7",
        "CMT_TOP_SE2A0_8",
        "CMT_TOP_SE2A0_9",
        "CMT_TOP_SE2A1_0",
        "CMT_TOP_SE2A1_1",
        "CMT_TOP_SE2A1_10",
        "CMT_TOP_SE2A1_11",
        "CMT_TOP_SE2A1_2",
        "CMT_TOP_SE2A1_3",
        "CMT_TOP_SE2A1_4",
        "CMT_TOP_SE2A1_5",
        "CMT_TOP_SE2A1_6",
        "CMT_TOP_SE2A1_7",
        "CMT_TOP_SE2A1_8",
        "CMT_TOP_SE2A1_9",
        "CMT_TOP_SE2A2_0",
        "CMT_TOP_SE2A2_1",
        "CMT_TOP_SE2A2_10",
        "CMT_TOP_SE2A2_11",
        "CMT_TOP_SE2A2_2",
        "CMT_TOP_SE2A2_3",
        "CMT_TOP_SE2A2_4",
        "CMT_TOP_SE2A2_5",
        "CMT_TOP_SE2A2_6",
        "CMT_TOP_SE2A2_7",
        "CMT_TOP_SE2A2_8",
        "CMT_TOP_SE2A2_9",
        "CMT_TOP_SE2A3_0",
        "CMT_TOP_SE2A3_1",
        "CMT_TOP_SE2A3_10",
        "CMT_TOP_SE2A3_11",
        "CMT_TOP_SE2A3_2",
        "CMT_TOP_SE2A3_3",
        "CMT_TOP_SE2A3_4",
        "CMT_TOP_SE2A3_5",
        "CMT_TOP_SE2A3_6",
        "CMT_TOP_SE2A3_7",
        "CMT_TOP_SE2A3_8",
        "CMT_TOP_SE2A3_9",
        "CMT_TOP_SE4BEG0_0",
        "CMT_TOP_SE4BEG0_1",
        "CMT_TOP_SE4BEG0_10",
        "CMT_TOP_SE4BEG0_11",
        "CMT_TOP_SE4BEG0_2",
        "CMT_TOP_SE4BEG0_3",
        "CMT_TOP_SE4BEG0_4",
        "CMT_TOP_SE4BEG0_5",
        "CMT_TOP_SE4BEG0_6",
        "CMT_TOP_SE4BEG0_7",
        "CMT_TOP_SE4BEG0_8",
        "CMT_TOP_SE4BEG0_9",
        "CMT_TOP_SE4BEG1_0",
        "CMT_TOP_SE4BEG1_1",
        "CMT_TOP_SE4BEG1_10",
        "CMT_TOP_SE4BEG1_11",
        "CMT_TOP_SE4BEG1_2",
        "CMT_TOP_SE4BEG1_3",
        "CMT_TOP_SE4BEG1_4",
        "CMT_TOP_SE4BEG1_5",
        "CMT_TOP_SE4BEG1_6",
        "CMT_TOP_SE4BEG1_7",
        "CMT_TOP_SE4BEG1_8",
        "CMT_TOP_SE4BEG1_9",
        "CMT_TOP_SE4BEG2_0",
        "CMT_TOP_SE4BEG2_1",
        "CMT_TOP_SE4BEG2_10",
        "CMT_TOP_SE4BEG2_11",
        "CMT_TOP_SE4BEG2_2",
        "CMT_TOP_SE4BEG2_3",
        "CMT_TOP_SE4BEG2_4",
        "CMT_TOP_SE4BEG2_5",
        "CMT_TOP_SE4BEG2_6",
        "CMT_TOP_SE4BEG2_7",
        "CMT_TOP_SE4BEG2_8",
        "CMT_TOP_SE4BEG2_9",
        "CMT_TOP_SE4BEG3_0",
        "CMT_TOP_SE4BEG3_1",
        "CMT_TOP_SE4BEG3_10",
        "CMT_TOP_SE4BEG3_11",
        "CMT_TOP_SE4BEG3_2",
        "CMT_TOP_SE4BEG3_3",
        "CMT_TOP_SE4BEG3_4",
        "CMT_TOP_SE4BEG3_5",
        "CMT_TOP_SE4BEG3_6",
        "CMT_TOP_SE4BEG3_7",
        "CMT_TOP_SE4BEG3_8",
        "CMT_TOP_SE4BEG3_9",
        "CMT_TOP_SE4C0_0",
        "CMT_TOP_SE4C0_1",
        "CMT_TOP_SE4C0_10",
        "CMT_TOP_SE4C0_11",
        "CMT_TOP_SE4C0_2",
        "CMT_TOP_SE4C0_3",
        "CMT_TOP_SE4C0_4",
        "CMT_TOP_SE4C0_5",
        "CMT_TOP_SE4C0_6",
        "CMT_TOP_SE4C0_7",
        "CMT_TOP_SE4C0_8",
        "CMT_TOP_SE4C0_9",
        "CMT_TOP_SE4C1_0",
        "CMT_TOP_SE4C1_1",
        "CMT_TOP_SE4C1_10",
        "CMT_TOP_SE4C1_11",
        "CMT_TOP_SE4C1_2",
        "CMT_TOP_SE4C1_3",
        "CMT_TOP_SE4C1_4",
        "CMT_TOP_SE4C1_5",
        "CMT_TOP_SE4C1_6",
        "CMT_TOP_SE4C1_7",
        "CMT_TOP_SE4C1_8",
        "CMT_TOP_SE4C1_9",
        "CMT_TOP_SE4C2_0",
        "CMT_TOP_SE4C2_1",
        "CMT_TOP_SE4C2_10",
        "CMT_TOP_SE4C2_11",
        "CMT_TOP_SE4C2_2",
        "CMT_TOP_SE4C2_3",
        "CMT_TOP_SE4C2_4",
        "CMT_TOP_SE4C2_5",
        "CMT_TOP_SE4C2_6",
        "CMT_TOP_SE4C2_7",
        "CMT_TOP_SE4C2_8",
        "CMT_TOP_SE4C2_9",
        "CMT_TOP_SE4C3_0",
        "CMT_TOP_SE4C3_1",
        "CMT_TOP_SE4C3_10",
        "CMT_TOP_SE4C3_11",
        "CMT_TOP_SE4C3_2",
        "CMT_TOP_SE4C3_3",
        "CMT_TOP_SE4C3_4",
        "CMT_TOP_SE4C3_5",
        "CMT_TOP_SE4C3_6",
        "CMT_TOP_SE4C3_7",
        "CMT_TOP_SE4C3_8",
        "CMT_TOP_SE4C3_9",
        "CMT_TOP_SW2A0_0",
        "CMT_TOP_SW2A0_1",
        "CMT_TOP_SW2A0_10",
        "CMT_TOP_SW2A0_11",
        "CMT_TOP_SW2A0_2",
        "CMT_TOP_SW2A0_3",
        "CMT_TOP_SW2A0_4",
        "CMT_TOP_SW2A0_5",
        "CMT_TOP_SW2A0_6",
        "CMT_TOP_SW2A0_7",
        "CMT_TOP_SW2A0_8",
        "CMT_TOP_SW2A0_9",
        "CMT_TOP_SW2A1_0",
        "CMT_TOP_SW2A1_1",
        "CMT_TOP_SW2A1_10",
        "CMT_TOP_SW2A1_11",
        "CMT_TOP_SW2A1_2",
        "CMT_TOP_SW2A1_3",
        "CMT_TOP_SW2A1_4",
        "CMT_TOP_SW2A1_5",
        "CMT_TOP_SW2A1_6",
        "CMT_TOP_SW2A1_7",
        "CMT_TOP_SW2A1_8",
        "CMT_TOP_SW2A1_9",
        "CMT_TOP_SW2A2_0",
        "CMT_TOP_SW2A2_1",
        "CMT_TOP_SW2A2_10",
        "CMT_TOP_SW2A2_11",
        "CMT_TOP_SW2A2_2",
        "CMT_TOP_SW2A2_3",
        "CMT_TOP_SW2A2_4",
        "CMT_TOP_SW2A2_5",
        "CMT_TOP_SW2A2_6",
        "CMT_TOP_SW2A2_7",
        "CMT_TOP_SW2A2_8",
        "CMT_TOP_SW2A2_9",
        "CMT_TOP_SW2A3_0",
        "CMT_TOP_SW2A3_1",
        "CMT_TOP_SW2A3_10",
        "CMT_TOP_SW2A3_11",
        "CMT_TOP_SW2A3_2",
        "CMT_TOP_SW2A3_3",
        "CMT_TOP_SW2A3_4",
        "CMT_TOP_SW2A3_5",
        "CMT_TOP_SW2A3_6",
        "CMT_TOP_SW2A3_7",
        "CMT_TOP_SW2A3_8",
        "CMT_TOP_SW2A3_9",
        "CMT_TOP_SW4A0_0",
        "CMT_TOP_SW4A0_1",
        "CMT_TOP_SW4A0_10",
        "CMT_TOP_SW4A0_11",
        "CMT_TOP_SW4A0_2",
        "CMT_TOP_SW4A0_3",
        "CMT_TOP_SW4A0_4",
        "CMT_TOP_SW4A0_5",
        "CMT_TOP_SW4A0_6",
        "CMT_TOP_SW4A0_7",
        "CMT_TOP_SW4A0_8",
        "CMT_TOP_SW4A0_9",
        "CMT_TOP_SW4A1_0",
        "CMT_TOP_SW4A1_1",
        "CMT_TOP_SW4A1_10",
        "CMT_TOP_SW4A1_11",
        "CMT_TOP_SW4A1_2",
        "CMT_TOP_SW4A1_3",
        "CMT_TOP_SW4A1_4",
        "CMT_TOP_SW4A1_5",
        "CMT_TOP_SW4A1_6",
        "CMT_TOP_SW4A1_7",
        "CMT_TOP_SW4A1_8",
        "CMT_TOP_SW4A1_9",
        "CMT_TOP_SW4A2_0",
        "CMT_TOP_SW4A2_1",
        "CMT_TOP_SW4A2_10",
        "CMT_TOP_SW4A2_11",
        "CMT_TOP_SW4A2_2",
        "CMT_TOP_SW4A2_3",
        "CMT_TOP_SW4A2_4",
        "CMT_TOP_SW4A2_5",
        "CMT_TOP_SW4A2_6",
        "CMT_TOP_SW4A2_7",
        "CMT_TOP_SW4A2_8",
        "CMT_TOP_SW4A2_9",
        "CMT_TOP_SW4A3_0",
        "CMT_TOP_SW4A3_1",
        "CMT_TOP_SW4A3_10",
        "CMT_TOP_SW4A3_11",
        "CMT_TOP_SW4A3_2",
        "CMT_TOP_SW4A3_3",
        "CMT_TOP_SW4A3_4",
        "CMT_TOP_SW4A3_5",
        "CMT_TOP_SW4A3_6",
        "CMT_TOP_SW4A3_7",
        "CMT_TOP_SW4A3_8",
        "CMT_TOP_SW4A3_9",
        "CMT_TOP_SW4END0_0",
        "CMT_TOP_SW4END0_1",
        "CMT_TOP_SW4END0_10",
        "CMT_TOP_SW4END0_11",
        "CMT_TOP_SW4END0_2",
        "CMT_TOP_SW4END0_3",
        "CMT_TOP_SW4END0_4",
        "CMT_TOP_SW4END0_5",
        "CMT_TOP_SW4END0_6",
        "CMT_TOP_SW4END0_7",
        "CMT_TOP_SW4END0_8",
        "CMT_TOP_SW4END0_9",
        "CMT_TOP_SW4END1_0",
        "CMT_TOP_SW4END1_1",
        "CMT_TOP_SW4END1_10",
        "CMT_TOP_SW4END1_11",
        "CMT_TOP_SW4END1_2",
        "CMT_TOP_SW4END1_3",
        "CMT_TOP_SW4END1_4",
        "CMT_TOP_SW4END1_5",
        "CMT_TOP_SW4END1_6",
        "CMT_TOP_SW4END1_7",
        "CMT_TOP_SW4END1_8",
        "CMT_TOP_SW4END1_9",
        "CMT_TOP_SW4END2_0",
        "CMT_TOP_SW4END2_1",
        "CMT_TOP_SW4END2_10",
        "CMT_TOP_SW4END2_11",
        "CMT_TOP_SW4END2_2",
        "CMT_TOP_SW4END2_3",
        "CMT_TOP_SW4END2_4",
        "CMT_TOP_SW4END2_5",
        "CMT_TOP_SW4END2_6",
        "CMT_TOP_SW4END2_7",
        "CMT_TOP_SW4END2_8",
        "CMT_TOP_SW4END2_9",
        "CMT_TOP_SW4END3_0",
        "CMT_TOP_SW4END3_1",
        "CMT_TOP_SW4END3_10",
        "CMT_TOP_SW4END3_11",
        "CMT_TOP_SW4END3_2",
        "CMT_TOP_SW4END3_3",
        "CMT_TOP_SW4END3_4",
        "CMT_TOP_SW4END3_5",
        "CMT_TOP_SW4END3_6",
        "CMT_TOP_SW4END3_7",
        "CMT_TOP_SW4END3_8",
        "CMT_TOP_SW4END3_9",
        "CMT_TOP_WL1END0_0",
        "CMT_TOP_WL1END0_1",
        "CMT_TOP_WL1END0_10",
        "CMT_TOP_WL1END0_11",
        "CMT_TOP_WL1END0_2",
        "CMT_TOP_WL1END0_3",
        "CMT_TOP_WL1END0_4",
        "CMT_TOP_WL1END0_5",
        "CMT_TOP_WL1END0_6",
        "CMT_TOP_WL1END0_7",
        "CMT_TOP_WL1END0_8",
        "CMT_TOP_WL1END0_9",
        "CMT_TOP_WL1END1_0",
        "CMT_TOP_WL1END1_1",
        "CMT_TOP_WL1END1_10",
        "CMT_TOP_WL1END1_11",
        "CMT_TOP_WL1END1_2",
        "CMT_TOP_WL1END1_3",
        "CMT_TOP_WL1END1_4",
        "CMT_TOP_WL1END1_5",
        "CMT_TOP_WL1END1_6",
        "CMT_TOP_WL1END1_7",
        "CMT_TOP_WL1END1_8",
        "CMT_TOP_WL1END1_9",
        "CMT_TOP_WL1END2_0",
        "CMT_TOP_WL1END2_1",
        "CMT_TOP_WL1END2_10",
        "CMT_TOP_WL1END2_11",
        "CMT_TOP_WL1END2_2",
        "CMT_TOP_WL1END2_3",
        "CMT_TOP_WL1END2_4",
        "CMT_TOP_WL1END2_5",
        "CMT_TOP_WL1END2_6",
        "CMT_TOP_WL1END2_7",
        "CMT_TOP_WL1END2_8",
        "CMT_TOP_WL1END2_9",
        "CMT_TOP_WL1END3_0",
        "CMT_TOP_WL1END3_1",
        "CMT_TOP_WL1END3_10",
        "CMT_TOP_WL1END3_11",
        "CMT_TOP_WL1END3_2",
        "CMT_TOP_WL1END3_3",
        "CMT_TOP_WL1END3_4",
        "CMT_TOP_WL1END3_5",
        "CMT_TOP_WL1END3_6",
        "CMT_TOP_WL1END3_7",
        "CMT_TOP_WL1END3_8",
        "CMT_TOP_WL1END3_9",
        "CMT_TOP_WR1END0_0",
        "CMT_TOP_WR1END0_1",
        "CMT_TOP_WR1END0_10",
        "CMT_TOP_WR1END0_11",
        "CMT_TOP_WR1END0_2",
        "CMT_TOP_WR1END0_3",
        "CMT_TOP_WR1END0_4",
        "CMT_TOP_WR1END0_5",
        "CMT_TOP_WR1END0_6",
        "CMT_TOP_WR1END0_7",
        "CMT_TOP_WR1END0_8",
        "CMT_TOP_WR1END0_9",
        "CMT_TOP_WR1END1_0",
        "CMT_TOP_WR1END1_1",
        "CMT_TOP_WR1END1_10",
        "CMT_TOP_WR1END1_11",
        "CMT_TOP_WR1END1_2",
        "CMT_TOP_WR1END1_3",
        "CMT_TOP_WR1END1_4",
        "CMT_TOP_WR1END1_5",
        "CMT_TOP_WR1END1_6",
        "CMT_TOP_WR1END1_7",
        "CMT_TOP_WR1END1_8",
        "CMT_TOP_WR1END1_9",
        "CMT_TOP_WR1END2_0",
        "CMT_TOP_WR1END2_1",
        "CMT_TOP_WR1END2_10",
        "CMT_TOP_WR1END2_11",
        "CMT_TOP_WR1END2_2",
        "CMT_TOP_WR1END2_3",
        "CMT_TOP_WR1END2_4",
        "CMT_TOP_WR1END2_5",
        "CMT_TOP_WR1END2_6",
        "CMT_TOP_WR1END2_7",
        "CMT_TOP_WR1END2_8",
        "CMT_TOP_WR1END2_9",
        "CMT_TOP_WR1END3_0",
        "CMT_TOP_WR1END3_1",
        "CMT_TOP_WR1END3_10",
        "CMT_TOP_WR1END3_11",
        "CMT_TOP_WR1END3_2",
        "CMT_TOP_WR1END3_3",
        "CMT_TOP_WR1END3_4",
        "CMT_TOP_WR1END3_5",
        "CMT_TOP_WR1END3_6",
        "CMT_TOP_WR1END3_7",
        "CMT_TOP_WR1END3_8",
        "CMT_TOP_WR1END3_9",
        "CMT_TOP_WW2A0_0",
        "CMT_TOP_WW2A0_1",
        "CMT_TOP_WW2A0_10",
        "CMT_TOP_WW2A0_11",
        "CMT_TOP_WW2A0_2",
        "CMT_TOP_WW2A0_3",
        "CMT_TOP_WW2A0_4",
        "CMT_TOP_WW2A0_5",
        "CMT_TOP_WW2A0_6",
        "CMT_TOP_WW2A0_7",
        "CMT_TOP_WW2A0_8",
        "CMT_TOP_WW2A0_9",
        "CMT_TOP_WW2A1_0",
        "CMT_TOP_WW2A1_1",
        "CMT_TOP_WW2A1_10",
        "CMT_TOP_WW2A1_11",
        "CMT_TOP_WW2A1_2",
        "CMT_TOP_WW2A1_3",
        "CMT_TOP_WW2A1_4",
        "CMT_TOP_WW2A1_5",
        "CMT_TOP_WW2A1_6",
        "CMT_TOP_WW2A1_7",
        "CMT_TOP_WW2A1_8",
        "CMT_TOP_WW2A1_9",
        "CMT_TOP_WW2A2_0",
        "CMT_TOP_WW2A2_1",
        "CMT_TOP_WW2A2_10",
        "CMT_TOP_WW2A2_11",
        "CMT_TOP_WW2A2_2",
        "CMT_TOP_WW2A2_3",
        "CMT_TOP_WW2A2_4",
        "CMT_TOP_WW2A2_5",
        "CMT_TOP_WW2A2_6",
        "CMT_TOP_WW2A2_7",
        "CMT_TOP_WW2A2_8",
        "CMT_TOP_WW2A2_9",
        "CMT_TOP_WW2A3_0",
        "CMT_TOP_WW2A3_1",
        "CMT_TOP_WW2A3_10",
        "CMT_TOP_WW2A3_11",
        "CMT_TOP_WW2A3_2",
        "CMT_TOP_WW2A3_3",
        "CMT_TOP_WW2A3_4",
        "CMT_TOP_WW2A3_5",
        "CMT_TOP_WW2A3_6",
        "CMT_TOP_WW2A3_7",
        "CMT_TOP_WW2A3_8",
        "CMT_TOP_WW2A3_9",
        "CMT_TOP_WW2END0_0",
        "CMT_TOP_WW2END0_1",
        "CMT_TOP_WW2END0_10",
        "CMT_TOP_WW2END0_11",
        "CMT_TOP_WW2END0_2",
        "CMT_TOP_WW2END0_3",
        "CMT_TOP_WW2END0_4",
        "CMT_TOP_WW2END0_5",
        "CMT_TOP_WW2END0_6",
        "CMT_TOP_WW2END0_7",
        "CMT_TOP_WW2END0_8",
        "CMT_TOP_WW2END0_9",
        "CMT_TOP_WW2END1_0",
        "CMT_TOP_WW2END1_1",
        "CMT_TOP_WW2END1_10",
        "CMT_TOP_WW2END1_11",
        "CMT_TOP_WW2END1_2",
        "CMT_TOP_WW2END1_3",
        "CMT_TOP_WW2END1_4",
        "CMT_TOP_WW2END1_5",
        "CMT_TOP_WW2END1_6",
        "CMT_TOP_WW2END1_7",
        "CMT_TOP_WW2END1_8",
        "CMT_TOP_WW2END1_9",
        "CMT_TOP_WW2END2_0",
        "CMT_TOP_WW2END2_1",
        "CMT_TOP_WW2END2_10",
        "CMT_TOP_WW2END2_11",
        "CMT_TOP_WW2END2_2",
        "CMT_TOP_WW2END2_3",
        "CMT_TOP_WW2END2_4",
        "CMT_TOP_WW2END2_5",
        "CMT_TOP_WW2END2_6",
        "CMT_TOP_WW2END2_7",
        "CMT_TOP_WW2END2_8",
        "CMT_TOP_WW2END2_9",
        "CMT_TOP_WW2END3_0",
        "CMT_TOP_WW2END3_1",
        "CMT_TOP_WW2END3_10",
        "CMT_TOP_WW2END3_11",
        "CMT_TOP_WW2END3_2",
        "CMT_TOP_WW2END3_3",
        "CMT_TOP_WW2END3_4",
        "CMT_TOP_WW2END3_5",
        "CMT_TOP_WW2END3_6",
        "CMT_TOP_WW2END3_7",
        "CMT_TOP_WW2END3_8",
        "CMT_TOP_WW2END3_9",
        "CMT_TOP_WW4A0_0",
        "CMT_TOP_WW4A0_1",
        "CMT_TOP_WW4A0_10",
        "CMT_TOP_WW4A0_11",
        "CMT_TOP_WW4A0_2",
        "CMT_TOP_WW4A0_3",
        "CMT_TOP_WW4A0_4",
        "CMT_TOP_WW4A0_5",
        "CMT_TOP_WW4A0_6",
        "CMT_TOP_WW4A0_7",
        "CMT_TOP_WW4A0_8",
        "CMT_TOP_WW4A0_9",
        "CMT_TOP_WW4A1_0",
        "CMT_TOP_WW4A1_1",
        "CMT_TOP_WW4A1_10",
        "CMT_TOP_WW4A1_11",
        "CMT_TOP_WW4A1_2",
        "CMT_TOP_WW4A1_3",
        "CMT_TOP_WW4A1_4",
        "CMT_TOP_WW4A1_5",
        "CMT_TOP_WW4A1_6",
        "CMT_TOP_WW4A1_7",
        "CMT_TOP_WW4A1_8",
        "CMT_TOP_WW4A1_9",
        "CMT_TOP_WW4A2_0",
        "CMT_TOP_WW4A2_1",
        "CMT_TOP_WW4A2_10",
        "CMT_TOP_WW4A2_11",
        "CMT_TOP_WW4A2_2",
        "CMT_TOP_WW4A2_3",
        "CMT_TOP_WW4A2_4",
        "CMT_TOP_WW4A2_5",
        "CMT_TOP_WW4A2_6",
        "CMT_TOP_WW4A2_7",
        "CMT_TOP_WW4A2_8",
        "CMT_TOP_WW4A2_9",
        "CMT_TOP_WW4A3_0",
        "CMT_TOP_WW4A3_1",
        "CMT_TOP_WW4A3_10",
        "CMT_TOP_WW4A3_11",
        "CMT_TOP_WW4A3_2",
        "CMT_TOP_WW4A3_3",
        "CMT_TOP_WW4A3_4",
        "CMT_TOP_WW4A3_5",
        "CMT_TOP_WW4A3_6",
        "CMT_TOP_WW4A3_7",
        "CMT_TOP_WW4A3_8",
        "CMT_TOP_WW4A3_9",
        "CMT_TOP_WW4B0_0",
        "CMT_TOP_WW4B0_1",
        "CMT_TOP_WW4B0_10",
        "CMT_TOP_WW4B0_11",
        "CMT_TOP_WW4B0_2",
        "CMT_TOP_WW4B0_3",
        "CMT_TOP_WW4B0_4",
        "CMT_TOP_WW4B0_5",
        "CMT_TOP_WW4B0_6",
        "CMT_TOP_WW4B0_7",
        "CMT_TOP_WW4B0_8",
        "CMT_TOP_WW4B0_9",
        "CMT_TOP_WW4B1_0",
        "CMT_TOP_WW4B1_1",
        "CMT_TOP_WW4B1_10",
        "CMT_TOP_WW4B1_11",
        "CMT_TOP_WW4B1_2",
        "CMT_TOP_WW4B1_3",
        "CMT_TOP_WW4B1_4",
        "CMT_TOP_WW4B1_5",
        "CMT_TOP_WW4B1_6",
        "CMT_TOP_WW4B1_7",
        "CMT_TOP_WW4B1_8",
        "CMT_TOP_WW4B1_9",
        "CMT_TOP_WW4B2_0",
        "CMT_TOP_WW4B2_1",
        "CMT_TOP_WW4B2_10",
        "CMT_TOP_WW4B2_11",
        "CMT_TOP_WW4B2_2",
        "CMT_TOP_WW4B2_3",
        "CMT_TOP_WW4B2_4",
        "CMT_TOP_WW4B2_5",
        "CMT_TOP_WW4B2_6",
        "CMT_TOP_WW4B2_7",
        "CMT_TOP_WW4B2_8",
        "CMT_TOP_WW4B2_9",
        "CMT_TOP_WW4B3_0",
        "CMT_TOP_WW4B3_1",
        "CMT_TOP_WW4B3_10",
        "CMT_TOP_WW4B3_11",
        "CMT_TOP_WW4B3_2",
        "CMT_TOP_WW4B3_3",
        "CMT_TOP_WW4B3_4",
        "CMT_TOP_WW4B3_5",
        "CMT_TOP_WW4B3_6",
        "CMT_TOP_WW4B3_7",
        "CMT_TOP_WW4B3_8",
        "CMT_TOP_WW4B3_9",
        "CMT_TOP_WW4C0_0",
        "CMT_TOP_WW4C0_1",
        "CMT_TOP_WW4C0_10",
        "CMT_TOP_WW4C0_11",
        "CMT_TOP_WW4C0_2",
        "CMT_TOP_WW4C0_3",
        "CMT_TOP_WW4C0_4",
        "CMT_TOP_WW4C0_5",
        "CMT_TOP_WW4C0_6",
        "CMT_TOP_WW4C0_7",
        "CMT_TOP_WW4C0_8",
        "CMT_TOP_WW4C0_9",
        "CMT_TOP_WW4C1_0",
        "CMT_TOP_WW4C1_1",
        "CMT_TOP_WW4C1_10",
        "CMT_TOP_WW4C1_11",
        "CMT_TOP_WW4C1_2",
        "CMT_TOP_WW4C1_3",
        "CMT_TOP_WW4C1_4",
        "CMT_TOP_WW4C1_5",
        "CMT_TOP_WW4C1_6",
        "CMT_TOP_WW4C1_7",
        "CMT_TOP_WW4C1_8",
        "CMT_TOP_WW4C1_9",
        "CMT_TOP_WW4C2_0",
        "CMT_TOP_WW4C2_1",
        "CMT_TOP_WW4C2_10",
        "CMT_TOP_WW4C2_11",
        "CMT_TOP_WW4C2_2",
        "CMT_TOP_WW4C2_3",
        "CMT_TOP_WW4C2_4",
        "CMT_TOP_WW4C2_5",
        "CMT_TOP_WW4C2_6",
        "CMT_TOP_WW4C2_7",
        "CMT_TOP_WW4C2_8",
        "CMT_TOP_WW4C2_9",
        "CMT_TOP_WW4C3_0",
        "CMT_TOP_WW4C3_1",
        "CMT_TOP_WW4C3_10",
        "CMT_TOP_WW4C3_11",
        "CMT_TOP_WW4C3_2",
        "CMT_TOP_WW4C3_3",
        "CMT_TOP_WW4C3_4",
        "CMT_TOP_WW4C3_5",
        "CMT_TOP_WW4C3_6",
        "CMT_TOP_WW4C3_7",
        "CMT_TOP_WW4C3_8",
        "CMT_TOP_WW4C3_9",
        "CMT_TOP_WW4END0_0",
        "CMT_TOP_WW4END0_1",
        "CMT_TOP_WW4END0_10",
        "CMT_TOP_WW4END0_11",
        "CMT_TOP_WW4END0_2",
        "CMT_TOP_WW4END0_3",
        "CMT_TOP_WW4END0_4",
        "CMT_TOP_WW4END0_5",
        "CMT_TOP_WW4END0_6",
        "CMT_TOP_WW4END0_7",
        "CMT_TOP_WW4END0_8",
        "CMT_TOP_WW4END0_9",
        "CMT_TOP_WW4END1_0",
        "CMT_TOP_WW4END1_1",
        "CMT_TOP_WW4END1_10",
        "CMT_TOP_WW4END1_11",
        "CMT_TOP_WW4END1_2",
        "CMT_TOP_WW4END1_3",
        "CMT_TOP_WW4END1_4",
        "CMT_TOP_WW4END1_5",
        "CMT_TOP_WW4END1_6",
        "CMT_TOP_WW4END1_7",
        "CMT_TOP_WW4END1_8",
        "CMT_TOP_WW4END1_9",
        "CMT_TOP_WW4END2_0",
        "CMT_TOP_WW4END2_1",
        "CMT_TOP_WW4END2_10",
        "CMT_TOP_WW4END2_11",
        "CMT_TOP_WW4END2_2",
        "CMT_TOP_WW4END2_3",
        "CMT_TOP_WW4END2_4",
        "CMT_TOP_WW4END2_5",
        "CMT_TOP_WW4END2_6",
        "CMT_TOP_WW4END2_7",
        "CMT_TOP_WW4END2_8",
        "CMT_TOP_WW4END2_9",
        "CMT_TOP_WW4END3_0",
        "CMT_TOP_WW4END3_1",
        "CMT_TOP_WW4END3_10",
        "CMT_TOP_WW4END3_11",
        "CMT_TOP_WW4END3_2",
        "CMT_TOP_WW4END3_3",
        "CMT_TOP_WW4END3_4",
        "CMT_TOP_WW4END3_5",
        "CMT_TOP_WW4END3_6",
        "CMT_TOP_WW4END3_7",
        "CMT_TOP_WW4END3_8",
        "CMT_TOP_WW4END3_9",
        "PLLOUT_CLK_FREQ_BB_REBUFIN0",
        "PLLOUT_CLK_FREQ_BB_REBUFIN1",
        "PLLOUT_CLK_FREQ_BB_REBUFIN2",
        "PLLOUT_CLK_FREQ_BB_REBUFIN3",
        "PLLOUT_CLK_FREQ_BB_REBUFOUT0",
        "PLLOUT_CLK_FREQ_BB_REBUFOUT1",
        "PLLOUT_CLK_FREQ_BB_REBUFOUT2",
        "PLLOUT_CLK_FREQ_BB_REBUFOUT3",
        "PLL_CLK_FREQBB_REBUFOUT0",
        "PLL_CLK_FREQBB_REBUFOUT1",
        "PLL_CLK_FREQBB_REBUFOUT2",
        "PLL_CLK_FREQBB_REBUFOUT3"
    ]
}