From e5df2fd30921c16c27e8dea9248bbe466876a62b Mon Sep 17 00:00:00 2001
From: Miodrag Milanovic <mmicko@gmail.com>
Date: Wed, 22 Oct 2025 09:14:51 +0200
Subject: [PATCH] add write_cmd_spll for designs without PLLs

---
 docs/source/bitstream/commands.rst | 3 +++
 libgm/src/Bitstream.cpp            | 6 +++++-
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/docs/source/bitstream/commands.rst b/docs/source/bitstream/commands.rst
index c2c66fc..64a8469 100644
--- a/docs/source/bitstream/commands.rst
+++ b/docs/source/bitstream/commands.rst
@@ -204,6 +204,9 @@ CMD_SPLL
 
 There are two configuration sets, that could be set for each PLL.
 
+.. warning::
+    Value 0x00 is special case and it is used for writing to all 4 PLLs, same as 0x0F
+
 CMD_WAIT_PLL
 -------------
 
diff --git a/libgm/src/Bitstream.cpp b/libgm/src/Bitstream.cpp
index 5c96356..6b1d7b6 100644
--- a/libgm/src/Bitstream.cpp
+++ b/libgm/src/Bitstream.cpp
@@ -286,7 +286,7 @@ class BitstreamReadWriter
     {
         write_header(CMD_JUMP, 4);
         write_byte(uint8_t(addr & 0xFF));
-        write_byte(uint8_t((addr >>  8UL) & 0xFF));
+        write_byte(uint8_t((addr >> 8UL) & 0xFF));
         write_byte(uint8_t((addr >> 16UL) & 0xFF));
         write_byte(uint8_t((addr >> 24UL) & 0xFF));
         insert_crc16();
@@ -961,6 +961,10 @@ Bitstream Bitstream::serialise_chip(const Chip &chip, const std::map<std::string
                 size = Die::PLL_CFG_SIZE + Die::CLKIN_CFG_SIZE;
             if (!die.is_glbout_cfg_empty())
                 size = Die::PLL_CFG_SIZE + Die::CLKIN_CFG_SIZE + Die::GLBOUT_CFG_SIZE;
+            // Since it is not possible to skip writing to PLL configuration
+            // we overwrite B configuration of last PLL with all zeros in this case.
+            // This is needed for reconfigurable bitstreams not to affect PLL of bootloader.
+            wr.write_cmd_spll(0x80);
             wr.write_cmd_pll(0, die_config, size);
         }