diff --git a/gatemate/chip.py b/gatemate/chip.py index fc9ec77..d964ef1 100644 --- a/gatemate/chip.py +++ b/gatemate/chip.py @@ -132,11 +132,14 @@ class Chip: sbb_y = -1 + offset_y if x % 2 == 1 else 0 + offset_y sbt_y = 129 if x % 2 == 1 else 130 - self.create_conn(conn, x, sbb_y, f"{die.get_sb_type(x,sbb_y-offset_y)}.P{plane}.Y4", x, sbt_y, f"{die.get_sb_type(x,sbt_y)}.P{plane}.D2_4_MD") + self.create_conn(conn, x, sbb_y, f"{die.get_sb_type(x,sbb_y-offset_y)}.P{plane}.Y4", x, sbt_y, f"{die.get_sb_type(x,sbt_y)}.P{plane}.D2_4_D2D", delay="del_D2D") if x > 27 and (x != 28 or p > 4): # no connection for 27, and for 28 just 4 signals from lower to upper - self.create_conn(conn, x, sbt_y, f"{die.get_sb_type(x,sbt_y)}.P{plane}.Y2", x, sbb_y, f"{die.get_sb_type(x,sbb_y-offset_y)}.P{plane}.D2_2_MD") + if x > 160: + self.create_conn(conn, x, sbt_y, f"{die.get_sb_type(x,sbt_y)}.P{plane}.Y2", x, sbb_y, f"{die.get_sb_type(x,sbb_y-offset_y)}.P{plane}.D2_2_D2D", delay="del_D2D") + else: + self.create_conn(conn, x, 131, f"TES.MDIE2.P{p}", x, sbb_y, f"{die.get_sb_type(x,sbb_y-offset_y)}.P{plane}.D2_2_D2D", delay="del_D2D") return conn.items() def get_packages(self): @@ -508,6 +511,8 @@ def get_timings(name): val["del_CP_clkin"] = convert_delay(timing_data.timing_delays.del_CP_clkin.val) val["del_CP_enin"] = convert_delay(timing_data.timing_delays.del_CP_enin.val) + val["del_D2D"] = Timing(TimingDelay(1000,1000,1000), TimingDelay(1000,1000,1000)) + #val["del_preplace"] = convert_delay(timing_data.timing_delays.del_preplace.val) for i1 in range(42): # [1..42] diff --git a/gatemate/die.py b/gatemate/die.py index 1572b57..29d4c76 100644 --- a/gatemate/die.py +++ b/gatemate/die.py @@ -3227,7 +3227,7 @@ def get_endpoints_for_type(type): create_wire(f"SB_BIG.P{plane}.D0_IO", type="SB_BIG_WIRE") for i in range(1,5): create_wire(f"SB_BIG.P{plane}.D2_{i}", type="SB_BIG_WIRE") - create_wire(f"SB_BIG.P{plane}.D2_{i}_MD", type="SB_BIG_WIRE") + create_wire(f"SB_BIG.P{plane}.D2_{i}_D2D", type="SB_BIG_WIRE") create_wire(f"SB_BIG.P{plane}.D3_{i}", type="SB_BIG_WIRE") create_wire(f"SB_BIG.P{plane}.D4_{i}", type="SB_BIG_WIRE") create_wire(f"SB_BIG.P{plane}.D5_{i}", type="SB_BIG_WIRE") @@ -3254,7 +3254,7 @@ def get_endpoints_for_type(type): create_wire(f"SB_SML.P{plane}.D0_IO", type="SB_SML_WIRE") for i in range(1,5): create_wire(f"SB_SML.P{plane}.D2_{i}", type="SB_SML_WIRE") - create_wire(f"SB_SML.P{plane}.D2_{i}_MD", type="SB_SML_WIRE") + create_wire(f"SB_SML.P{plane}.D2_{i}_D2D", type="SB_SML_WIRE") create_wire(f"SB_SML.P{plane}.D3_{i}", type="SB_SML_WIRE") create_wire(f"SB_SML.P{plane}.Y{i}", type="SB_SML_WIRE") create_wire(f"SB_SML.P{plane}.Y{i}_int", type="SB_SML_WIRE") @@ -3468,7 +3468,7 @@ def get_mux_connections_for_type(type): create_direct(f"SB_BIG.P{plane}.D0_IO", f"SB_BIG.P{plane}.D0",delay="del_dummy") for i in range(1,5): create_direct(f"SB_BIG.P{plane}.D7_{i}_CLK", f"SB_BIG.P{plane}.D7_{i}",delay="del_dummy") - create_direct(f"SB_BIG.P{plane}.D2_{i}_MD", f"SB_BIG.P{plane}.D2_{i}",delay="del_dummy") + create_direct(f"SB_BIG.P{plane}.D2_{i}_D2D", f"SB_BIG.P{plane}.D2_{i}",delay="del_dummy") if "SB_SML" in type: # SB_SML @@ -3499,7 +3499,7 @@ def get_mux_connections_for_type(type): create_mux(f"SB_SML.P{plane}.YDIAG_int", f"SB_SML.P{plane}.YDIAG", 1, 1, True, f"SB_SML.P{plane}.YDIAG_INT", False) for i in range(1,5): - create_direct(f"SB_SML.P{plane}.D2_{i}_MD", f"SB_SML.P{plane}.D2_{i}",delay="del_dummy") + create_direct(f"SB_SML.P{plane}.D2_{i}_D2D", f"SB_SML.P{plane}.D2_{i}",delay="del_dummy") create_direct(f"SB_SML.P{plane}.D0_IO", f"SB_SML.P{plane}.D0",delay="del_dummy") if "GPIO" in type: