From 5a03c49c4964f56f6e473562c30fb093a838ee48 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Thu, 11 Sep 2025 15:07:57 +0200 Subject: [PATCH] sortout multidie connections --- gatemate/chip.py | 4 ++-- gatemate/die.py | 6 ++++++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/gatemate/chip.py b/gatemate/chip.py index 7f83915..c2d9ad9 100644 --- a/gatemate/chip.py +++ b/gatemate/chip.py @@ -132,11 +132,11 @@ class Chip: sbb_y = -1 + offset_y if x % 2 == 1 else 0 + offset_y sbt_y = 129 if x % 2 == 1 else 130 - self.create_conn(conn, x, sbb_y, f"{die.get_sb_type(x,sbb_y-offset_y)}.P{plane}.Y4", x, sbt_y, f"{die.get_sb_type(x,sbt_y)}.P{plane}.D2_4") + self.create_conn(conn, x, sbb_y, f"{die.get_sb_type(x,sbb_y-offset_y)}.P{plane}.Y4", x, sbt_y, f"{die.get_sb_type(x,sbt_y)}.P{plane}.D2_4_MD") if x > 27 and (x != 28 or p > 4): # no connection for 27, and for 28 just 4 signals from lower to upper - self.create_conn(conn, x, sbt_y, f"{die.get_sb_type(x,sbt_y)}.P{plane}.Y2", x, sbb_y, f"{die.get_sb_type(x,sbb_y-offset_y)}.P{plane}.D2_2") + self.create_conn(conn, x, sbt_y, f"{die.get_sb_type(x,sbt_y)}.P{plane}.Y2", x, sbb_y, f"{die.get_sb_type(x,sbb_y-offset_y)}.P{plane}.D2_2_MD") return conn.items() def get_packages(self): diff --git a/gatemate/die.py b/gatemate/die.py index fa71081..4e4a248 100644 --- a/gatemate/die.py +++ b/gatemate/die.py @@ -3227,6 +3227,7 @@ def get_endpoints_for_type(type): create_wire(f"SB_BIG.P{plane}.D0_IO", type="SB_BIG_WIRE") for i in range(1,5): create_wire(f"SB_BIG.P{plane}.D2_{i}", type="SB_BIG_WIRE") + create_wire(f"SB_BIG.P{plane}.D2_{i}_MD", type="SB_BIG_WIRE") create_wire(f"SB_BIG.P{plane}.D3_{i}", type="SB_BIG_WIRE") create_wire(f"SB_BIG.P{plane}.D4_{i}", type="SB_BIG_WIRE") create_wire(f"SB_BIG.P{plane}.D5_{i}", type="SB_BIG_WIRE") @@ -3253,6 +3254,7 @@ def get_endpoints_for_type(type): create_wire(f"SB_SML.P{plane}.D0_IO", type="SB_SML_WIRE") for i in range(1,5): create_wire(f"SB_SML.P{plane}.D2_{i}", type="SB_SML_WIRE") + create_wire(f"SB_SML.P{plane}.D2_{i}_MD", type="SB_SML_WIRE") create_wire(f"SB_SML.P{plane}.D3_{i}", type="SB_SML_WIRE") create_wire(f"SB_SML.P{plane}.Y{i}", type="SB_SML_WIRE") create_wire(f"SB_SML.P{plane}.Y{i}_int", type="SB_SML_WIRE") @@ -3466,6 +3468,8 @@ def get_mux_connections_for_type(type): create_direct(f"SB_BIG.P{plane}.D0_IO", f"SB_BIG.P{plane}.D0",delay="del_dummy") for i in range(1,5): create_direct(f"SB_BIG.P{plane}.D7_{i}_CLK", f"SB_BIG.P{plane}.D7_{i}",delay="del_dummy") + create_direct(f"SB_BIG.P{plane}.D2_{i}_MD", f"SB_BIG.P{plane}.D2_{i}",delay="del_dummy") + if "SB_SML" in type: # SB_SML for p in range(1,13): @@ -3494,6 +3498,8 @@ def get_mux_connections_for_type(type): create_mux(f"SB_SML.P{plane}.Y4_int", f"SB_SML.P{plane}.Y4", 1, 1, True, f"SB_SML.P{plane}.Y4_INT", False, delay="del_dummy") create_mux(f"SB_SML.P{plane}.YDIAG_int", f"SB_SML.P{plane}.YDIAG", 1, 1, True, f"SB_SML.P{plane}.YDIAG_INT", False, delay="del_dummy") + for i in range(1,5): + create_direct(f"SB_SML.P{plane}.D2_{i}_MD", f"SB_SML.P{plane}.D2_{i}",delay="del_dummy") create_direct(f"SB_SML.P{plane}.D0_IO", f"SB_SML.P{plane}.D0",delay="del_dummy") if "GPIO" in type: