diff --git a/libgm/include/ChipConfig.hpp b/libgm/include/ChipConfig.hpp index 1c92ed8..8284bfc 100644 --- a/libgm/include/ChipConfig.hpp +++ b/libgm/include/ChipConfig.hpp @@ -52,7 +52,7 @@ class ChipConfig string chip_name; string chip_package; std::map tiles; - std::map rams; + std::map brams; // Block RAM initialisation std::map> bram_data; diff --git a/libgm/src/ChipConfig.cpp b/libgm/src/ChipConfig.cpp index aa438e2..d1405f7 100644 --- a/libgm/src/ChipConfig.cpp +++ b/libgm/src/ChipConfig.cpp @@ -38,10 +38,10 @@ std::string ChipConfig::to_string() const ss << endl; } } - for (const auto &ram : rams) { - if (!ram.second.empty()) { - ss << ".ram " << ram.first.die << " " << ram.first.x << " " << ram.first.y << endl; - ss << ram.second; + for (const auto &bram : brams) { + if (!bram.second.empty()) { + ss << ".bram " << bram.first.die << " " << bram.first.x << " " << bram.first.y << endl; + ss << bram.second; ss << endl; } } @@ -80,14 +80,14 @@ ChipConfig ChipConfig::from_string(const std::string &config) TileConfig tc; ss >> tc; cc.tiles.emplace(loc, tc); - } else if (verb == ".ram") { + } else if (verb == ".bram") { CfgLoc loc; ss >> loc.die; ss >> loc.x; ss >> loc.y; TileConfig tc; ss >> tc; - cc.rams.emplace(loc, tc); + cc.brams.emplace(loc, tc); } else if (verb == ".bram_init") { CfgLoc loc; ss >> loc.die; @@ -95,7 +95,7 @@ ChipConfig ChipConfig::from_string(const std::string &config) ss >> loc.y; ios_base::fmtflags f(ss.flags()); while (!skip_check_eor(ss)) { - uint8_t value; + uint16_t value; ss >> hex >> value; cc.bram_data[loc].push_back(value); } @@ -130,8 +130,8 @@ Chip ChipConfig::to_chip() const loc.y = y; for (int x = 0; x < die.get_max_ram_col(); x++) { loc.x = x; - if (rams.count(loc)) { - const TileConfig &cfg = rams.at(loc); + if (brams.count(loc)) { + const TileConfig &cfg = brams.at(loc); die.write_ram(x, y, ram_db.config_to_ram_data(cfg)); } if (bram_data.count(loc)) @@ -166,7 +166,7 @@ ChipConfig ChipConfig::from_chip(const Chip &chip) for (int x = 0; x < die.get_max_ram_col(); x++) { loc.x = x; if (!die.is_ram_empty(x, y)) { - cc.rams.emplace(loc, ram_db.ram_data_to_config(die.get_ram_config(x, y))); + cc.brams.emplace(loc, ram_db.ram_data_to_config(die.get_ram_config(x, y))); if (!die.is_ram_data_empty(x, y)) { cc.bram_data.emplace(loc, die.get_ram_data(x, y)); } diff --git a/libgm/src/TileBitDatabase.cpp b/libgm/src/TileBitDatabase.cpp index 8f0ebf5..bd76568 100644 --- a/libgm/src/TileBitDatabase.cpp +++ b/libgm/src/TileBitDatabase.cpp @@ -203,7 +203,36 @@ TileConfig TileBitDatabase::tile_data_to_config(const vector &data) return cfg; } -RamBitDatabase::RamBitDatabase() : BaseBitDatabase() {} +RamBitDatabase::RamBitDatabase() : BaseBitDatabase() +{ + add_word_settings("RAM_cfg_forward_a_addr", 0 * 8, 8); + add_word_settings("RAM_cfg_forward_b_addr", 1 * 8, 8); + add_word_settings("RAM_cfg_forward_a0_clk", 2 * 8, 8); + add_word_settings("RAM_cfg_forward_a0_en", 3 * 8, 8); + add_word_settings("RAM_cfg_forward_a0_we", 4 * 8, 8); + add_word_settings("RAM_cfg_forward_a1_clk", 5 * 8, 8); + add_word_settings("RAM_cfg_forward_a1_en", 6 * 8, 8); + add_word_settings("RAM_cfg_forward_a1_we", 7 * 8, 8); + add_word_settings("RAM_cfg_forward_b0_clk", 8 * 8, 8); + add_word_settings("RAM_cfg_forward_b0_en", 9 * 8, 8); + add_word_settings("RAM_cfg_forward_b0_we", 10 * 8, 8); + add_word_settings("RAM_cfg_forward_b1_clk", 11 * 8, 8); + add_word_settings("RAM_cfg_forward_b1_en", 12 * 8, 8); + add_word_settings("RAM_cfg_forward_b1_we", 13 * 8, 8); + add_word_settings("RAM_cfg_sram_mode_i_cfg", 14 * 8, 8); + add_word_settings("RAM_cfg_in_out_cfg", 15 * 8, 8); + add_word_settings("RAM_cfg_out_cfg", 16 * 8, 8); + add_word_settings("RAM_cfg_out_b1_cfg", 17 * 8, 8); + add_word_settings("RAM_cfg_wrmode_outreg", 18 * 8, 8); + add_word_settings("RAM_cfg_inversion", 19 * 8, 8); + add_word_settings("RAM_cfg_inv_ecc_dyn", 20 * 8, 8); + add_word_settings("RAM_cfg_fifo_sync_empty", 21 * 8, 8); + add_word_settings("RAM_cfg_fifo_empty", 22 * 8, 8); + add_word_settings("RAM_cfg_fifo_aync_full", 23 * 8, 8); + add_word_settings("RAM_cfg_fifo_full", 24 * 8, 8); + add_word_settings("RAM_cfg_sram_delay", 25 * 8, 8); + add_word_settings("RAM_cfg_datbm_cascade", 26 * 8, 8); +} std::vector RamBitDatabase::config_to_ram_data(const TileConfig &cfg) {