From fb8c1a5f97014631ccf53a4d19e7480b4d89ee51 Mon Sep 17 00:00:00 2001 From: Gwenhael Goavec-Merou Date: Sat, 10 Dec 2022 22:05:37 +0100 Subject: [PATCH] altera,intel: adding an option to bypass spiOverJtag automatic bitstream selection by providing the bitstream file path --- README.md | 2 ++ src/altera.cpp | 26 ++++++++++++++++---------- src/altera.hpp | 2 ++ src/main.cpp | 16 ++++++++++++---- src/xilinx.cpp | 25 ++++++++++++++++--------- src/xilinx.hpp | 2 ++ 6 files changed, 50 insertions(+), 23 deletions(-) diff --git a/README.md b/README.md index 2fd1f90..ab4736e 100644 --- a/README.md +++ b/README.md @@ -55,6 +55,8 @@ openFPGALoader -- a program to flash FPGA --altsetting arg DFU interface altsetting (only for DFU mode) --bitstream arg bitstream -b, --board arg board name, may be used instead of cable + -B, --bridge arg disable spiOverJtag model detection by providing + bitstream(intel/xilinx) -c, --cable arg jtag interface --invert-read-edge JTAG mode / FTDI: read on negative edge instead of positive diff --git a/src/altera.cpp b/src/altera.cpp index a773531..4537af1 100644 --- a/src/altera.cpp +++ b/src/altera.cpp @@ -26,12 +26,13 @@ Altera::Altera(Jtag *jtag, const std::string &filename, const std::string &file_type, Device::prog_type_t prg_type, - const std::string &device_package, bool verify, int8_t verbose, + const std::string &device_package, + const std::string &spiOverJtagPath, bool verify, int8_t verbose, bool skip_load_bridge, bool skip_reset): Device(jtag, filename, file_type, verify, verbose), SPIInterface(filename, verbose, 256, verify, skip_load_bridge, skip_reset), - _device_package(device_package), + _device_package(device_package), _spiOverJtagPath(spiOverJtagPath), _vir_addr(0x1000), _vir_length(14) { if (prg_type == Device::RD_FLASH) { @@ -171,18 +172,23 @@ bool Altera::prepare_flash_access() bool Altera::load_bridge() { - if (_device_package.empty()) { - printError("Can't program SPI flash: missing device-package information"); - return false; - } + std::string bitname; + if (!_spiOverJtagPath.empty()) { + bitname = _spiOverJtagPath; + } else { + if (_device_package.empty()) { + printError("Can't program SPI flash: missing device-package information"); + return false; + } - // DATA_DIR is defined at compile time. - std::string bitname = DATA_DIR "/openFPGALoader/spiOverJtag_"; + // DATA_DIR is defined at compile time. + bitname = DATA_DIR "/openFPGALoader/spiOverJtag_"; #ifdef HAS_ZLIB - bitname += _device_package + ".rbf.gz"; + bitname += _device_package + ".rbf.gz"; #else - bitname += _device_package + ".rbf"; + bitname += _device_package + ".rbf"; #endif + } #if defined (_WIN64) || defined (_WIN32) /* Convert relative path embedded at compile time to an absolute path */ diff --git a/src/altera.hpp b/src/altera.hpp index c336eef..f76afc5 100644 --- a/src/altera.hpp +++ b/src/altera.hpp @@ -20,6 +20,7 @@ class Altera: public Device, SPIInterface { const std::string &file_type, Device::prog_type_t prg_type, const std::string &device_package, + const std::string &spiOverJtagPath, bool verify, int8_t verbose, bool skip_load_bridge, bool skip_reset); ~Altera(); @@ -100,6 +101,7 @@ class Altera: public Device, SPIInterface { int end_state = Jtag::UPDATE_DR, bool debug = false); std::string _device_package; + std::string _spiOverJtagPath; /**< spiOverJtag explicit path */ uint32_t _vir_addr; /**< addr affected to virtual jtag */ uint32_t _vir_length; /**< length of virtual jtag IR */ }; diff --git a/src/main.cpp b/src/main.cpp index 5f1d252..cbfd9fa 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -64,6 +64,7 @@ struct arguments { bool dfu; string file_type; string fpga_part; + string bridge_path; string probe_firmware; int index_chain; unsigned int file_size; @@ -106,7 +107,10 @@ int main(int argc, char **argv) /* command line args. */ struct arguments args = {0, false, false, false, false, 0, "", "", "-", "", -1, 0, false, "-", false, false, false, false, Device::PRG_NONE, false, - false, false, "", "", "", -1, 0, false, -1, + /* spi dfu file_type fpga_part bridge_path probe_firmware */ + false, false, "", "", "", "", + /* index_chain file_size external_flash altsetting */ + -1, 0, false, -1, /* vid, pid, index bus_addr, device_addr */ 0, 0, -1, 0, 0, "127.0.0.1", 0, false, false, "", false, false, @@ -529,11 +533,12 @@ int main(int argc, char **argv) try { if (fab == "xilinx") { fpga = new Xilinx(jtag, args.bit_file, args.file_type, - args.prg_type, args.fpga_part, args.verify, args.verbose); + args.prg_type, args.fpga_part, args.bridge_path, args.verify, + args.verbose); } else if (fab == "altera") { fpga = new Altera(jtag, args.bit_file, args.file_type, - args.prg_type, args.fpga_part, args.verify, args.verbose, - args.skip_load_bridge, args.skip_reset); + args.prg_type, args.fpga_part, args.bridge_path, args.verify, + args.verbose, args.skip_load_bridge, args.skip_reset); } else if (fab == "anlogic") { fpga = new Anlogic(jtag, args.bit_file, args.file_type, args.prg_type, args.verify, args.verbose); @@ -684,6 +689,9 @@ int parse_opt(int argc, char **argv, struct arguments *args, cxxopts::value(args->bit_file)) ("b,board", "board name, may be used instead of cable", cxxopts::value(args->board)) + ("B,bridge", "disable spiOverJtag model detection by providing " + "bitstream(intel/xilinx)", + cxxopts::value(args->bridge_path)) ("c,cable", "jtag interface", cxxopts::value(args->cable)) ("invert-read-edge", "JTAG mode / FTDI: read on negative edge instead of positive", diff --git a/src/xilinx.cpp b/src/xilinx.cpp index 1353031..c88c09b 100644 --- a/src/xilinx.cpp +++ b/src/xilinx.cpp @@ -31,10 +31,12 @@ Xilinx::Xilinx(Jtag *jtag, const std::string &filename, const std::string &file_type, Device::prog_type_t prg_type, - const std::string &device_package, bool verify, int8_t verbose): + const std::string &device_package, const std::string &spiOverJtagPath, + bool verify, int8_t verbose): Device(jtag, filename, file_type, verify, verbose), SPIInterface(filename, verbose, 256, verify), - _device_package(device_package), _irlen(6) + _device_package(device_package), _spiOverJtagPath(spiOverJtagPath), + _irlen(6) { if (prg_type == Device::RD_FLASH) { _mode = Device::READ_MODE; @@ -321,14 +323,19 @@ void Xilinx::program(unsigned int offset, bool unprotect_flash) bool Xilinx::load_bridge() { - if (_device_package.empty()) { - printError("Can't program SPI flash: missing device-package information"); - return false; - } + std::string bitname; + if (!_spiOverJtagPath.empty()) { + bitname = _spiOverJtagPath; + } else { + if (_device_package.empty()) { + printError("Can't program SPI flash: missing device-package information"); + return false; + } - // DATA_DIR is defined at compile time. - std::string bitname = DATA_DIR "/openFPGALoader/spiOverJtag_"; - bitname += _device_package + ".bit.gz"; + // DATA_DIR is defined at compile time. + bitname = DATA_DIR "/openFPGALoader/spiOverJtag_"; + bitname += _device_package + ".bit.gz"; + } #if defined (_WIN64) || defined (_WIN32) /* Convert relative path embedded at compile time to an absolute path */ diff --git a/src/xilinx.hpp b/src/xilinx.hpp index 7588e15..93e7491 100644 --- a/src/xilinx.hpp +++ b/src/xilinx.hpp @@ -19,6 +19,7 @@ class Xilinx: public Device, SPIInterface { const std::string &file_type, Device::prog_type_t prg_type, const std::string &device_package, + const std::string &spiOverJtagPath, bool verify, int8_t verbose); ~Xilinx(); @@ -184,6 +185,7 @@ class Xilinx: public Device, SPIInterface { */ bool load_bridge(); std::string _device_package; + std::string _spiOverJtagPath; /**< spiOverJtag explicit path */ int _xc95_line_len; /**< xc95 only: number of col by flash line */ uint16_t _cpld_nb_row; /**< number of flash rows */ uint16_t _cpld_nb_col; /**< number of cols in a row */