From f87e0991e0174588760c748c3ec6f1c2efe5af44 Mon Sep 17 00:00:00 2001 From: Gwenhael Goavec-Merou Date: Sat, 22 Feb 2020 20:59:56 +0100 Subject: [PATCH] add support for ECP5 LFE5U-25F-6BG256C --- README.md | 2 +- src/part.hpp | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/README.md b/README.md index 068b36a..69a0dd5 100644 --- a/README.md +++ b/README.md @@ -15,7 +15,7 @@ __Supported (tested) FPGA:__ * Gowin [GW1N (GW1N-1, GW1N-4, GW1NR-9)](https://www.gowinsemi.com/en/product/detail/2/) (SRAM and Flash (flash mode only tested with GW1NR-9)) * Lattice [MachXO3LF](http://www.latticesemi.com/en/Products/FPGAandCPLD/MachXO3.aspx) (SRAM and Flash) -* Lattice [ECP5 5G](http://www.latticesemi.com/Products/FPGAandCPLD/ECP5) (SRAM) +* Lattice [ECP5 (25F, 5G 85F](http://www.latticesemi.com/Products/FPGAandCPLD/ECP5) (SRAM) * Xilinx Artix 7 [xc7a35ti, xc7a100t](https://www.xilinx.com/products/silicon-devices/fpga/artix-7.html) (memory (all) and spi flash (xc7a35ti) * Xilinx Spartan 7 [xc7s15](https://www.xilinx.com/products/silicon-devices/fpga/spartan-7.html) (memory) * Intel Cyclone 10 LP [10CL025](https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-10.html) diff --git a/src/part.hpp b/src/part.hpp index 6bcbf32..adfc007 100644 --- a/src/part.hpp +++ b/src/part.hpp @@ -16,6 +16,7 @@ static std::map fpga_list = { {0x03620093, {"xilinx", "spartan7", "xc7s15ftgb196-1"}}, {0x020f30dd, {"altera", "cyclone 10 LP", "10CL025"}}, {0x612bd043, {"lattice", "MachXO3LF", "LCMX03LF-6900C"}}, + {0x41111043, {"lattice", "ECP5", "LFE5U-25F-6BG256C"}}, {0x81113043, {"lattice", "ECP5-5G", "LFE5UM5G-85F-8BG381"}}, {0x1100581b, {"Gowin", "GW1N", "GW1NR-9"}}, {0x0900281B, {"Gowin", "GW1N", "GW1N-1"}},