From ed390f468ade8954999bc9a78c5c31d2cd57b908 Mon Sep 17 00:00:00 2001 From: Fabien Marteau Date: Wed, 26 Jan 2022 16:14:00 +0100 Subject: [PATCH] Adding dev kit Xilinx Zynq-7000 SoC ZC702 Evaluation Kit --- doc/boards.yml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/doc/boards.yml b/doc/boards.yml index 66575c5..5ba7067 100644 --- a/doc/boards.yml +++ b/doc/boards.yml @@ -268,6 +268,13 @@ Flash: NT Constraints: KC705 +- ID: zc702 + Description: Xilinx ZC702 + URL: https://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html + FPGA: zynq7000 xc7z020clg484 + Memory: OK + Flash: NA + - ID: licheeTang Description: Sipeed Lichee Tang URL: https://tang.sipeed.com/en/hardware-overview/lichee-tang/