From e18c13994177456466fa2abf4577db08c6386a6e Mon Sep 17 00:00:00 2001 From: Gwenhael Goavec-Merou Date: Wed, 21 May 2025 10:17:10 +0200 Subject: [PATCH] spiFlashdb.hpp: disables quad mode configuration for all N25Q. It's useless because the chip is able by default to support single and quad transaction and after this configuration the flash is unable to works in single mode. --- src/spiFlashdb.hpp | 32 ++++++++++++++++++++++++-------- 1 file changed, 24 insertions(+), 8 deletions(-) diff --git a/src/spiFlashdb.hpp b/src/spiFlashdb.hpp index 25d67b1..8185b35 100644 --- a/src/spiFlashdb.hpp +++ b/src/spiFlashdb.hpp @@ -190,8 +190,12 @@ static std::map flash_list = { .tb_register = STATR, .bp_len = 3, .bp_offset = {(1 << 2), (1 << 3), (1 << 4), 0}, - .quad_register = NVCONFR, - .quad_mask = (1 << 3), + // Disabled because the chip is unable to work in single after being confgured in quad + // this option isn't required and the chip is always able to uses quad mode instructions + .quad_register = NONER, + .quad_mask = 0, + //.quad_register = NVCONFR, + //.quad_mask = (1 << 3), }}, {0x20ba17, { .manufacturer = "micron", @@ -205,8 +209,12 @@ static std::map flash_list = { .tb_register = STATR, .bp_len = 4, .bp_offset = {(1 << 2), (1 << 3), (1 << 4), (1 << 6)}, - .quad_register = NVCONFR, - .quad_mask = (1 << 3), + // Disabled because the chip is unable to work in single after being confgured in quad + // this option isn't required and the chip is always able to uses quad mode instructions + .quad_register = NONER, + .quad_mask = 0, + //.quad_register = NVCONFR, + //.quad_mask = (1 << 3), }}, {0x20ba18, { /* https://media-www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_128mb_3v_65nm.pdf */ @@ -221,8 +229,12 @@ static std::map flash_list = { .tb_register = STATR, .bp_len = 4, .bp_offset = {(1 << 2), (1 << 3), (1 << 4), (1 << 6)}, - .quad_register = NVCONFR, - .quad_mask = (1 << 3), + // Disabled because the chip is unable to work in single after being confgured in quad + // this option isn't required and the chip is always able to uses quad mode instructions + .quad_register = NONER, + .quad_mask = 0, + //.quad_register = NVCONFR, + //.quad_mask = (1 << 3), }}, {0x20ba19, { /* https://datasheet.octopart.com/N25Q256A13E1241F-Micron-datasheet-11552757.pdf */ @@ -237,8 +249,12 @@ static std::map flash_list = { .tb_register = STATR, .bp_len = 4, .bp_offset = {(1 << 2), (1 << 3), (1 << 4), (1 << 6)}, - .quad_register = NVCONFR, - .quad_mask = (1 << 3), + // Disabled because the chip is unable to work in single after being confgured in quad + // this option isn't required and the chip is always able to uses quad mode instructions + .quad_register = NONER, + .quad_mask = 0, + //.quad_register = NVCONFR, + //.quad_mask = (1 << 3), }}, {0x20bb18, { /* https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_128mb_1_8v_65nm.pdf */