From d69efcfd0867f15d5bc53d3fc4eec92a34d504ab Mon Sep 17 00:00:00 2001 From: Gwenhael Goavec-Merou Date: Thu, 21 Nov 2019 09:27:24 +0100 Subject: [PATCH] main: add verbose parameter to xilinx and altera --- main.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/main.cpp b/main.cpp index 72e91e9..e211063 100644 --- a/main.cpp +++ b/main.cpp @@ -127,9 +127,9 @@ int main(int argc, char **argv) Device *fpga; if (fab == "xilinx") { - fpga = new Xilinx(jtag, args.bit_file); + fpga = new Xilinx(jtag, args.bit_file, args.verbose); } else if (fab == "altera") { - fpga = new Altera(jtag, args.bit_file); + fpga = new Altera(jtag, args.bit_file, args.verbose); } else { fpga = new Lattice(jtag, args.bit_file, args.verbose); }