From cc1bc89f29e9df19723ad4cd67e756a514cf395f Mon Sep 17 00:00:00 2001 From: Gwenhael Goavec-Merou Date: Wed, 4 Jan 2023 19:00:08 +0100 Subject: [PATCH] boards: Trenz TEI0010 - AnalogMax --- doc/boards.yml | 7 +++++++ src/board.hpp | 1 + 2 files changed, 8 insertions(+) diff --git a/doc/boards.yml b/doc/boards.yml index c9e2f70..522b608 100644 --- a/doc/boards.yml +++ b/doc/boards.yml @@ -41,6 +41,13 @@ Memory: OK Flash: OK +- ID: analogMax + Description: Trenz TEI0010 - AnalogMax + URL: https://wiki.trenz-electronic.de/display/PD/TEI0010+-+AnalogMax + FPGA: Max 10 10M08SAU169C8G + Memory: SVF + Flash: SVF + - ID: arty_a7_35t Description: Digilent Arty A7 URL: https://reference.digilentinc.com/reference/programmable-logic/arty-a7/start diff --git a/src/board.hpp b/src/board.hpp index a1c6555..52a178b 100644 --- a/src/board.hpp +++ b/src/board.hpp @@ -104,6 +104,7 @@ typedef struct { static std::map board_list = { JTAG_BOARD("ac701", "xc7a200t2fbg676c", "digilent", 0, 0, CABLE_DEFAULT), JTAG_BOARD("acornCle215", "xc7a200tsbg484", "", 0, 0, CABLE_DEFAULT), + JTAG_BOARD("analogMax", "", "ft2232", 0, 0, CABLE_DEFAULT), JTAG_BOARD("litex-acorn-baseboard-mini", "xc7a200tsbg484", "", 0, 0, CABLE_DEFAULT), JTAG_BOARD("alchitry_au", "xc7a35tftg256", "ft2232", 0, 0, CABLE_DEFAULT), JTAG_BOARD("alchitry_au_plus","xc7a100tftg256", "ft2232", 0, 0, CABLE_DEFAULT),