From bb69297ed0971a44f99e3adfa0268cf5a03bd5da Mon Sep 17 00:00:00 2001 From: Gwenhael Goavec-Merou Date: Mon, 30 Aug 2021 17:15:45 +0200 Subject: [PATCH] xilinx: with XCF reconfigure FPGA after write --- src/xilinx.cpp | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/xilinx.cpp b/src/xilinx.cpp index 52bb98d..a83ec08 100644 --- a/src/xilinx.cpp +++ b/src/xilinx.cpp @@ -646,6 +646,7 @@ std::string Xilinx::flow_read() #define XCF_ISC_ADDR_SHIFT 0xEB #define XCF_ISC_ERASE 0xEC #define XCF_ISC_DATA_SHIFT 0xED +#define XCF_CONFIG 0xEE #define XCF_ISC_READ 0xeF #define XCF_ISC_DISABLE 0xF0 @@ -811,6 +812,12 @@ bool Xilinx::xcf_program(ConfigBitstreamParser *bitfile) xcf_flow_disable(); + /* reconfigure FPGA */ + _jtag->shiftIR(XCF_CONFIG, 8); + _jtag->toggleClk(1); + _jtag->shiftIR(BYPASS, 8); + _jtag->toggleClk(1); + return true; }