diff --git a/doc/boards.yml b/doc/boards.yml index a372d12..fc35dd5 100644 --- a/doc/boards.yml +++ b/doc/boards.yml @@ -341,6 +341,13 @@ Flash: OK (DFU) Constraints: OrangeCrab-r0.2 +- ID: papilio_one + Description: Papilio One + URL: https://papilio.cc/index.php?n=Papilio.PapilioOne + FPGA: Spartan3E xc3s500e-vq100 + Memory: OK + Flash: OK + - ID: pipistrello Description: Saanlima Pipistrello LX45 URL: http://pipistrello.saanlima.com/index.php?title=Welcome_to_Pipistrello diff --git a/doc/cable.yml b/doc/cable.yml index a460d00..2b3a16c 100644 --- a/doc/cable.yml +++ b/doc/cable.yml @@ -197,6 +197,13 @@ orbtrace: URL: https://github.com/orbcode/orbtrace +papilio: + + - Name: papilio + Description: Papilio FPGA Platform + URL: https://papilio.cc/ + + tigard: - Name: tigard diff --git a/src/board.hpp b/src/board.hpp index 3c2c047..82abd0e 100644 --- a/src/board.hpp +++ b/src/board.hpp @@ -191,6 +191,7 @@ static std::map board_list = { JTAG_BOARD("zc706", "xc7z045ffg900", "jtag-smt2-nc", 0, 0, CABLE_DEFAULT), JTAG_BOARD("zcu102", "xczu9egffvb1156", "jtag-smt2-nc", 0, 0, CABLE_DEFAULT), JTAG_BOARD("zedboard", "xc7z020clg484", "digilent_hs2", 0, 0, CABLE_DEFAULT), + JTAG_BOARD("papilio_one", "xc3s500evq100", "papilio", 0, 0, CABLE_DEFAULT), }; #endif diff --git a/src/cable.hpp b/src/cable.hpp index e949171..2cc1dae 100644 --- a/src/cable.hpp +++ b/src/cable.hpp @@ -63,6 +63,7 @@ static std::map cable_list = { {"jlink", {MODE_JLINK, {0x1366, 0x0105, 0, 0, 0, 0, 0 }}}, {"jtag-smt2-nc", {MODE_FTDI_SERIAL, {0x0403, 0x6014, INTERFACE_A, 0xe8, 0xeb, 0x00, 0x60}}}, {"orbtrace", {MODE_CMSISDAP, {0x1209, 0x3443, 0, 0, 0, 0, 0 }}}, + {"papilio", {MODE_FTDI_SERIAL, {0x0403, 0x6010, INTERFACE_A, 0x08, 0x0B, 0x09, 0x0B}}}, {"tigard", {MODE_FTDI_SERIAL, {0x0403, 0x6010, INTERFACE_B, 0x08, 0x3B, 0x00, 0x00}}}, {"usb-blaster", {MODE_USBBLASTER, {0x09Fb, 0x6001, 0, 0, 0, 0, 0 }}}, {"usb-blasterII", {MODE_USBBLASTER, {0x09Fb, 0x6810, 0, 0, 0, 0, 0 }}}, diff --git a/src/part.hpp b/src/part.hpp index a8b34a9..f1abb5a 100644 --- a/src/part.hpp +++ b/src/part.hpp @@ -31,6 +31,7 @@ static std::map fpga_list = { {0x03651093, {"xilinx", "kintex7", "xc7k325t", 6}}, {0x01414093, {"xilinx", "spartan3", "xc3s200", 6}}, + {0x41c22093, {"xilinx", "spartan3", "xc3s500e", 6}}, {0x04001093, {"xilinx", "spartan6", "xc6slx9", 6}}, {0x04002093, {"xilinx", "spartan6", "xc6slx16", 6}},