diff --git a/doc/boards.yml b/doc/boards.yml
index a7185c4..11252bd 100644
--- a/doc/boards.yml
+++ b/doc/boards.yml
@@ -751,6 +751,13 @@
   Memory: OK
   Flash: NT
 
+- ID: sp701
+  Description: Xilinx SP701
+  URL: https://www.amd.com/en/products/adaptive-socs-and-fpgas/evaluation-boards/sp701.html
+  FPGA: Spartan 7 xc7s100-2-fgga676
+  Memory: OK
+  Flash: OK
+
 - ID: spartanEdgeAccelBoard
   Description: SeeedStudio Spartan Edge Accelerator Board
   URL: http://wiki.seeedstudio.com/Spartan-Edge-Accelerator-Board
diff --git a/src/board.hpp b/src/board.hpp
index 57efc97..437e79f 100644
--- a/src/board.hpp
+++ b/src/board.hpp
@@ -236,6 +236,7 @@ static std::map <std::string, target_board_t> board_list = {
 	JTAG_BOARD("spartanEdgeAccelBoard", "",               "",             SPI_FLASH, 0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("spec45",          "xc6slx45tfgg484",      "",             SPI_FLASH, 0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("spec150",         "xc6slx150tfgg484",     "",             SPI_FLASH, 0, 0, CABLE_DEFAULT),
+	JTAG_BOARD("sp701",           "xc7s100fgga676",       "digilent_ft4232", SPI_FLASH, 0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("stlv7325",        "xc7k325tffg676",       "ft4232",       SPI_FLASH, 0, 0, CABLE_MHZ(3)),
 	JTAG_BOARD("tangconsole",     "",                     "ft2232",       SPI_FLASH, 0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("tangnano",        "",                     "ch552_jtag",   SPI_FLASH, 0, 0, CABLE_DEFAULT),
diff --git a/src/cable.hpp b/src/cable.hpp
index 84c555a..a9b79c9 100644
--- a/src/cable.hpp
+++ b/src/cable.hpp
@@ -99,6 +99,7 @@ static std::map <std::string, cable_t> cable_list = {
 	{"dfu",                CABLE_DEF(MODE_DFU, 0, 0                                    )},
 	{"digilent",           FTDI_SER(0x0403, 0x6010, FTDI_INTF_A, 0xe8, 0xeb, 0x00, 0x60)},
 	{"digilent_b",         FTDI_SER(0x0403, 0x6010, FTDI_INTF_B, 0xe8, 0xeb, 0x00, 0x60)},
+	{"digilent_ft4232",    FTDI_SER(0x0403, 0x6011, FTDI_INTF_A, 0x08, 0x2B, 0x08, 0x0B)},
 	{"digilent_hs2",       FTDI_SER(0x0403, 0x6014, FTDI_INTF_A, 0xe8, 0xeb, 0x00, 0x60)},
 	{"digilent_hs3",       FTDI_SER(0x0403, 0x6014, FTDI_INTF_A, 0x88, 0x8B, 0x20, 0x30)},
 	{"digilent_ad",        FTDI_SER(0x0403, 0x6014, FTDI_INTF_A, 0x08, 0x0B, 0x80, 0x80)},