From 18349fb6e85e58b5dfe5ccfe0d10df4ec550dbd5 Mon Sep 17 00:00:00 2001
From: Franck Jullien <franck.jullien@gmail.com>
Date: Mon, 13 Dec 2021 22:13:29 +0100
Subject: [PATCH 1/2] efinix: add support for Titanium Ti60 f225 dev kit

---
 doc/compatibility/board.rst | 1 +
 doc/compatibility/fpga.rst  | 1 +
 src/board.hpp               | 3 +++
 src/efinix.cpp              | 2 ++
 4 files changed, 7 insertions(+)

diff --git a/doc/compatibility/board.rst b/doc/compatibility/board.rst
index 470b024..21a995a 100644
--- a/doc/compatibility/board.rst
+++ b/doc/compatibility/board.rst
@@ -63,6 +63,7 @@ Boards
                    xtrx `FairWaves XTRXPro <https://www.crowdsupply.com/fairwaves/xtrx>`__                                                                                Artix xc7a50tcpg236           OK        OK
              xyloni_spi `Efinix Xyloni <https://www.efinixinc.com/products-devkits-xyloni.html>`__                                                                        Trion T8F81                   NA        AS
   trion_t120_bga576_spi `Efinix Trion T120 BGA576 Dev Kit <https://www.efinixinc.com/products-devkits-triont120bga576.html>`__                                            Trion T120BGA576              NA        AS
+    trion_ti60_f225_spi `Efinix Titanium F225 Dev Kit <https://www.efinixinc.com/products-devkits-titaniumti60f225.html>`__                                               Titanium Ti60F225             NA        AS
                    xmf3 `PLDkit XMF3 <https://pldkit.com/xilinx/xmf3>`__                                                                                                  Xilinx xc3s200ft256, xcf01s   OK        OK
                zedboard `Avnet ZedBoard <https://www.avnet.com/wps/portal/us/products/avnet-boards/avnet-board-families/zedboard/>`__                                     zynq7000 xc7z020clg484        OK        NA
 ======================= ================================================================================================================================================= ============================= ========= ========
diff --git a/doc/compatibility/fpga.rst b/doc/compatibility/fpga.rst
index 0cc825b..03725b1 100644
--- a/doc/compatibility/fpga.rst
+++ b/doc/compatibility/fpga.rst
@@ -10,6 +10,7 @@ FPGAs
      Anlogic  `EF2M45 <http://www.anlogic.com/prod_view.aspx?TypeId=12&Id=170&FId=t3:12:3>`__                                                     OK     OK
 Cologne Chip  `GateMate Series <https://colognechip.com/programmable-logic/gatemate/>`__                                                          OK     OK
       Efinix  `Trion T8 <https://www.efinixinc.com/products-trion.html>`__                                                                        NA     OK
+      Efinix  `Titanium Ti60 <https://www.efinixinc.com/products-titanium.html>`__                                                                NA     OK
        Gowin  `GW1N (GW1N-1, GW1N-4, GW1NR-9, GW1NS-2C, GW1NSR-4C) <https://www.gowinsemi.com/en/product/detail/2/>`__                            OK     IF
        Intel  Cyclone III `EP3C16 <https://www.intel.com/content/www/us/en/programmable/products/fpga/cyclone-series/cyclone-iii/support.html>`__ OK     OK
        Intel  Cyclone IV CE `EP4CE22 <https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-iv/features.html>`__             OK     OK
diff --git a/src/board.hpp b/src/board.hpp
index 4fdd041..090d48e 100644
--- a/src/board.hpp
+++ b/src/board.hpp
@@ -159,6 +159,9 @@ static std::map <std::string, target_board_t> board_list = {
 	SPI_BOARD("trion_t120_bga576","efinix", "efinix_spi_ft2232",
 			DBUS4, DBUS5, DBUS7, DBUS3, DBUS0, DBUS1, DBUS2, DBUS6, 0, CABLE_DEFAULT),
 	JTAG_BOARD("trion_t120_bga576_jtag", "",        "ft2232_b",     0, 0, CABLE_DEFAULT),
+	SPI_BOARD("titanium_ti60_f225","efinix", "efinix_spi_ft4232",
+			DBUS4, DBUS5, DBUS7, DBUS3, DBUS0, DBUS1, DBUS2, DBUS6, 0, CABLE_DEFAULT),
+	JTAG_BOARD("titanium_ti60_f225_jtag", "","efinix_jtag_ft4232",  0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("zedboard",        "xc7z020-clg484", "digilent_hs2", 0, 0, CABLE_DEFAULT),
 };
 
diff --git a/src/efinix.cpp b/src/efinix.cpp
index 2d0daf5..fbf4bce 100644
--- a/src/efinix.cpp
+++ b/src/efinix.cpp
@@ -53,6 +53,8 @@ Efinix::Efinix(Jtag* jtag, const std::string &filename,
 		spi_board_name = "xyloni_spi";
 	} else if (board_name == "trion_t120_bga576_jtag") {
 		spi_board_name = "trion_t120_bga576";
+	} else if (board_name == "titanium_ti60_f225_jtag") {
+		spi_board_name = "titanium_ti60_f225";
 	} else {
 		throw std::runtime_error("Error: unknown board name");
 	}

From bae403c3a9228da76e4ee681fc05943d0e936073 Mon Sep 17 00:00:00 2001
From: Franck Jullien <franck.jullien@gmail.com>
Date: Tue, 14 Dec 2021 09:06:28 +0100
Subject: [PATCH 2/2] efinix/titanium: add missing JTAG idcode

---
 src/part.hpp | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/src/part.hpp b/src/part.hpp
index 14fb0be..43b6af3 100644
--- a/src/part.hpp
+++ b/src/part.hpp
@@ -61,10 +61,13 @@ static std::map <int, fpga_model> fpga_list = {
 	{0x02d020dd, {"altera", "cyclone V Soc", "5CSEBA6", 10}},
 	{0x02d010dd, {"altera", "cyclone V Soc", "5CSEMA4", 10}},
 
-	{0x00000001, {"efinix", "Trion", "T4/T8",            4}},
-	{0x00210a79, {"efinix", "Trion", "T8QFP144/T13/T20", 4}},
-	{0x00220a79, {"efinix", "Trion", "T55/T85/T120",     4}},
-	{0x00240a79, {"efinix", "Trion", "T20BGA324/T35",    4}},
+	{0x00000001, {"efinix", "Trion",    "T4/T8",            4}},
+	{0x00210a79, {"efinix", "Trion",    "T8QFP144/T13/T20", 4}},
+	{0x00220a79, {"efinix", "Trion",    "T55/T85/T120",     4}},
+	{0x00240a79, {"efinix", "Trion",    "T20BGA324/T35",    4}},
+	{0x00660a79, {"efinix", "Titanium", "Ti60",             4}},
+	{0x00360a79, {"efinix", "Titanium", "Ti60ES",           4}},
+	{0x00661a79, {"efinix", "Titanium", "Ti35",             4}},
 
 	{0x010F0043, {"lattice", "CrosslinkNX", "LIFCL-17", 8}},
 	{0x010F1043, {"lattice", "CrosslinkNX", "LIFCL-40", 8}},