diff --git a/spiOverJtag/Makefile b/spiOverJtag/Makefile index 0b69b86..36e68fe 100644 --- a/spiOverJtag/Makefile +++ b/spiOverJtag/Makefile @@ -1,4 +1,4 @@ -XILINX_PARTS := xc3s500evq100 xc6slx16ftg256 xc6slx16csg324 xc6slx45csg324 xc6slx100fgg484 \ +XILINX_PARTS := xc3s500evq100 xc6slx9tqg144 xc6slx16ftg256 xc6slx16csg324 xc6slx45csg324 xc6slx100fgg484 \ xc6slx150tfgg484 \ xc7a35tcpg236 xc7a35tcsg324 xc7a35tftg256 \ xc7a50tcsg324 xc7a50tcpg236 xc7a75tfgg484 \ diff --git a/spiOverJtag/build.py b/spiOverJtag/build.py index 0054882..f0eb558 100755 --- a/spiOverJtag/build.py +++ b/spiOverJtag/build.py @@ -62,6 +62,7 @@ else: if tool in ["ise", "vivado"]: pkg_name = { "xc3s500evq100" : "xc3s_vq100", + "xc6slx9tqg144" : "xc6s_tqg144", "xc6slx16ftg256" : "xc6s_ftg256", "xc6slx16csg324" : "xc6s_csg324", "xc6slx45csg324" : "xc6s_csg324", @@ -91,6 +92,7 @@ if tool in ["ise", "vivado"]: tool_options = {'family': family, 'device': { "xc3s500evq100": "xc3s500e", + "xc6slx9tqg144": "xc6slx9", "xc6slx16ftg256": "xc6slx16", "xc6slx16csg324": "xc6slx16", "xc6slx45csg324": "xc6slx45", @@ -102,6 +104,7 @@ if tool in ["ise", "vivado"]: }[part], 'package': { "xc3s500evq100": "vq100", + "xc6slx9tqg144": "tqg144", "xc6slx16ftg256": "ftg256", "xc6slx16csg324": "csg324", "xc6slx45csg324": "csg324", diff --git a/spiOverJtag/spiOverJtag_xc6slx9tqg144.bit b/spiOverJtag/spiOverJtag_xc6slx9tqg144.bit new file mode 100644 index 0000000..2594cda Binary files /dev/null and b/spiOverJtag/spiOverJtag_xc6slx9tqg144.bit differ diff --git a/spiOverJtag/spiOverJtag_xc6slx9tqg144.bit.gz b/spiOverJtag/spiOverJtag_xc6slx9tqg144.bit.gz new file mode 100644 index 0000000..6a05b25 Binary files /dev/null and b/spiOverJtag/spiOverJtag_xc6slx9tqg144.bit.gz differ diff --git a/spiOverJtag/xc6/constr_xc6slx9_tqg144.ucf b/spiOverJtag/xc6/constr_xc6slx9_tqg144.ucf new file mode 100644 index 0000000..8d84643 --- /dev/null +++ b/spiOverJtag/xc6/constr_xc6slx9_tqg144.ucf @@ -0,0 +1,6 @@ +CONFIG VCCAUX = "2.5"; + +NET "sdo" LOC = P65 | IOSTANDARD = LVCMOS33; +NET "sdi" LOC = P64 | IOSTANDARD = LVCMOS33; +NET "csn" LOC = P38 | IOSTANDARD = LVCMOS33; +NET "sck" LOC = P70 | IOSTANDARD = LVCMOS33;