From 94ca103360cf90de2d219be8b2e9399b8a48094c Mon Sep 17 00:00:00 2001
From: TG <tarik.graba@telecom-paris.fr>
Date: Wed, 9 Feb 2022 18:16:40 +0100
Subject: [PATCH] doc: add reference to the Terasic DE1-SoC board

---
 doc/boards.yml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/doc/boards.yml b/doc/boards.yml
index 94a036a..4fa129d 100644
--- a/doc/boards.yml
+++ b/doc/boards.yml
@@ -170,6 +170,12 @@
   FPGA: Cyclone V SoC 5CSEBA6U23I7
   Memory: OK
 
+- ID: de1Soc
+  Description: Terasic DE1-SoC
+  URL: https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=167&No=836
+  FPGA: Cyclone V SoC 5CSEMA5F31C6
+  Memory: OK
+
 - ID: ecp5_evn
   Description: Lattice ECP5 5G Evaluation Board
   URL: https://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/ECP5EvaluationBoard