diff --git a/CMakeLists.txt b/CMakeLists.txt index 37c770c..b527f24 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -175,6 +175,7 @@ install(TARGETS openFPGALoader DESTINATION bin) install(FILES test_sfl.svf spiOverJtag/spiOverJtag_xc7a35.bit + spiOverJtag/spiOverJtag_xc7a50t.bit spiOverJtag/spiOverJtag_xc7a100.bit spiOverJtag/spiOverJtag_xc7a200.bit spiOverJtag/spiOverJtag_xc7s50.bit diff --git a/README.md b/README.md index 735524e..0799bca 100644 --- a/README.md +++ b/README.md @@ -38,7 +38,7 @@ __Supported (tested) FPGA:__ * Lattice [MachXO3D](http://www.latticesemi.com/en/Products/FPGAandCPLD/MachXO3D.aspx) (SRAM and Flash) * Lattice [ECP5 (25F, 5G 85F](http://www.latticesemi.com/Products/FPGAandCPLD/ECP5) (SRAM and Flash) * Lattice [ECP5 (25F, 5G 85F, CrossLink-NX (LIFCL-40)](https://www.latticesemi.com/en/Products/FPGAandCPLD/CrossLink-NX) (SRAM and Flash) -* Xilinx Artix 7 [xc7a35ti, xc7a100t, xc7a200t](https://www.xilinx.com/products/silicon-devices/fpga/artix-7.html) (memory and spi flash) +* Xilinx Artix 7 [xc7a35ti, xc7a50t, xc7a100t, xc7a200t](https://www.xilinx.com/products/silicon-devices/fpga/artix-7.html) (memory and spi flash) * Xilinx Spartan 6 [xc6slx45](https://www.xilinx.com/products/silicon-devices/fpga/spartan-6.html) (memory) * Xilinx Spartan 7 [xc7s15, xc7s25, xc7s50](https://www.xilinx.com/products/silicon-devices/fpga/spartan-7.html) (memory (all) and spi flash (xc7s50)) * Intel Cyclone IV CE [EP4CE22](https://www.intel.com/content/www/us/en/products/programmable/fpga/cyclone-iv/features.html) (memory. See note below) diff --git a/spiOverJtag/Makefile b/spiOverJtag/Makefile index d874a86..7747e7b 100644 --- a/spiOverJtag/Makefile +++ b/spiOverJtag/Makefile @@ -1,5 +1,5 @@ VIVADO := vivado -nolog -nojournal -mode batch -source -MODELS := xc7a35 xc7a100 xc7s50 xc7a200 +MODELS := xc7a35 xc7a50t xc7a100 xc7s50 xc7a200 BIT_FILES := $(addsuffix .bit,$(addprefix spiOverJtag_, $(MODELS))) all: $(BIT_FILES) diff --git a/spiOverJtag/constr_xc7a50t.xdc b/spiOverJtag/constr_xc7a50t.xdc new file mode 100644 index 0000000..7b1edbf --- /dev/null +++ b/spiOverJtag/constr_xc7a50t.xdc @@ -0,0 +1,10 @@ +set_property CFGBVS VCCO [current_design] +set_property CONFIG_VOLTAGE 3.3 [current_design] +set_property BITSTREAM.CONFIG.SPI_BUSWIDTH {4} [current_design] +set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design] +set_property -dict {PACKAGE_PIN K19 IOSTANDARD LVCMOS33} [get_ports {csn}]; +set_property -dict {PACKAGE_PIN D18 IOSTANDARD LVCMOS33} [get_ports {sdi_dq0}]; +set_property -dict {PACKAGE_PIN D19 IOSTANDARD LVCMOS33} [get_ports {sdo_dq1}]; +set_property -dict {PACKAGE_PIN G18 IOSTANDARD LVCMOS33} [get_ports {wpn_dq2}]; +set_property -dict {PACKAGE_PIN F18 IOSTANDARD LVCMOS33} [get_ports {hldn_dq3}]; + diff --git a/spiOverJtag/spiOverJtag_xc7a50t.bit b/spiOverJtag/spiOverJtag_xc7a50t.bit new file mode 100644 index 0000000..4e4453b Binary files /dev/null and b/spiOverJtag/spiOverJtag_xc7a50t.bit differ diff --git a/spiOverJtag/xilinx_spiOverJtag.tcl b/spiOverJtag/xilinx_spiOverJtag.tcl index dd41230..9ada7e4 100644 --- a/spiOverJtag/xilinx_spiOverJtag.tcl +++ b/spiOverJtag/xilinx_spiOverJtag.tcl @@ -8,6 +8,7 @@ file delete -force $build_path # Project creation set parts [dict create \ xc7a35 xc7a35ticsg324-1L \ + xc7a50t xc7a50tcpg236-2 \ xc7s50 xc7s50csga324-1 \ xc7a100 xc7a100tfgg484-2 \ xc7a200 xc7a200tsbg484-1 \ diff --git a/src/part.hpp b/src/part.hpp index d4502ad..d8e26eb 100644 --- a/src/part.hpp +++ b/src/part.hpp @@ -14,6 +14,7 @@ static std::map fpga_list = { {0x0a014c35, {"anlogic", "eagle s20", "EG4S20BG256"}}, {0x0362D093, {"xilinx", "artix a7 35t", "xc7a35"}}, + {0x0362c093, {"xilinx", "artix a7 50t", "xc7a50t"}}, {0x13631093, {"xilinx", "artix a7 100t", "xc7a100"}}, {0x13636093, {"xilinx", "artix a7 200t", "xc7a200"}},