From 8d3310d4860c8f86b53a4eb7a5a61595e844ff27 Mon Sep 17 00:00:00 2001
From: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
Date: Sat, 19 Mar 2022 10:06:44 +0100
Subject: [PATCH] part: ZynqMPSoC XCZU9EG

---
 src/part.hpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/part.hpp b/src/part.hpp
index 4644262..7706a36 100644
--- a/src/part.hpp
+++ b/src/part.hpp
@@ -62,8 +62,10 @@ static std::map <int, fpga_model> fpga_list = {
 	 * a new scan to discover PL TAP and ARM DAP
 	 */
 	{0x08e22126, {"xilinx", "zynqmp_cfgn", "xczu2cg", 4}},
+	{0x08e70126, {"xilinx", "zynqmp_cfgn", "xczu9eg", 4}},
 
 	{0x04711093, {"xilinx", "zynqmp",      "xczu2cg", 6}},
+	{0x04738093, {"xilinx", "zynqmp",      "xczu9eg", 6}},
 
 	{0x020f20dd, {"altera", "cyclone III/IV", "EP3C16/EP4CE15", 10}},